53rd IEEE International Midwest Symposium on Circuits and Systems, Seattle, WA, Aug. 1-4, 2010 Special Session: Date: Chair:
Frequency Compensation for Multi-stage Amplifiers & Low-Dropout Voltage Regulators Tuesday August 03, 2010 (13:40-15:20) Paul M. Furth, New Mexico State University
Embedded Tutorial
Frequency Compensation Techniques Using Current Buffers Annajirao Garimella, M. Wasequr Rashid, and Paul M. Furth New Mexico State University, Las Cruces, NM, USA.
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Abstract When attempting to stabilize a multi-stage amplifier, the introduction of a Miller capacitor may create a feedforward path and Right-Half-Plane (RHP) zero, jeopardizing the stability of the control loop. In addition to a nulling resistor, a voltage buffer or a current buffer can be placed in series with the Miller capacitor to obviate the feed-forward path and introduce a Left-Half-Plane (LHP) zero. A LHP zero, placed in its proper location, can cancel the effect of a pole and/or an RHP zero, boosting the phase margin, and improving large-signal stability. This tutorial starts with the basics of frequency compensation. We explain some of the complex details in analyzing a wide range of compensation networks for multi-stage amplifiers. We introduce frequency compensation techniques using current buffers. In addition to the popular common-gate (or cascade) transistor topology used as a positive current buffer, we detail the recent technique of using current mirror as an inverting current buffer. Simple design equations and design examples of frequency compensation using current buffers are detailed. The tutorial concludes by introducing an effective method of using a series resistor for accurate placement of current buffer LHP zeros.
Speaker Biographies Annajirao Garimella is a Ph.D. Candidate in Electrical and Computer Engineering at New Mexico State University, Las Cruces, NM. He obtained M.S. in VLSI-CAD from Manipal University, Manipal, India, in 2002, a second M.S. in Electrical Engineering from New Mexico State University in 2009 and Bachelor of Engineering from University of Madras, India in 2000. He had pursued internship at Freescale Semiconductor Inc, Austin TX and at Texas Instruments, Dallas, TX. He is recipient of HENAAC (Hispanic Engineer National Achievement Award Corporation) AMD scholarship in 2005 and DaimlerChrysler Scholarship in 2006. His areas of interests include analog, mixed-signal IC design, power management IC design, SoC design and testing. M. Wasequr Rashid received his MSEE from Electrical and Computer Engineering at New Mexico State University in May 2010. He pursued Bachelor of Science Engineering in Electrical and Electronics Engineering from Bangladesh University of Engineering & Technology in 2004. He has work experience at Telekom Malaysia International Bangladesh (TMIB) Limited. He will be pursuing his Ph.D. at Georgia Institute of Technology, Atlanta, GA in the area of analog circuits and systems from Fall 2010. Paul M. Furth is an Associate Professor and Interim Department Head of the Klipsch School of Electrical and Computer Engineering at New Mexico State University, Las Cruces, NM. He received his BSEE from California Institute of Technology in 1985 and his M.S. and Ph.D. from Johns Hopkins University in 1992 and 1996, respectively. He has work experience at Sandia National Labs, Micron, and Motorola. He received the Bromilow teaching excellence award in 2008. His areas of interest include analog and mixedsignal VLSI design, power management circuits, and CMOS image sensors.
The tutorial is based on the following material: • A. Garimella, M. W. Rashid, and P. M. Furth, “Reverse Nested Miller Compensation Using Current Buffers in a ThreeStage LDO,” IEEE Trans. on Circuits and Systems–II, vol. 57, no. 4, pp. 250–254, April 2010. (Listed 2nd in Top Accessed Articles - April 2010) http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5438730 • A. Garimella, M. W. Rashid, and P. M. Furth, “Single Miller Capacitor Frequency Compensation with Inverting Current Buffer for Multistage Amplifiers,” IEEE Int’l Symp. on Circuits and Systems, ISCAS 2010, Paris, France, May 30–Jun. 2, 2010. • A. Garimella and P. M. Furth, “A 1.21V, 100mA, 0.1µF-10µF Output Capacitor Low Drop-Out Voltage Regulator for SoC Applications,” 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009, Yasmine Hammamet, Tunisia, pp. 375–378, Dec. 13-16, 2009. http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5410912 • M. W. Rashid, A. Garimella, and P. M. Furth “An Adaptive Biasing Technique to Convert a Pseudo-Class AB Amplifier to Class AB,” IET Electronics Letters, in print, Jun, 2010. • G. A. Rincon-Mora, “Analog IC Design with Low-Dropout Regulators,” McGraw-Hill Professional, 2009, United States. • R. W. Erickson, “Fundamentals of Power Electronics,” New York: Chapman and Hall, May 1997. •
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