APPLIED PHYSICS LETTERS 98, 092110 共2011兲
Graphene-based spin logic gates Minggang Zeng,1,2 Lei Shen (沈雷兲,1,a兲 Haibin Su,3 Chun Zhang,1,4 and Yuanping Feng1,b兲 1
Department of Physics, 2 Science drive 3, National University of Singapore, Singapore 117542 NanoCore, 5A Engineering Drive 4, National University of Singapore, Singapore 117576 3 Division of Materials Science, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798 and Institute of High Performance Computing, 1 Fusionopolis Way, Connexis, Singapore 138632 4 Department of Chemistry, 3 Science Drive 3, National University of Singapore, Singapore 117543 2
共Received 6 January 2011; accepted 12 February 2011; published online 1 March 2011兲 Logic operation is the key of digital electronics and spintronics. Based on spin-dependent transport property of zigzag graphene nanoribbons studied using nonequilibrium Green’s function method and density functional theory, we propose a complete set of all-carbon spin logic gates, in which the spin-polarized current can be manipulated by the source-drain voltage and magnetic configuration of the electrodes. These logic gates allow further designs of complex spin logic operations and pave the way for full implementation of spintronics computing devices. © 2011 American Institute of Physics. 关doi:10.1063/1.3562320兴
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were saturated with pseudohydrogen atoms. A 15 Å vacuum slab was used to eliminate interaction between ZGNRs in neighboring cells. A ZGNR with N zigzag chains is denoted by N-ZGNR.14 In our calculation, we focus on 8-ZGNR since previous study has concluded that only ZGNR with an even number of zigzag chain shows the transmission selection rule, which is related to the symmetry of ZGNRs.16 Magnetization of the ZGNR electrodes can be controlled by an external magnetic field,2,11,15 and can be set to 1 共spin up polarization, i.e., spin up electron dominates spin down electron兲, 0 共nonmagnetic兲, or –1 共spin down polarization兲. As shown in Fig. 1共a兲, we denote the magnetization configuration of the left and right electrode by 关M L , M R兴 共M L , M R = 1 , 0, or –1兲. The calculated spin-polarized current for the 8-ZGNR are shown in Fig. 1共b兲. The ZGNR shows metallic behavior for both positive and negative bias in the 关1,1兴 configuration. In the 关1,–1兴 configuration, the spin transport property under a negative bias is completely different from that under the positive bias.
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Graphene, a single layer of graphite, is considered a promising material for spintronics since spin injection and detection in graphene at room temperature have been demonstrated.1,2 Zigzag graphene nanoribbons 共ZGNRs兲 can be patterned from graphene sheets or unzipped from carbon nanotubes.3–5 In addition to its interesting spin properties of graphene, ZGNRs have unique spin polarized edge states.6 These edge states may be tuned by applying electrical field or choosing edge functional groups, giving rise to halfmetallic properties.7–10 Moreover, ZGNR-based giant magnetoresistance devices has been theoretically proposed and experimentally realized, indicating possible application of ZGNRs in digital storage.3,11 However, there have not been any implementation for the ZGNR-based logic gates, which is crucial for building a complete digital spin-based electronics. In this letter, we propose theoretical design of a complete set of spin logic gates based on an intrinsic selective rule of spin-polarized current in ZGNRs. We also present a half adder as an example of spin calculators. Our calculations were carried out within the framework of density functional theory 共DFT兲 combined with nonequilibrium Green’s function method 共NEGF兲 as implemented in ATK package.12,13 The local spin density approximation with the Perdew–Zunger exchange-correlation functional was adopted, and the single- 共SZ兲 basis set was used for electron wave function as that in Ref. 11. A cutoff energy of 150 Ry and a Monkhorst–Pack k-mesh of 1 ⫻ 1 ⫻ 100 yielded a good balance between computational time and accuracy in the results. The predefined norm-conserving pseudopotential was used for modeling interatomic potential. The NEGF-DFT self-consistency was controlled by a numerical tolerance of 10−5 eV. Contour integration was carried out in the imaginary plane to obtain the density matrix from the Green’s function. We used 30 contour points, with a lower energy bound of 3 Ry in the contour diagram in the case of zero bias and additional contour points spaced at 0.02 eV along the real energy axis in the case of nonzero bias. The electron temperature was set to 300 K in the transport calculation. In all the calculations, dangling bonds at the edges of GNRs
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FIG. 1. 共Color online兲 共a兲 The schematic illustration of ZGNRs based two terminal devices. The magnetization configuration of the left and right electrode are denoted by 关M L , M R兴 共M L , M R = 1 , 0, or –1兲. A positive bias drives current from source to drain. 共b兲 I-V curves of 关1,1兴 and 关1,–1兴 magnetic configurations of the 8-ZGNR. The width dependent threshold voltage in the 关1,–1兴 configuration is shown in the inset. 共c兲 I-V curves for the 8-ZGNR with the magnetic configuration of 关1,0兴 and 关–1,0兴.
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Under a positive bias, only the spin-down current passes through the device while under a negative bias, only the spin-up current is allowed. This selective spin current through the device is attributed to the orbital symmetry of spin subbands.16 As shown in the inset of Fig. 1共b兲, the threshold voltage for 关1,–1兴 configuration decreases with the increase in ribbon width. Therefore, when the ribbon is sufficiently wide, the threshold voltage is zero. Besides the 共关1,1兴兲 and 共关1,–1兴兲 magnetic configurations of the electrodes, we also considered the spin dependent transport in the magnetic configurations 关1,0兴 and 关–1,0兴. The calculated I-V curves are shown in Fig. 1共c兲, which are similar to those in the 关1,–1兴 configuration, with the exception of a zero threshold voltage in the 关1,0兴 and 关–1,0兴 configurations. The above results indicate that the spin channel of the two-terminal device is controllable in all three magnetic configurations, 关1,–1兴, 关1,0兴, 关–1,0兴. The conducting spin channel can be selected by setting proper bias direction 共+ or –兲 and/or magnetic configuration 共1,0 and –1兲 of the left and right electrodes. This flexible control over spin current makes it possible to use the two-terminal device as a basic component for building spin logic devices. In the following, we label the input terminals of the devices by A and/or B, and the output terminal by Y. In all designs, the logic inputs are encoded by the magnetization of the terminals, with positive magnetization of the ZGNR electrode representing the logic input 1 and negative magnetization representing logic 0. The result of the logic operation, however, is expressed in terms of the output current. For convenience of discussion, we assume that only the spin-up current is detected by setting the proper magnetization of ferromagnetic electrode in nonlocal measurement,1,17,18 so that we can encode the logic output to be 1 共0兲 if the output current include 共exclude兲 the spin up current. Figure 2共a兲 shows the schematic of a design for the NOT logic gate. The device consists of two terminals, and the magnetization of the right ZNGR electrode is set to zero 共nonmagnetic兲. The voltage of the left electrode is higher than that of the right electrode, so that the spin polarized current flows from left to right. If the magnetization of the left electrode is set to –1 共logic input 0兲, the spin-up channel is conducting, corresponding to a logic output 1. On other hand, the spin-down channel is conducting 共logic output 0兲 when the magnetization of the left electrode is set to 1 共logic input 1兲. The NOT logic operation is thus realized. The truth table and circuit symbol are shown in Fig. 2共a兲. Similarly, an AND gate can be designed but it requires three terminals, as shown in Fig. 2共b兲. The magnetization of the left electrode is pinned to 1, and inputs are represented by the magnetizations of the center and right terminals. The electric potential decreases from left to right. Based on the I-V curve given in Fig. 1, it can be easily seen that only when the magnetizations of both the center and right terminal correspond to logic 1, the output includes the spin up current 共logic output 1兲. In all other cases, either the spin polarized currents are completely blocked or only the spin-down current reaches the output terminal, corresponding to logic output 0. The logic operations are summarized in Fig. 2共b兲, along with the truth table and circuit symbol of this AND gate. The logic OR operation can also be realized similarly as shown in Fig. 2共c兲. Here, the left and right electrodes are used as the input terminals, and the middle electrode is used as the output terminal and its magnetization is pinned to 0. The spin-up
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FIG. 2. 共Color online兲 Schematic illustrations of the spin logic gates: 共a兲 logic NOT gate, 共b兲 logic AND gate, and 共c兲 logic OR gate. The input terminals are labeled by A and B, the output terminal is labeled by Y. M ref represents the pinned magnetization of the terminal. The logic input 1 共0兲 is encoded by the magnetization 1 共–1兲 of the input terminals. The logic output 1 共0兲 is encoded if the output current includes 共excludes兲 the spin up current. The truth table and circuit symbol are shown in the right side of each panel.
current passes through the output terminal when magnetization of either or both input terminals is 1. Only when both of the input terminals are set to –1 共logic input 0兲, the output current consists of spin-down electrons, corresponding to logic output 0. Other logic operations, such as NAND and NOR gates, can also be realized based on the above design concepts. Using the logic gates as building blocks, a graphenebased circuit architecture with spin as the operation variable for logic operation can be expected. As an example, we present a possible design of a nanoscale spin calculator using a half adder. The half adder is a logical circuit that performs an addition operation on two one-bit binary numbers, denoted by A and B, respectively. The output of the half adder is a sum of the two inputs, expressed in terms of a sum 共S兲 and a carry 共C兲, i.e., sum= 2 ⫻ C + S. Figure 3 shows the schematic diagram, the circuit symbol and the truth table for a half adder. As can be seen, the half adder is composed of a XOR and AND logic gates, both of them can be created based on the ZGNR-based spintronic logic gates discussed above.
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dature for integrating logic operations and digital storage for digital spin-based electronics. This work is supported by the National Research Foundation 共Singapore兲 Competitive Research Program 共Grant No. NRF-G-CRP 2007-05兲. 1
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FIG. 3. 共Color online兲 Schematic diagram of a ZGNR-based half-adder and its true table.
Although several devices have been proposed for the spin logic operation,19–21 the one proposed here has distinct features and advantages. First, graphene is an excellent spin conductor due to its long spin diffusion length. Second, ZGNRs-based spin logic gates can be patterned from graphene, which makes the integration of the spin logic gates with other powerful and abundant graphene-based components much easier. Furthermore, graphene is a half-metallic material and can be used for as conducting wire for ZGNRsbased spin logic circuits. In addition, owing to the fact that magnetization can be controlled by a current-carrying wire, the problem related to different types of input 共magnetization兲 and output 共spin current兲 signals can be easily overcome in the proposed devices. In summary, our first-principles studies show that a complete set of spin logic gates can be realized in ZGNRs due to the intrinsic selective rule of spin-polarized current. Moreover, a nanoscale spin calculator is used to demonstrate how these logic gates can be put together to perform calculations. Our work demonstrate that ZGNR can be a potential candi-
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