Hardware Overview - Fundi Software

Authors This presentation was prepared by: Tom Harper Research and Development NEON Enterprise Software, LLC. 14100 Southwest Freeway Sugar Land, TX 77479 Tel: 281.207.4914 Fax: 281.207.4973 E-mail: [email protected] Website: www.neonesoft.com

This document is protected under the copyright laws of the United States and other countries as an unpublished work. This document contains information that is proprietary and confidential to NEON Enterprise Software, which shall not be disclosed outside or duplicated, used, or disclosed in whole or in part for any purpose other than to evaluate NEON Enterprise Software products. Any use or disclosure in whole or in part of this information without the express written permission of NEON Enterprise Software is prohibited. © 2009 NEON Enterprise Software (Unpublished). All rights reserved.

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Confidential Material of NEON Enterprise Software, LLC.

Agenda Today z/OS Platform Evolution Software License Charges Specialty Processors Hardware Overview Software Overview Eclipse Utilities use of zIIP 2

Confidential Material of NEON Enterprise Software, LLC.

z/OS Platform Evolution CMOS-based processors Large numbers of processors Large memories Steeply dropping price / performance curve Escalating software costs

IFL Crypto

zIIP

z990

zAAP 3

z900

4.4 GHz processor chip Hardware Decimal Floating Point

z9 EC

Software License Charges Early software for platform was free Vendors slow to realize value Prices escalated out of control Customers were captive IBM looked for ways to help IBM got caught up in software license issues 4

themselves

Hardware Overview Specialty processors available on z/890, z/990, z8, z9, and z10 boxes Early specialty processors: €

ICF, Internal Coupling Facility

€

IFL, Integrated Facility for Linux

Later specialty processors:

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€

zAAP, Application Assist Processor

€

zIIP, Integrated Information Processor

Hardware Overview Goal of IBM was to: €

€

Preserve existing hardware and software license revenue Be competitive in “new” workloads

IBM’s plan:

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€

Create concept of specialty processors

€

Do a great deal of marketing

Hardware Overview Physically, all processors in a Central Electronic Complex (CEC) are identical Processors reside in a MultiChip Module (MCM). On a z/10, each MCM can contain up to five PUs.

PU2

PU1

SC1

MCMs also contain storage control ships PU4

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PU0

SC0

PU3

Hardware Overview Each PU contains four cores

CP

zAAP

zIIP

IFL

Each core can be a CP, zIIP, zAAP, etc. Up to twenty cores per MCM

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Hardware Overview MCM has 107 layers Each processor includes 64K level-1 cache and 3MB level 1.5 cache Each chip contains 24MB level 2 cache shared by processors on the MCM 993 million transistors 4.5 Ghz cycle 9

Hardware Overview 894 instructions 75% in hardware

Enterprise Quad Core z10 processor chip

Maximum of 64 Processors Customer can order one zIIP and one zAAP for each Central Processor (CP) Cost (plus monthly maintenance):

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€

CP - $250,000

€

zIIP or zAAP - $42,000

Hardware Overview Can order up to 1.5 TB of memory Memory access costs 600 cycles Significant cost to accessing storage of another processor Processors can be configured and brought online without a Power On Reset (POR) on z10 Spare processor cost IBM nothing to activate 11

Hardware Overview MCMs are grouped into “books” There are a maximum of four books It is more expensive to switch from a processor in one book to a processor in another book than one in the same book

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Hardware Overview CPs can run at a variety of speeds This enables IBM to sell CPs to customers tailored to what their needs are These processors are known as “kneecapped” processors zIIPs and zAAPs always run full speed; never knee-capped For Enterprise-class machines, kneecapping is 25, 50, 75, or 100% 13

Hardware Overview Processor capacity can be marketed in a variety of ways Outright purchase (traditional) Capacity on Demand, in which a monthly fee is charged based on a four-hour rolling average of CP time used (zIIPs and zAAPs excluded) Indirectly, via IBM Global Services

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Hardware Overview

Over 100 capacity settings on z10

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Software Overview After configuration, processors are marked as a CP, zIIP, or zAAP z/OS must be IPLed on a CP processor IBM has enabled Java and XML work to be shifted over to a zAAP processor IBM has enabled certain new DB2 work to be shifted over to a zIIP processor IBM has permitted ISVs to create work to run on zIIP processors (Eclipse) 16

Software Overview •

Specialty processors are masked off from I/O interrupts

•

Specialty processors are masked off from timer interrupts

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IBM provided vendors with a zIIP API

•

API required work to run in enclave SRB mode

•

SRB mode does not allow any SVCs to be issued except ABEND

•

Only access methods allowed are VSAM, Media Manager, and STARTIO

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Other services not available in SRB mode, such as ENQ

•

Code services need to be broken out from logic

•

Services need to be able to run in TCB or SRB mode

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For example, ENQs can be replaced with latches

•

Must convert or interpret QNAMEs and RNAMEs to a latch number

•

Must release latches when percolating (write own RESMGR)

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I/O is one of most difficult areas

•

VSAM was supposed to work in SRB mode, but there were, in actuality, many issues

•

STARTIO is the most workable solution, but complex to implement

•

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Not for the feint of heart

Eclipse IMS Utilities •

•

•

•

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Announced exploitation support for zIIP in January, 2008 In production in hundreds of shops around the world Customer selects percentage of zIIP offload desired Allows off-loading of up to 98% to zIIP

Questions?

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