HDL-s for Students with Different Background Uljana Reinsalu, Anton Arhipov, Teet Evartson, Peeter Ellervee Tallinn University of Technology, Raja 15, Tallinn, Estonia
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[email protected] Abstract In this paper, an overview of teaching hardware description languages (HDL) and related courses at Tallinn University of Technology are presented. The courses are taught for IT-students with different background – computer engineering, electronics, etc. Observations made and experiences learnt from running the courses over few years are described in the second part of the paper.
1. Introduction To build a model of a system, sometimes referred to also as a simulatable specification, different programming (PL) and hardware description languages (HDL) are used. This is because there is no such thing as a universal language. Some languages are good for one set of problems; some are good for another set of problems. At the Department of Computer Engineering at Tallinn University of Technology (TUT, Estonia), three HDL-s have been selected for teaching – VHDL, Verilog, and SystemC. Both VHDL and Verilog are used in industry for several reasons. One of them is the simple fact that a design order may come from different larger companies that usually have preferences about design languages. In addition, the chip design nowadays is teamwork with teams from different corners of the world. This makes it a must for a chip designer to know both of the languages. SystemC was selected as a potential future language that allows modeling both software and hardware – a necessary feature to design complex embedded systems. Therefore, to make graduates competitive on the job market, it is good to make them familiar not only with one HDL but with few different ones. It should be noted that it is not important for a student to have very deep knowledge about different languages. It is more important to make students familiar with the main concepts; and to point out what are the main differences between different languages and what are the reasons for such differences.
Besides, our university has small number of students with different background (programming, electronics). Therefore, it is not possible from budget point of view to make separate courses for different groups of students. Based on experiences, students with different background typically have different understanding about various concepts of HDL-s. For instance, about 2/3 students attending the course have stronger programming background and often concurrent constructions present difficulties for them, and, vice versa, students with stronger electronics background have often difficulties with sequential constructions. In the next section the content of HDL related courses is given. In the third section, the lessons learnt are summarized.
2. Course flow The following flow of the courses is set at TUT. The first two courses form the basis for the others. According to the curricula, students take the first of the courses at the fourth year of their education, that is, at the first year of the Master studies. The first course – IAY0040 “Hardware Description Languages and Modeling” – is obligatory for all students following Computer and Systems Engineering curriculum and optional for other students. The course [1] focuses solely onto modeling of digital systems. Lectures are divided into four major groups to cover three languages – VHDL, Verilog and SystemC – in more details and to give an overview of few other languages. Hands-on exercises were designed to make students familiar with few industrial tools, to cover three main languages, and to try co-simulation possibilities of different HDL-s. In total, there are seven hands-on exercises. Introduction to tools and language concepts is given in the beginning. The focus of exercises is the design of elevator controller. This is done using three HDL-s while adding step-by-step complexity to the controller. Some parts of the course, VHDL related lectures and theoretical topics are taught for the second year
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Bachelor level students also at Information Technology College (Tallinn, Estonia). The second course – IAY0050 “VLSI Synthesis” – is taught just after HDL course and is focusing onto digital hardware synthesis related topics. Among other topics, the course covers also how to synthesize HDL code, mostly VHDL, written at different abstraction levels, especially at register transfer level. Courses IAF0020 “Programmable Logic”, IAY0130 “System-on-a-Chip Design”, and IAY0070 “Hardware-Software Co-design”, are taught as follow-ups. In these courses, the knowledge of HDL-s, both for modeling and synthesis, helps strongly in practical work either to implement smaller system on FPGA-s or to implement a model or even a prototype of a system.
3. Experiences from the HDL courses During the courses, some interesting observations were made. Some observations were described already above, but the most noteworthy are described below. After successful accomplishment of an exercise, students were first asked to explain their work orally. The written report, needed to conclude the task, had to contain the main concepts of used solutions. It should be noted, that it did not matter how complex a task was, without explaining the solutions, the understanding of language concepts is incomplete. This applied both for simple trial examples (e.g., at IT College) and for larger programs written by the students (at TUT). Therefore, reporting and oral explanation lead to complete understanding, ability in reasoning and documenting their work done. In comparison, template-based reports (e.g., filling a web-based form) are not enough, because students lose self-expression skills. For beginners it is better to start teaching from structural VHDL because, first, the clear difference from other programming languages is seen that opens mind for completely new concepts of programming. Second, elements of hardware are clearly distinguishable in comparison with behavioral VHDL. VHDL is the first of the languages taught, followed by Verilog and SystemC. The reason to start with VHDL and not with Verilog is based on a simple fact that VHDL is the most common language for digital design in Europe. It is easy to study new programming concepts on a completely new language (VHDL, Verilog) because the new way of thinking superimposes syntax of the language. With SystemC (essentially a set of C++ classes), new programming concepts are lost behind C++ tricks and therefore it is difficult to distinguish these concepts from usual C++ programming. On
top of that, SystemC is a system-level language where you can describe not only hardware. Therefore is better to study SystemC after getting familiar with VHDL and/or Verilog. Some students liked the order as it is. Some would have preferred to start from SystemC, because they were familiar with C++. At the same time, they had difficulties of grasping the principles of concurrent constructs. Everyone knows common truth – the more practice you have the better you understand. This was confirmed also at TUT when the number of practical tasks was doubled when new course were established. The same successful approach was reported in [2]. As a counter example, in [3] only one project is given for pair of students with three stages of implementation. Yes, the students confirmed that it is difficult to have so many tasks but, from other side, dividing into smaller tasks helps in step-by-step completion of requirements. For students with programming background, it was easy to switch from one language to another, but they had difficulties of understanding parallel concepts. For students with electronics background it was often way around, and especially difficult was programming in SystemC – too much software. Based on the observation from the previous year – rather steep learning curve between some of the exercises – unnecessary complexity was moved into later exercises and this time the task flow was smoother. More observations can be found in [4].
4. Conclusion This paper gives an overview of the courses taught for IT students with rather different background. During the courses, some observations were made how students understand concepts of different HDL-s. Conclusions from the observations were used to modify teaching materials and approach.
10. References [1] Hardware Description Languages and Modeling. http://mini.li.ttu.ee/~lrv/IAY0040/ [2] M. Becvar, H. Kubatova, M. Novotny, “Massive Digital Design Education”, EWME'06, Stockholm, Sweden, June 2006, pp. 108-111. [3] M.E. Radu, A. Chidanandan, “Comprehensive design projects integrated in digital systems and computer architecture courses”, EWME'06, Stockholm, Sweden, June 2006, pp. 116-119. [4] P. Ellervee, U. Reinsalu, A. Arhipov, “Teaching HDL for IT-students”, EWME'06, Stockholm, Sweden, June 2006, pp. 112-115.
2007 IEEE International Conference on Microelectronic Systems Education (MSE'07) 0-7695-2849-X/07 $20.00 © 2007
