2009 International Conference on Emerging Trends in Electronic and Photonic Devices & Systems (ELECTRO-2009)
High Speed LVDS Driver for SERDES Hari Shanker Gupta, RM Parmar and RK Dave SPACE APPLICATIONS CENTRE, ISRO, JODHPUR TEKRA (P.O), AHMEDABAD-380015 E-mail:
[email protected],
[email protected],
[email protected] critical when used with SERDES for high transmission rate. LVDS has become an attractive alternative as a standalone driver or as I/O pad for high-speed devices like SerDes. The low power and low voltage operation are the added advantages. A modified LVDS driver design technique is proposed and its performance is compared with the conventional type in the following sections. It is envisaged that LVDS driver would be low power and high speed (400 Mbps) device based on 0.8μ CMOS technology and shall also be fully compatible to IEEE STD 1596.3-1996[3]. Sections 2 and 3 respectively discuss LVDS driver topologies and typical design along with the issues related to achieving required performance. The expected performance and conclusions are addressed in the last section.
Abstract: - Low Voltage Differential Signaling (LVDS) is a method used for high-speed transmission of binary data over copper cable. In the earlier remote sensing payload camera electronics, the multi-port parallel data were provided to spacecraft base-band system, requiring large number of I/O connectors and associated harnesses. This multi-port parallel data can be multiplexed, serialized and transmitted to other subsystems using LVDS interface thereby reducing the number of I/Os, cabling and associated weight of interface hardware. This work presents the design, simulation and analysis of I/O interface circuits for high speed operation which is fully compliant with the IEEE STD 1596.3 (LVDS). A common mode feedback (CMFB) circuitry is utilized in the LVDS transmitter to stabilize the common mode voltage in a pre-defined range. In most of the previous designs [1] output cells utilize voltage divider circuit composed of two large resistors (≈MΩ) between output pads and center is taped as feedback. These resistors may be off-chip discrete components (due to stringent stability and large die area requirement). The modified common mode feedback circuit has been designed and analyzed with appropriate transistor geometry and evaluated. Its performance is also compared with conventional CMFB design.
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1. INTRODUCTION:
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Keywords: LVDS, CMFB, CMOS, IEEE STD 1596.3-1996,
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Typical Low-Voltage Differential Signaling (LVDS) Interface shown in Fig-1.1 consists of a current source (nominal 3.5 mA), which drives the differential lines terminated with 100 Ω load. The LVDS receivers have high input impedance and the drive current mainly flows through the terminating resistor generating about 350 mV across the receiver inputs. When the driver switches, it changes the direction of current flow through the resistor, thereby creating a valid “one” or “zero” logic state. The Serializer De-serializer devices popularly known as SerDes are used for high speed data transmission. They utilize LVDS interface leading to lower power, better noise immunity and reliable clock recovery. They also exhibit large bandwidth for high speed data transmission. A bottleneck in the digital transmission of signals via long wire is the I/O cells, which have to drive load at the required rate, meeting the stringent voltage levels as per applicable standards throughout the operating temperature range. The I/O cells/pads are designed to supply sufficient current to drive load which results in large pad size and higher power restricting the speed of operation, at larger loads. Most of the conventional CMOS I/O cells utilized very large area to accommodate large driving transistors and associated large passive elements [2]. This becomes more
VSS Fig 1.1: Typical LVDS Interface 2. LVDS DRIVERS TOPOLOGIES: Table-1: Comparisons of LVDS driver topologies Topology Æ
Bridge
Double current
Switchable
Parameter ⇓
Driver
source
current source
Static power
Low
High
Low
Control on O/P
More
Less
Less
LV Operation
No
Yes
Yes
Size
Small
Large
Small
I/P Capacitance
Small
Large
Small
low
low
high
Circuit complexity Buffer requirement Speed
No
No
Yes
High
Low
Low
The merits and demerits of popular LVDS driver topologies viz. Bridge driver, double current source and Switchable current source are compared in Table-1.
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2009 International Conference on Emerging Trends in Electronic and Photonic Devices & Systems (ELECTRO-2009)
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However, the large value resistors demand large die area or use of off-chip discrete components. The proposed driver circuit uses a modified common mode feedback (CMFB) circuit scheme to resolve this problem. The CMFB implemented in [4] for maintaining stable common mode voltage of differential amplifier is employed in the proposed LVDS design. The modified CMFB circuit does not require high value resistors. Also, it occupies lesser area and has minimum parasitics in the feedback circuit, thereby improving the speed of operation and reduction in silicon area. Additionally this arrangement can be made less sensitive to temperature and process variations. The functional diagram of the modified CMFB concept is given in Fig-3.2. Here M7 to M10 are matched transistors. The source coupled pairs M7-M8 and M9-M10, together sense the common mode output voltage. Feedback proportional to the difference between common mode voltage and VOCM is appropriately fed back to generate stable common mode voltage.
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