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Apr 28, 2018 - Keywords: fault detection; HVDC protection; hybrid circuit breaker; multi-terminal HVDC. 1. .... off within 10 µs at the time of the fault, but the current flows through the .... Equation (12) is valid for any interval of the window, and the generalised formula for the ... to find the direction of fault as presented in (18).
energies Article

Identification and Isolation of Faults in Multi-terminal High Voltage DC Networks with Hybrid Circuit Breakers Muhammad Haroon Nadeem *

ID

, Xiaodong Zheng *, Nengling Tai and Mehr Gul

School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai 200240, China; [email protected] (N.T.); [email protected] (M.G.) * Correspondence: [email protected] (M.H.N.); [email protected] (X.Z.)  

Received: 20 March 2018; Accepted: 25 April 2018; Published: 28 April 2018

Abstract: This paper presents a protection scheme to protect multi-terminal high voltage dc (MTDC) networks for interconnection of renewable energy sources. The proposed scheme detects faults by using the Consecutive Data Window Method (CDWM) and harmonics of the system voltage to avoid maloperation of breakers without communication. Fault location is classified and faulty parts is isolated from the rest of the healthier network by using hybrid circuit breakers (HCBs). Moreover; it also categorises the fault with the help of the voltage drop. The rapid response to isolate the faulty portion in a few milliseconds is primarily considered to enhance the reliability and security of the network. The results of simulations verify the efficient fault detection and isolation for different DC faults and the investigation for the impact of significant parameters of the proposed scheme has been considered. The simulations are performed in PSCAD for four terminal MTDC networks to validate the proposed scheme. The performance is also verified under different fault conditions by using Matlab after computing the data from simulations. Keywords: fault detection; HVDC protection; hybrid circuit breaker; multi-terminal HVDC

1. Introduction The demand for electrical energy has increased dramatically in recent years and to increase the penetration of renewable energy, MTDC has recognized a key technology for connecting the offshore and onshore renewable energy with the corresponding national grids. Currently, different concepts for the protection of MTDC network are characterized, each with their own merits and demerits [1–7]. The first concept is to apply AC breakers on the AC sides. AC interruption is much easier due to the natural zero crossing of the current, but the shortcoming of this concept is the de-energization of the whole system during any troubleshooting, and it clears the fault in 50–100 ms [1]. The second concept is to apply simple DC circuit breakers (DCCB’s) on the DC side of the converters to isolate the fault [2]. This needs more power switches since its cost is high and the on-state losses are intensified. Use of superconducting fault current limiters (FCLs) is a decent concept for the DCCB to limit the current, but it is a costly technology, and alone it cannot entirely break the fault currents [3,4]. The exemplary concept is to apply the HCB to break the faulty portion of the MTDC network selectively and achieve fast interruption during a rising slope within 2–7 ms [5]. Due to excessive dependence on semiconductor devices and new technology, the costs are high, and the technology is not fully mature [6]. It is also concerned with the development of the protection logic having less communication time for co-ordination when acquiring the data and tripping HCBs [7]. The significance of different techniques for the protection of MTDC has been acknowledged and discussed [8–21]. The faults in low voltage DC networks can be indicated by overcurrent [8]. The same

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concept is not feasible to implement for large-scale MTDC networks since the protection of non-faulted lines can sense the high values of the fault current and also, faults with high resistance are difficult to analyze with the overcurrent. The current differential scheme is an excellent choice to detect the fault selectivity [9]. Time delay to return the fault detection signal is a problem for remote areas in the case of long transmission lines. Moreover, distributed capacitance of line would distort the signal, and precise synchronization of data is required [10,11]. The single-ended differential protection scheme by using the multipoint optical current measuring sensors along with the whole length of transmission lines has been presented in [12]. The differential current method by using predefined threshold values is taken into account, if the load current changes suddenly, the predefined threshold value will not be valid, and it also uses the only current signal for detection of a fault. A method for tracing fault location using multiple measurements at different points with traveling waves in MTDC network is presented in [13]. The need for fast and reliable communication between multiple measuring units may limit its practical implementation. A non-communication- based protection algorithm for MTDC is presented and addresses some issues raised above by the use of current data at one end without communication in [14]. Adding the shunt capacitor may increase its cost as well as complexity for other parameters. The work done in [15] proposed wavelet transform analysis for detection of faulted cables in MTDC arrangements. A discrete wavelet transform is used as criterion for detection of a fault. However, the technique was tested for bolted faults, and not implemented for overhead lines. A differential protection algorithm has been proposed recently for MTDC networks [16]. Since high-speed communication is needed for the execution of the protection scheme, it increases the complications and the cost of the system. The fault detection performance can be improved for DC lines by utilizing the transient components for designing the protection scheme without communication [17]. A transient fault current technique is used for the protection of MTDC in [18]. The protection scheme is presented for the line current commutated converters since the operation and control of voltage source converter (VSC) are entirely different. Furthermore, the VSC topology is promising and provides more control as compared to a line commutated converter (LCC). Protection schemes have been proposed for two terminal VSC-HVDC networks by using transient harmonics [19–21]. Transient harmonics analyzes each terminal of the line to detect the DC faults. Since fault detection is based on the single frequency component, it would be certainly affected by signal noise or filter capacitors. Further investigation is needed for adaptability of harmonic components as fault detection in MTDC networks. The basic aim of this paper is to identify the fault and isolate the specific faulty portion of a MTDC network in a very short interval with high reliability. In order to solve the aforementioned problem, a protection scheme for the DC line faults is proposed by using CDWM and verified by the harmonics of the system voltage without communication between the terminals. Owing to the non-communication based scheme, the time interval for the protection of MTDC network is reduced significantly. It can carefully detect the fault location and isolate the faulty part from the rest of the MTDC network with the help of HCB. Moreover, it can also classify the nature of a fault with the help of the voltage drop. The proposed scheme is implemented on each terminal of a MTDC network for the protection of the overall system in case of L-L or L-G faults. The focus of the proposed method is to attain rapid fault detection, improving reliability by isolating the faulty part and differentiating among the different faults. Detailed simulations are performed in PSCAD/EMTDC to validate the performance of the proposed scheme for different possible cases in the MTDC network and results are confirmed in Matlab for the accuracy of the proposed method. As the proposed scheme is simulated under various fault conditions in standardized simulation environments, the remarkable response of the proposed scheme in handling the faults, as validated by the results, makes it advantageous for its implementation in real-time systems. Moreover, the response of the different key parameters on the system is also discussed. The remaining structure of the paper is arranged as follows: Section 2 describes DC faults in MTDC networks. Sections 3 and 4 present the methodology and protection scheme for detection and

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isolation of faults. Section 5 explains the simulation of the MTDC network, cable and the concept of HCB model. Results for the propagation delay in cables, different possible fault cases, validation of scheme in Matlab and comparative analysis are discussed in Section 6. The conclusions are drawn in Section 7. 2. DC Faults in MTDC Networks Potential causes of faults in MTDC networks are mainly categorized into three groups depending on the network topology. The line to ground (L-G) faults either on positive or negative lines, Line to line (L-L) faults and AC side faults in MTDC networks. AC side faults should be isolated with conventional AC side breakers. In the following text, L-G faults and L-L faults are discussed to design the appropriate protection scheme. The protection scheme must protect and differentiate the faults reliably within milliseconds [22,23]. The DC side faults are a challenge to isolate in a limited interval of time to protect the whole system. Moreover, the short circuit with another line or ground faults with low impedance on the DC side propagates a low voltage surge with the speed of light in vacuum and reflects back as a high voltage surge after its arrival at the terminal. Primary causes of tripping are the L-G faults in the case of overhead lines, due to arcing phenomena triggered by the weather being temporary [24]. The lightning surge can be modeled as a current source that is injected in the line, having the standard surge 1.2/50 µs. On the other hand, most of the faults in cables are permanent due to insulation damage. The healthy pole is significantly affected as the healthy-pole voltage usually jumps towards 2.0 p.u. This would impose significant voltage stress on the pole. Moreover, the L-G faults are not only dependent on the value of fault resistance, but also on the grounding configuration, the impedance of the grounding electrodes and the configuration of the converter transformer. The protection must operate within a minimum time to avoid damage to the converter and the collapse of the whole system. For the L-L faults, the fault period can be divided into three stages. In the first stage, the capacitors discharge with a sharp peak. The insulated gate bipolar transistor (IGBTs) are blocked to be protected from over current, and the anti-parallel diodes across the IGBT’s conduct in the opposite direction to prevent the valves from over voltage. In the next stage, the DC voltage drops, and at the same time, the link inductance drives with the freewheeling diodes even when the voltage drops to zero. In the last stage, the AC infeed continuously feeds the fault current of DC through the freewheeling diodes in case of half-bridge converters, and the converter can not block it without protection scheme. On the other hand, AC-side infeed can be blocked in case of full-bridge modular multi-level converters (MMCs). Overcurrents damage the valves, diodes and other sensitive equipment. The IGBTs are turned off within 10 µs at the time of the fault, but the current flows through the freewheeling diodes on the AC sides. Since the topology should have one cycle to avoid damage to the converter, it should work to isolate the fault within a minimum time [22]. 3. Methodology At the time of a fault, the system current and voltage change significantly. These changes should quickly and efficiently identify the fault by using the CDWM. Consider x (t) being a sample of the current signal at an arbitrary time t with a fundamental frequency that is calibrated in radians per second: x (t) = Xc cos ωo t + Xs sin ωo t

(1)

where Xc and Xs are real numbers. Some notations are defined for the data window method: the fixed time interval between two samples is ∆t; moreover, the primary frequency between samples, θ = ωo ∆t.

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x1  x (t )

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x0  x(0)

(2) x  x (  t ) Also, we consider the samples are taken1 at different intervals of time at −∆t, 0 and ∆t as expressed below: By relating the samples with the signal amplitudes Xc and Xs : x−1 = x (−∆t) (2) =x (0)sin    x1  x0cos  Xc    x1 = x (∆t)  0 (3)  x0   1  X   sX :  x1  amplitudes   By relating the samples with the signal X and cos  sin  c  s        # Xc  x0 Xc Xs and can be x−1obtained cosfrom two and if and θ − sin θ "samples,     Xc (3) 0  1  0  = is: Xs   x1  x0 cos   sin  thenthexoutput Xs x1 cos θ sin θ  x1 cos   x0  x1 cos   (4) Xc samples, and if X = x0 and Xs = ( x1 − x0 cos θ )/sin θ then Xc and Xs can be obtained from two 1  2cos 2 c the output is: [ x cos θ + x0 + x−1 cos θ ] Xc0 = 1 (4)  x  x2  (5) Xs 1+ 21 cos 1θ 2 sin  [ x − x −1 ] Xs0 = 1 (5) If the number of samples are k = 1, 2, 3, …; and, theθnumber of windows are l = 1, 2, 3, …; so, the l2 sin th and (l + 1)-th window are compared. where the consecutive windows different If the number of samples are k = 1,In2,the 3, .case . . ; and, the number of windows arehave l = 1, 2, 3, . . .rates ; so, of change, a fault identification signal is generated and passes on for fault verification. The last three the l-th and (l + 1)-th window are compared. In the case where the consecutive windows have different samples and identification the algorithm are pre-fault, fault, the post-fault samples: xk 1 , xak fault xk 1 based onsignal rates of change, is generated and passes on and for fault verification. The last

three samples xk+1 , xk and xk−1 based on the algorithm are pre-fault, fault, and the post-fault samples:  x cos   xk  xk 1 cos   (6) X( k )   k 1 xk + 2xk−1 cos θ ] 0(k) c [ xk+1 cos θ1+  2cos (6) Xc = 1 + 2 cos2 θ

 x 1 xxk 1 ] 0(k) ( k ) [ x  k − k −1 Xs Xs=  k+1 sinθ 22sin

(7) (7)

The described by by the theequations equationshas hasthree threesamples samplesofofdata. data.The The newest sample The algorithm algorithm described newest sample cancan be be calculated with the old samples. Existing algorithms use sampling rates from four to 64 samples calculated with the old samples. Existing algorithms use sampling rates from four to 64 samples per per cycle In this paper, 16 moving windows in one cycle taken a reference on the cycle [25].[25]. In this paper, 16 moving windows in one cycle havehave beenbeen taken as aas reference on the AC AC side for the DC side faults, and a current signal is expressed in Figure 1, the sample time (∆t) side for the DC side faults, and a current signal is expressed in Figure 1, the sample time ( t ) will will be 1.25 A high sampling requires a morepowerful powerfulprocessor processorthat thatcan can calculate calculate the the next be1.25 ms. ms. A high sampling raterate requires a more next window window in in aa very very short short time. time. 10 8

W14W15W16 W13

Moving Data Window W1

6

Current (kA)

4

2 0

W2 W3

W12 W4 W5

W11

W6 W10 W7 W9 W8

−2 −4

W1

−6 −8 Time (ms)

Figure 1. 1. Moving Moving data data window window of of the the current current signal signal for for 16 16 windows windows per per cycle. cycle. Figure

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The fundamental frequency components for K samples per cycle expressed in [25]: Xc0 =

2 K xk cos(kθ ) K k∑ =1

(8)

Xs0 =

2 K xk sin(kθ ) K k∑ =1

(9)

where θ = 2π/K, and if L is the last sample and to make the results stationary, the equation rotates by the angle, (K − L)θ: L

.. L



X =

xk e− jkθ

(10)

k = L − K +1 .. ( L−1)

X

L −1

=



xk e− jkθ

(11)

k= L−K

The subtraction between (10) and (11) is the last point of (10) and first point of (11), .. L

.. ( L−1)

X =X

h i + x L − x L−K e jKθ e− jLθ

(12)

Equation (12) is valid for any interval of the window, and the generalised formula for the algorithm becomes: 0(new)

Xc

0(new)

Xs

0(old)

+ [ xnew − xold ] cos( Lθ )

(13)

0(old)

+ [ xnew − xold ] sin( Lθ )

(14)

= Xc

= Xc

4. Identification and Isolation Scheme for MTDC Networks Based on the aforementioned analysis, the identification and isolation scheme has been expressed in Figure 2. If the signal is entirely periodic, then xnew = xold and the window remains same. On the other hand, when the consecutive windows have a different rate of change, then a trip signal must be generated that can initiate the protection scheme. The currents from each terminal of MTDC network are processed per pole, and the windows are calculated for each signal continuously as in Equation (15): x 1 ( t ) = x 1( k ) , x 1( k +1) , x 1( k +2) . . . x 1( n ) (15) The new window can be calculated from the previous window and compared with each other. Comparison of the consecutive current window should help to identify the fault, and the fault identification criteria are expressed in Equation (16): xnew 6= xold

(16)

There may be a fault or short time harmonics in the system. This can be verified by double-checking through the harmonics of the system voltage, which are extracted through the mathematical modeling based on the discrete Fourier Transform (DFT). Some notations are used for the data window method: VmnH highest value of the harmonics of the system voltage; VnmH second highest value of the harmonics of the system voltage; Vhset the threshold value of the harmonics of the system voltage; Vmn lowest terminal voltage in MTDC network; Vnm second lowest terminal voltage in MTDC network;

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Sample from T-1

Sample from T-2

Sample from T-n

Extraction of x1(k),x1(k+1),... x1(n)

Extraction of x2(k),x2(k+1),... x2(n)

Extraction of xn(k),xn(k+1),... xn(n)

Fault identification criteria

NO

There is no fault in system

YES

Calculating VmnH, VnmH Post Fault Analysis NO

Fault verification criteria YES

Trip Vmn and Vnm relays

Calculating Vmn, Vnm

Fault YES classification L-L Fault criteria NO

L-G Fault Figure 2. Flow chart of the identification and isolation scheme.

Figure 2. Flow chart of the identification and isolation scheme. The threshold value of the harmonics is set as 0.01 p.u. from a lot of simulations for fault criteria, and if the value value of the harmonics VmnH or VisnmH higher hset, a fault on the DC line is verified as The threshold of the harmonics setisas 0.01 than p.u. V from a lot of simulations for fault criteria, expressed in (17). The corresponding relays trip the HCB without and if the value of the harmonics VmnH or VnmH is higher than Vhsetcommunication , a fault on theand DCinitiate line is the verified post-fault analysis:

as expressed in (17). The corresponding relays trip the HCB without communication and initiate the V  Vhset post-fault analysis: (  mnH (17) VmnH VnmH> Vhset hset (17) VnmH > Vhset

For identification of fault location and categorization of the nature of the fault, further, analysis of the voltages and of categorizing themand by the voltage level is in of thethe post-fault analysisanalysis in For identification fault location categorization ofexpressed the nature fault, further, Figure 2. The lowest terminal voltage V mn is nearest to the fault place. Similarly, to find the direction of the voltages and categorizing them by the voltage level is expressed in the post-fault analysis in of fault location from the lowest terminal voltage, the second lowest terminal voltage Vnm should help Figure 2. The lowest terminal voltage Vmn is nearest to the fault place. Similarly, to find the direction to find the direction of fault as presented in (18). A trip single is generated respectively for HCBs to of fault location from the lowest terminal voltage, the second lowest terminal voltage Vnm should help isolate the faulty portion. Thus, to find the nature of the fault, the voltage drop must be compared to to find the direction ofIffault as presented in zero, (18). then A trip single is generated respectively forthere HCBs to post-fault analysis. the voltage drops to there should be a L-L fault. Otherwise, isolate the faulty portion. Thus, to the findabove the nature of the fault, the drop must be compared would be a L-G fault. Moreover, statement is not valid in voltage some conditions. If there is a to post-fault analysis. the then voltage drops to zero, then to there be aofL-L Otherwise, highly resistive L-L If fault, the voltage will not drop zero.should In the case L-Gfault. faults, the faulted there would bevoltage a L-G will fault. Moreover, the above notvoltage valid in some If there is a pole collapse towards zero whilestatement the healthyispole will jumpconditions. towards 2 p.u.

highly resistive L-L fault, then the voltage will faulted Vmnnot  Vdrop  0to zero. In the case of L-G faults, the(18) nm pole voltage will collapse towards zero while the healthy pole voltage will jump towards 2 p.u. Vmn Vnm == 0

(18)

5. Simulation Model Different fault situations are analyzed in a four-terminal MTDC network as expressed in Figure 3 by using the PSCAD. This section explains the simulation of different components of MTDC network.

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5. Simulation Model

5. Simulation Different faultModel situations are analyzed in a four-terminal MTDC network as expressed in Figure 3 Energies 2018, 11, 1086 by using the PSCAD. section of different components of MTDC network. Different faultThis situations areexplains analyzedthe in asimulation four-terminal MTDC network as expressed in Figure 37 of 21 by using the PSCAD. This section explains the simulation of different components of MTDC network. Terminal 1

L1 400L1 km

HCB12

Terminal 1

400 km

HCB12

Terminal 2

HCB21

Terminal 2

HCB21

C1 HCB13

C1 HCB13

Terminal Terminal 4 4

C4

C2

400km km 400 200km km 200 100 km 100 km HCB43 L3 HCB43 L3 C4

F3

F3

AC grid AC grid

C2

F2

F2

HCB31 HCB31 HCB34 HCB34

Terminal 3 3 Terminal AC grid AC grid

C3C3

F1

F1

Figure 3. MTDC network layout with different faults.

Figure 3. 3. MTDC MTDC network network layout layout with with different different faults. faults. Figure 5.1. Network and Converter Model

5.1. Network Network and and Converter Converter Model Model 5.1.

The four terminal MTDC network is modeled in PSCAD as expressed in Figure 3 and the

The four terminal terminal MTDC network in is Table modeled in PSCAD PSCAD as expressed in Figure and the the parameters of the system are described 1. Terminal 1 and as 4 are connectedin to Figure offshore33wind The four MTDC network is modeled in expressed and generation. Terminal 2 and 3 are connected to the AC grids. Different fault cases are modeled to parameters of the system are described in Table 1. Terminal 1 and 4 are connected to offshore wind parameters of the system are described in Table 1. Terminal 1 and 4 are connected to offshore wind evaluateTerminal the performance proposed protection scheme. Moreover, the effects key parameters to to generation. 22 and and of are connected to the the AC grids. grids. Different faultofcases cases are modeled modeled generation. Terminal 33 are connected to AC Different fault are to identify the fault current and terminal voltage for different values are also examined critically. evaluate the the performance performance of of proposed proposed protection protection scheme. scheme. Moreover, Moreover, the the effects effects of of key key parameters parameters to to evaluate The equivalent model of the VSC converter is modeled as ±300 kV bipolar half-bridge as identify the the fault fault current current and and terminal terminal voltage voltage for for different differentvalues valuesare arealso alsoexamined examinedcritically. critically. identify expressed in Figure 4, which contains six IGBT valve group having its corresponding freewheeling The equivalent model of the VSC converter is modeled as ±300 kV bipolar half-bridge as The equivalent model of the VSC converter modeled asthe ±300 kVpulses bipolar half-bridge as expressed diodes. For the protection of IGBT’s from the is overcurrent, firing would block within the expressed in Figure 4, which contains six IGBT valve group having its corresponding freewheeling in Figure 4, which contains six IGBT valve grouptwice having corresponding freewheeling diodes. shortest time when the value of current reaches to itsitsnominal value. Meanwhile, the fault diodes. For the protection of IGBT’s from the overcurrent, the firing pulses would block within the For the protection of to IGBT’s overcurrent, the diodes firing pulses block current will feed the DCfrom side the through freewheeling from thewould AC side grids.within the shortest shortest time when the value of current reaches twice to its nominal value. Meanwhile, the fault time when the value of current reaches twice to its nominal value. Meanwhile, the fault current will Table 1. System parameters. current willDC feed to through the DC side through freewheeling diodes the AC side grids. feed to the side freewheeling diodes from the AC from side grids. Parameters Values Table 1. System parameters. 1000 MW RatedTable power1. ofSystem the converter parameters. AC voltage (L-L, RMS) 500 kV Parameters Values DC voltage ±300 kV Parameters Values Rated power of the converter 1000 MW X/R of AC network 10 Rated of the converter 1000 MW ACpower voltage (L-L, RMS) 500 kV Transformer leakage reactance 0.10 p.u. AC voltage (L-L, RMS) 500 kV DC voltage ±300 kV Total resistance of converter diodes 0.005 p.u. DC voltage ±300 kV X/RofofAC ACnetwork network 10 Converter phase reactor 0.06 p.u. X/R 10

Transformerleakage leakage reactance 0.10 p.u. Transformer reactance 0.10 p.u. +Linep.u. Total resistance ofof converter diodes Total resistance converter diodes 0.005 p.u. 0.005 phase reactor 0.06 p.u. i dc Vac Converter Converter phase reactor 0.06 p.u. Rac Lac

Vac

Lt

Ls ia

ib

ic

C

+Line

idc

Rac Lac

Lt Lt

Ls ia

ib

ic

C

Ls

C -Line

Lt Ls HVDC converter. Figure 4. VSC-based C -Line

Figure 4. VSC-based HVDC converter. Figure 4. VSC-based HVDC converter.

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5.2. Cable Model 5.2. Cable Model

The precise frequency dependent cable model cross-section is obtained from a real 230 kV XLPE Thecable precise dependent cable model cross-section obtained fromof a real 230was kV XLPE VSC-HVDC forfrequency submarine power transmission [26–29]. Theiscross-section cable calibrated VSC-HVDC cable for submarine power transmission [26–29]. The cross-section of cable was up to 300 kV. The diameter of the insulations and copper conductor and material characteristics are calibrated up to 300 kV. The diameter of the insulations and copper conductor and material based on values specified in [30]. All layers are separately illuminated with the diameters in Figure 5. characteristics are based on values specified in [30]. All layers are separately illuminated with the The sheath of the cable is5.considered to the be grounded at each cable connecting pointcable that connecting is about 900 m diameters in Figure The sheath of cable is considered to be grounded at each as presented to900 avoid voltages in the sheath during theinfaults of line-to-sheath forofequal point thatinis[31] about m asover presented in [31] to avoid over voltages the sheath during the faults ground potential. for equal ground potential. line-to-sheath Cable # 1

0 (m) [m]

1 [m]

Conductor Insulation 1 Sheath Insulation 2 Armour Insulation 3

40.0 mm 59.5 mm 64.0 mm 67.5 mm 78.3 mm 83.5 mm

Figure 5. Cable cross-sectional layout. Figure 5. Cable cross-sectional layout.

5.3. MTDC Hybrid CB Model and Its Behaviour

5.3. MTDC Hybrid CB Model and Its Behaviour

Arc quenching processes are challenging in DC systems due to the absence of natural zero

Arc quenching processesofare challenging DC systems due to the absence of natural zero crossing crossing and dissipation stored energy asincompared to AC systems. Arcless interruption of fault and dissipation of stored energy as compared to AC systems. Arcless interruption of fault currents currents is presented in [32]. Interruption time for the fault current is a big concern for MTDC networksinfor isolation of faulty parts restfault of thecurrent system. The HVDCfor circuit breaker (HCB) for is presented [32]. Interruption timefrom for the is a hybrid big concern MTDC networks is anofessential component for aofMTDC network to cope with the operation time constraints isolation faulty parts from rest the system. The hybrid HVDC circuit breaker (HCB) is[33]. an essential Figure explains the construction and control logic oftime HCBconstraints for a MTDC[33]. network. The HCB component for a6MTDC network to cope with the operation contains a load commutation switch (LCS), ultrafast mechanical disconnector (UFMD) and main Figure 6 explains the construction and control logic of HCB for a MTDC network. The HCB breaker (MB). During normal operation of the HCB, the load current flows through a nominal path contains a load commutation switch (LCS), ultrafast mechanical disconnector (UFMD) and main that comprises of LCS and UFMD. At the time of fault, the conducting current rises proportionally, breaker (MB). During normal thecurrent HCB, the load flows through a nominal path that as the fault current. A 20%operation increase inof LCS above thecurrent nominal current level triggers the fault comprises of LCS and UFMD. At the time of fault, the conducting current rises proportionally, as the mode on, and an LCS switch off signal is generated. As the LCS is turned OFF, the fault current is fault current. A 20% increase in LCS current above the nominal current level triggers the fault mode commutated to the commutation path, and UFMD disconnects one side of LCS. At the moment, the on, and an LCS switchpath off signal is generated. As the and LCSenergy is turned OFF, theis fault current is commutated commutation interrupts the fault current, of the fault absorbed by the arrestor As a result,path, the control logic can disconnect one the fault a short time period. the commutation to thebank. commutation and UFMD disconnects sidewithin of LCS. At the moment, Simulations are performed in PSCAD/EMTDC for aisfault currentby interruption sequence by a the path interrupts the fault current, and energy of the fault absorbed the arrestor bank. As result, HCB and results are discussed below. In normal operating conditions, all current flows through the the control logic can disconnect the fault within a short time period. nominal path, which has negligible on state losses. At the time of the fault, the normal current exceeds Simulations are performed in PSCAD/EMTDC for a fault current interruption sequence by the threshold limit, and the load commutation switch (LCS) triggers in 0.1 ms (magenta curve). After the HCB and results are discussed below. In normal operating conditions, all current flows through that, ultra-fast mechanical switch (UFMS) disconnects the nominal path and entire exceeded current the nominal path, which has negligible state as losses. Atin the time7.ofThe themain fault,MB theinterrupts normal the current moves towards commutation path (redoncurve) exposed Figure exceeds the threshold limit, and the load commutation switch (LCS) triggers in 0.1 ms (magenta curve). fault current in just 2 ms after the fault, and the arrestor absorbs the fault current energy (blue curve). After The that, ultra-fast mechanical switch (UFMS) the nominal path andSimilarly, entire exceeded fault current completely dies out through thedisconnects arrestor in the next few milliseconds. the current moves commutation path (red as to exposed 7. The main interrupts voltage of towards the system (light blue curve) also curve) decreases zero inin a Figure few microseconds as MB shown in Figure 7 for the voltage. The arrester has absorbed the fault current energy (magenta curve). The the fault current in just 2 ms after the fault, and the arrestor absorbs the fault current energy (blue curve). energy absorbed by the arrestor HCB is 2.85 MJ. di/dt can be reduced by milliseconds. the use of the current The fault current completely dies of out through the The arrestor in the next few Similarly, limiting reactor in series with HCB [34]. the voltage of the system (light blue curve) also decreases to zero in a few microseconds as shown in Figure 7 for the voltage. The arrester has absorbed the fault current energy (magenta curve).

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The energy absorbed by the arrestor of HCB is 2.85 MJ. The di/dt can be reduced by the use of the current limiting reactor in series with HCB [34]. Energies 2018, 11, x FOR PEER REVIEW 9 of 21 Nominal Path

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Nominal Path

UFMD

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LCS

LCS Commutation Path UFMD Commutation Path

MB MB Absorber Path

Absorber Path

Arrestor Arrestor

Figure 6. Hybrid circuit breaker model.

Figure 6. Hybrid circuit breaker model.

Current (kA)

Current (kA)

Figure 6. Hybrid circuit breaker model.

Time (ms) Time (ms)

(a)

Voltage (kV)

Voltage (kV)

(a)

Time Time (ms) (ms)

(b) (b)

Energy (kJ)

Energy (kJ)

3000 3000

Time (ms)

Time (ms)

(c)

(c)

Figure 7. Hybrid circuit breaker response during the fault interruption. (a) Fault current for nominal,

Figure 7. Hybrid circuit breaker response during the fault fault interruption. Fault current for nominal, commutation and absorber path; (b) System and breaker voltage; (c) Energy absorbed by the arrester. Figure 7. Hybrid circuit breaker response during the interruption. (a)(a) Fault current for nominal, commutation and absorber path; (b) System and breaker voltage; (c) Energy absorbed by the arrester. commutation and absorber path; (b) System and breaker voltage; (c) Energy absorbed by the arrester.

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6. Results and Discussion

6. Results and Discussion The simulation results are expressed and analyzed for four terminal MTDC network based

on VSC. In paper, different casesand areanalyzed discussed, comprise of L-G andbased L-L faults at Thethis simulation results arefault expressed for which four terminal MTDC network on different The L-L DC fault more for interrupting the MTDC as compared VSC.locations. In this paper, different fault iscases aresevere discussed, which comprise of L-G network and L-L faults at different locations. L-L DC faultthe is more severein forthe interrupting the HCB’s MTDC network compared to the L-G fault. In allThe simulations, currents DC cables, currentsasand harmonics to the L-G VSC fault.terminals In all simulations, the currents in the DC how cables, HCB’s harmonics voltage of the are inspected to understand the faultcurrents current and progresses during voltage of the VSC terminals are inspected to understand how the fault current progresses during fault conditions. Hence, these parameters are essential to implement the protection scheme. Fault fault conditions. Hence, these parameters are essential to implement the protection scheme. Fault location and clearing time are not foreseeable in large MTDC networks. Also, it is essential to check location and clearing time are not foreseeable in large MTDC networks. Also, it is essential to check the terminal voltage and power in the VSC converters, which are used to analyze the system behavior. the terminal voltage and power in the VSC converters, which are used to analyze the system behavior. Moreover, the proposed protection scheme withthe the Matlab after computing the data Moreover, the proposed protection schemeisisalso also validated validated with Matlab after computing the data fromfrom simulations. Furthermore, the impact of the key parameters for the proposed scheme is evaluated. simulations. Furthermore, the impact of the key parameters for the proposed scheme is At last, the proposed protection scheme is compared with some previously existing protection schemes. evaluated. At last, the proposed protection scheme is compared with some previously existing protection schemes.

6.1. Propagation Delay of the Cable 6.1. Propagation Delay of the Cable

Current (kA)

The significance of wave propagation delays from the fault point to the relay locations is Theinsignificance of wave propagation delays delay from the fault point the relay locations considered this section. The wave propagation is modeled bytousing a detailed DCiscable considered in this section. The wave propagation delay is modeled by using a detailed DC cable model [35]. The propagation speed is taken as the speed of light through the fiber optic (200 km/ms). model [35]. The propagation speed is taken as the speed of light through the fiber optic (200 km/ms). A L-G fault at t = 1.0 s is incepted in the middle of L3, and the length of the line is 400 km. Propagation A L-G fault at t = 1.0 s is incepted in the middle of L3, and the length of the line is 400 km. Propagation delay in the MTDC network is verified in Figure 8. The fault surge should arrive after 1 ms time delay delay in the MTDC network is verified in Figure 8. The fault surge should arrive after 1 ms time delay at each terminal. If isIf the fault current pointIIf3f3and andIf4Iare currents at VSC3 the VSC3 f4 are at each terminal. is the fault currentatatthe the fault fault point thethe currents at the and and VSC4VSC4 terminals respectively. TheThe fault surge arrived after11ms mstime timedelay delay terminals respectively. fault surge arrivedatatterminal terminal 33 and and 44 after asas cancan be seen be in Figure Consideration of timeofdelay is an essential aspect in designing the the protection scheme seen in 8. Figure 8. Consideration time delay is an essential aspect in designing protection of MTDC network. scheme of MTDC network.

Time (s)

Figure8.8.Propagation Propagation delay length. Figure delaydue duetotoline line length.

6.2. L-G Fault Without Protection Topology

6.2. L-G Fault Without Protection Topology

Analysis of a fault without any protection scheme is motivating to evaluate the fault behavior in Analysis of Ita isfault without anythe protection scheme to evaluate the for fault behavior the network. interesting to find fault current valuesistomotivating design the protection scheme MTDC in thenetworks. network. It is interesting toisfind the fault to design the protection scheme for Therefore, a L-G fault analyzed at thecurrent center ofvalues L3 to examine the system voltage, power, MTDC networks. a L-G fault analyzed the center of L3 to9–12. examine the system voltage, currents in the Therefore, circuit breakers (CB) andisdc cables asat expressed in Figures A fault is incepted at power, currents in the circuit breakers (CB) and dc cables as expressed in Figures 9–12. A fault is t = 1.0 s as can be seen in the results. Figure 9 depicts the terminal voltage and power of the system. At the of the voltages drop according to the the distance from voltage the faultand location. incepted attime t = 1.0 s asfault, can all be terminal seen in the results. Figure 9 depicts terminal power of Since Vdc3 andtime Vdc4 more of voltages the nearest location. However, drops greatly the system. At the ofeffects the fault, allbecause terminal drop according to theVdc4 distance from the fault because of the single source at terminal 4 as compared to the terminal 3. Moreover, the power location. Since Vdc3 and Vdc4 effects more because of the nearest location. However, Vdc4atdrops terminal 3 rise more because of the nearest location to the fault and also due to the infeed of terminal greatly because of the single source at terminal 4 as compared to the terminal 3. Moreover, the power at 1 and 2. The findings of the DC current have shown that the capacitors at VSC’s discharge quickly terminal 3 rise more because of the nearest location to the fault and also due to the infeed of terminal 1 and will cause the transient for a very short time during the first peak. After words, the ac infeed and 2. Thetofindings of the DC current shown that the at ac VSC’s discharge quickly starts feed the fault current as the dchave voltage level below the capacitors voltage of the side of the terminal

and will cause the transient for a very short time during the first peak. After words, the ac infeed starts to feed the fault current as the dc voltage level below the voltage of the ac side of the terminal and freewheeling diodes become conducting. Meanwhile, it also charges the dc capacitors. The dc

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Energiesperiodically 2018, 11, x FOR PEER REVIEW 11 of 21 capacitors charged and discharged during the fault time. The downfall current shows and freewheeling diodes become conducting. Meanwhile, it also charges the dc capacitors. The dc the charging of capacitances. The fault and pre-fault currents in the HCB’s is expressed in Figure 11. Energies 2018, 11, x FOR PEER REVIEW 11 of 21 capacitors periodically charged and dischargedMeanwhile, during the itfault Thethe downfall current The shows and freewheeling diodes become conducting. alsotime. charges dc capacitors. dc The initial transient fault currents to 1–2 p.u. with a time ofis70–80 ms depending the charging of capacitances. Thedrop fault and pre-fault currents in constant the HCB’s expressed in Figure 11.upon capacitors periodically charged discharged during theitfault time. Thethe downfall current shows and freewheeling diodes becomeand conducting. Meanwhile, also charges dc capacitors. The dc the location. Figure 12 expressed the 12th harmonic voltages for different faults. In the top Figure, The initial transient fault currents drop and to 1–2 p.u with a time in constant of 70–80 ms depending upon the charging of capacitances. The fault pre-fault currents HCB’s expressed in Figure 11. capacitors periodically charged and discharged during the faultthe time. Theisdownfall current shows the fault occurs in the middle of the line, and the harmonics are above the threshold limit, and it arrived the location. Figure 12 expressed the 12thtoharmonic voltages forconstant differentoffaults. In the top Figure, the Thecharging initial transient fault currents drop p.u with a time 70–80 ms depending upon the of capacitances. The fault and1–2 pre-fault currents in the HCB’s is expressed in Figure 11. at T-3fault and T-4 atin the time. In line, the middle Figure, theare fault is near tofaults. the T-3. Since the harmonics occurs thesame middle of the and harmonic the harmonics above the threshold limit, andFigure, it arrived the location. Figure 12 expressed the 12th voltages for different In the top the The initial transient fault currents drop to 1–2 p.u with a time constant of 70–80 ms depending upon at T-3occurs and T-4 at the same time. In the and middle Figure, the are fault is near tothreshold the T-3. Since the harmonics at T-3the (red curve) arrived earlier then T-4 (blue curve). Likewise in the bottom Figure, the fault is fault in the middle of the line, the harmonics above the limit, and it arrived location. Figure 12 expressed the 12th harmonic voltages for different faults. In the top Figure, the at T-3 (red curve) arrived earlier then T-4 (blue curve). Likewise in the bottom Figure, the fault is near at T-3 and T-4 at the same time. In the middle Figure, the fault is near to the T-3. Since the harmonics near fault to the T-4. inThe T-4and (blue arrived earlier T-3 (red In normal occurs the harmonics middle of theatline, thecurve) harmonics are above the then threshold limit,curve). and it arrived to the harmonics at T-4 (blue curve) arrived earlier T-3 (red curve). Inexceeds normalfault condition, at T-3 T-3 T-4. (red curve) arrived then (blue curve). Likewise the bottom Figure, near condition, the The p.u. areIn zero, and at the time ofthen the fault, its theisthreshold at and T-4 atharmonics the same earlier time. theT-4 middle Figure, the fault isin near to thevalue T-3. Sincethe the harmonics the p.u. harmonics are zero, and at the time of the fault, its value exceeds the threshold value. As a toT-3 the (red The harmonics at T-4 (blue curve) arrived T-3 curve). In normal condition, value. As aT-4. result, it arrived is concluded thatT-4 whenever theearlier faultthen occurs and the Figure, parameters of isthe system at curve) earlier then (blue curve). Likewise in the(red bottom the fault near result, it is concluded that whenever the fault occurs and the parameters of the system cross the thethe harmonics are zero, and at the timearrived of the fault, value the threshold As a T-4. The harmonics at T-4 (blue curve) earlier T-3exceeds (red curve). In normalvalue. condition, crossto thep.u. boundary values, the protection scheme must beitsthen operated properly.

300

(MW) PowerPower Power (MW)(MW)

(kV) Voltage Voltage (kV) (kV) Voltage

boundary the protection scheme must beoccurs operated properly. result, isvalues, concluded that whenever the parameters ofthreshold the system crossAsthe the p.u.itharmonics are zero, and at the the timefault of the fault,and its value exceeds the value. a boundary values, the protection scheme must be operated properly. result, it is concluded that whenever the fault occurs and the parameters of the system cross the boundary values, the protection scheme must be operated properly. 300 250 300 250 200 250 200



150 200 150

Time (s)

150

(a) Time (s)



Time (s) −

(b)Time (s)

(a) network without protection topology (a) Terminal voltages; (b) (b) system power. Figure 9. L-G fault in MTDC Time (s) Time (s) Figure 9. L-G fault in MTDC network without protection topology (a) Terminal voltages; (b) system power. (a) network without protection topology (a) Terminal voltages; (b) Figure 9. L-G fault in MTDC (b) system power.

(kA) Current Current (kA) (kA) Current

(kA) Current Current (kA) (kA) Current

Figure 9. L-G fault in MTDC network without protection topology (a) Terminal voltages; (b) system power.

−1

−1

−1 −1

−1

Time (s)

Time (s) −1

(a) (s) Time

(b) Time (s)

(a) (s) Figure 10. Fault current L-G fault in DC lines. (a) DC current in line 1(b) and(s) 2; (b) DC current in Timeduring Time line 3 and (a)during L-G fault in DC lines. (a) DC current in line (b) Figure 10.4. Fault current 1 and 2; (b) DC current in

Figure 10.3 and Fault line 4. current during L-G fault in DC lines. (a) DC current in line 1 and 2; (b) DC current in Figure 10. Fault current during L-G fault in DC lines. (a) DC current in line 1 and 2; (b) DC current in line 3 and 4. (kA) Current Current (kA)(kA) Current

line 3 and 4.

−0.5 −0.5 −1 −0.5 −1 −1.5 −1 −1.5

Time (s)

−1.5

(a) Time (s) (a) Time (s) (a)

Figure 11. Cont.

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Figure 11. Cont.

Current (kA) (kA) Current

Figure 11. Cont.

−1 −1 −2 −3 −2 −3 Time (s)

(b)Time (s)

Current (kA)(kA) Current

(b)

−1 −1

Time (s) Time (s) (c)

(c)(a) Current in HCB12 and HCB21; (b) Current in Figure 11. Fault current during L-G fault in HCBs. Figure 11. Fault current during L-G fault in HCBs. (a) Current in HCB12 and HCB21; (b) Current in HCB13 and HCB31; (c) Current in HCB34 and HCB43. Figure 11. Fault current during L-G fault in HCBs. (a) Current in HCB12 and HCB21; (b) Current in HCB13 and HCB31; (c) Current in HCB34 and HCB43. Voltage Harmonic (p.u.)(p.u.) Voltage Harmonic

HCB13 and HCB31; (c) Current in HCB34 and HCB43. 0.06 0.06 0.04

0.04 0.02 0.02 0 0

(p.u.) Voltage Harmonic (p.u.) Voltage Harmonic

Time (s)

0.06

(a) Time (s) (a)

0.06 0.04 0.04 0.02 0.02 0 0 Time (s)

(b) Time (s) (b)

Figure 12. Cont.

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Harmonic Voltage (p.u.)

Figure 12. Cont.

0.03 0.02 0.01 0

Time (s)

(c) Figure 12. Harmonic Voltage during a fault (a) L-G fault in the middle of the cable; (b) L-G fault near

Figure 12. Harmonic Voltage during a fault (a) L-G fault in the middle of the cable; (b) L-G fault near T-3; (c) L-L fault near T-4. T-3; (c) L-L fault near T-4. 6.3. Different Fault Cases to Analyze the Proposed Scheme

6.3. Different Fault Cases to Analyze the Proposed Scheme

To assess the suggested protection scheme performance of MTDC network, different fault cases

areassess analyzed. possible conditions discussed and described in Tablenetwork, 2. To theAll suggested protectionare scheme performance of MTDC different fault cases are analyzed. All possible conditions are discussed and described in Table 2. Table 2. Different fault cases for MTDC network.

Fault Case

Fault Name Table 2. Different fault cases forDescription MTDC network. L-G fault at the centre of DC line 3. I F1 HCB34 and HCB43 should open. Fault Case Fault Name Description L-G fault of line 3, 100 km from terminal 4. II F2 L-G fault should at the centre of DCthan lineHCB34. 3. HCB34 and HCB43 open earlier I F1 HCB43 should open. L-L fault at line 3 near terminal 4. III F3 L-G fault of line 3, 100 km from terminal 4. HCB43 II F2 HCB43 and HCB34 should open, and voltage should drop to zero.

should open earlier than HCB34. L-L fault at line 3 near terminal 4. HCB43 and HCB34 6.3.1. Case I III F3 should open, and voltage should drop to zero. A L-G fault F1 is simulated at the center of line 3 to assess the performance of the proposed 6.3.1.technique, Case I and the fault occurs at t = 1.0 s. At the time of the fault, the current in the lines showed an abrupt change. This abrupt change has been identified by the CDWM and verified with the harmonics of the as explained Section 4 to Thethe proposed method has analyzed A L-Gsystem fault voltage F1 is simulated at in the center ofdetect line 3thetofault. assess performance of the proposed the fault location according and sent a trip to HCB34 curve) an technique, and the fault occurstoatthe t =protection 1.0 s. At technique the time of the fault, thesignal current in the (black lines showed and HCB43 This (green curve)change at 3 ms has afterbeen the fault to disconnect faulty and part verified as seen inwith Figure The abrupt change. abrupt identified by thethe CDWM the13. harmonics HCBs take 7 ms to completely break the circuit as observed in the HCB modeling. Afterward, the faulty of the system voltage as explained in Section 4 to detect the fault. The proposed method has analyzed part fully disconnects from the healthy network, and the remaining part becomes stable as shown in the fault location according to the protection technique and sent a trip signal to HCB34 (black curve) Figures 14–16. Since before the fault, the voltage is stable to its rated values as can be seen in Figure 14. and HCB43 (green curve) at 3 ms after the fault to disconnect the faulty part as seen in Figure 13. During the fault, the Vdc3 and Vdc4 get affected as they are nearest to the fault location. After clearing The HCBs take 7 ms to completely break the circuit as observed in the HCB modeling. Afterward, the fault by the HCB34 and HCB43, the faulted terminals are disconnected, and the voltage becomes the faulty part fullyrest disconnects from the healthy network,Figure and the remaining becomesofstable zero. Therefore, of the system becomes stable. Similarly, 15 expresses thepart DC currents the as shown in Figures 14–16. before the voltage system. Idc3 and Idc4 Since are tripped bythe thefault, respective breakers.is stable to its rated values as can be seen in

Figure 14. During the fault, the Vdc3 and Vdc4 get affected as they are nearest to the fault location. After clearing the fault by the HCB34 and HCB43, the faulted terminals are disconnected, and the voltage becomes zero. Therefore, rest of the system becomes stable. Similarly, Figure 15 expresses the DC currents of the system. Idc3 and Idc4 are tripped by the respective breakers.

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Signals Signals Trip Signals TripTrip Signals Trip

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0.2 −−0.2 0.2 −−0.2

Time (s) (s) Time Time (s) Timefor (s)HCBs Figure 13. 13. The The trip trip signal signal for HCBs in in case case I.I. Figure Figure 13. The trip signal for HCBs in case I.

Voltage (kV) Voltage (kV)(kV) Voltage (kV) Voltage

(MW) Power (MW) Power (MW) Power (MW) Power

Figure 13. 13. The The trip trip signal signal for for HCBs HCBs in in case case I.I. Figure

−100 −100

Time(s) (s) Time

−100 −100

Time(s) (s) Time

(a)Time (b) Time (s) Time (s) (s) (a) (b) Time (s) (a) (a) (b) Figure 14. 14. L-G L-G fault fault at at the the center center of of line line 33 in in MTDC MTDC network network (a) (a) Terminal Terminal voltages; voltages; (b) (b) system system Figure power. 14. L-G fault at the center of line 3 in MTDC network (a) Terminal voltages; (b) system power. Figure Figure 14. L-G fault at the center of line 3 in MTDC network (a) Terminal voltages; (b) system

Figure 14. L-G fault at the center of line 3 in MTDC network (a) Terminal voltages; (b) system power. power.

−0.5 −0.5 −0.5−0.5

Current (kA)(kA) Current (kA) Current

Current (kA)

Current (kA)(kA) Current (kA) Current

Current (kA)

power.

Time (s) (s) Time TimeTime (s) (s)

TimeTime (s) (s) Time (s)

(a) (a) (a)

(b)(b) (b) Time (s)

Figure 15. 15. Fault Fault current current(a) in DC DC lines lines for case case I.I. (a) (a) DC DC current current in in line line 11 and and 2; (b) (b)(b) DC current current in line line 33 Figure in DC Figure 15. Fault current in DC lines forfor case I. (a) DC current in line 1 and 2;2;(b) DC current ininline 3 and 4.

Current (kA) Current (kA)(kA) Current

and 4. 4. 15. Fault current in DC lines for case I. (a) DC current in line 1 and 2; (b) DC current in line 3 and Figure and 4.

0.5 0.5 0.5 00 0

−0.5 −0.5 −0.5 −1 −1 −1

Time (s) (s) Time (a)Time (s) (a) (a) Figure 16. Cont.

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Figure 16. Cont.

3

Figure 16. Cont.

(kA) (kA) CurrentCurrent

2 3 1 2 0 1 −1 0 −2 −1 −3 −2

1.00

−3 1.00

2.5

(b) 1.01 1.02 Time (s)

1.03 1.03

(b)

(kA) (kA) Current Current

2 2.5 1.5 2 1 1.5 0.5 1 0 0.5 −0.5 0

1.01 1.02 Time (s)

1.00

1.01 1.02 1.03 Time (s) −0.5 (c) 1.00 1.01 1.02 1.03 Time (s) Figure 16. Fault current in HCBs for the case I. (a) Current in HCB12 and HCB21; (b) Current in HCB13 Figure 16. Fault current in HCBs for the case I. (a)(c) Current in HCB12 and HCB21; (b) Current in HCB13 and HCB31; (c) Current in HCB34 and HCB43.

and HCB31; Current ininHCB34 and Figure 16.(c) Fault current HCBs for theHCB43. case I. (a) Current in HCB12 and HCB21; (b) Current in HCB13 6.3.2.and Case II (c) Current in HCB34 and HCB43. HCB31;

6.3.2. Case II

Trip Signals Trip Signals

L-GIIfault F2 is simulated at an unequal distance on line 3 as it can be seen in Figure 3. The 6.3.2. A Case A L-G fault F2 at an unequal distance on line 3 as 3. it can in Figure 3.delay, The fault fault location is is 100simulated km from terminal 4 and 300 km from terminal Due be to seen the propagation location is 100 km from terminal 4 and 300 km from terminal 3. Due to the propagation delay, A L-G fault F2 is simulated at an unequal distance on line 3 as it can be seen in Figure 3. The the the effect of fault propagates at terminal 4 earlier than terminal 3. Therefore, a trip signal is received location is 100 kmatfrom terminal 4 and(black 300 km fromasterminal 3. Due the17 propagation delay, earlier at HCB43 (green curve) than4 HCB34 curve) displayed in Figure afteris verifying the effectfault of fault propagates terminal earlier than terminal 3. Therefore, atotrip signal received earlier the effect fault propagates at terminal 4 earlier terminalpart 3. in Therefore, a depicted trip signal received fault. Theoffault currents, and powers of than the have been17 inisFigure 18. fault. at HCB43 (green curve) thanvoltages HCB34 (black curve) as effected displayed Figure after verifying the earlier at HCB43 (green curve) than HCB34 (black curve) as indepicted Figure after verifying the effect The effect of fault current at terminal 4 has arrived just in displayed 0.5 msbeen (blue curve).17Moreover, the The fault The fault currents, voltages and powers of the effected part have in Figure 18. fault. The fault currents, voltages and apowers of1the effected part have been depicted in Figure 18. current at terminal 3 has arrived with delay of ms (red curve). of fault current at terminal 4 has arrived just in 0.5 ms (blue curve). Moreover, the fault current at The effect of fault current at terminal 4 has arrived just in 0.5 ms (blue curve). Moreover, the fault terminal 3 has arrived with a delay of 1 ms (red curve). current at terminal 3 has arrived with a delay of 1 ms (red curve).

−0.2

−0.2

Time (s)

Figure 17. The trip signal for HCBs in case II. Time (s) Figure 17. The trip signal for HCBs in case II.

Figure 17. The trip signal for HCBs in case II.

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Current (kA)

10

5

0 1.00

1.01

1.02 Time (s)

1.03

Voltage (kV)

(a)

Power (MW)

Time (s) (b)

Time (s)

(c) Figure 18. System response during L-G fault on line 3, 100 km from terminal 4 (a) Fault current; (b)

Figure 18. System terminal voltage;response (c) systemduring power. L-G fault on line 3, 100 km from terminal 4 (a) Fault current; (b) terminal voltage; (c) system power. The proposed method has tripped HCB34 and HCB43 to disconnect the faulty part with the same sequence of the protection scheme. Currents, voltages, and powers of the effected part become The proposed method has tripped HCB34 and HCB43 to disconnect the faulty part with the same zero after clearing the fault and remaining part becomes stable.

sequence of the protection scheme. Currents, voltages, and powers of the effected part become zero after 6.3.3. clearing Casethe III fault and remaining part becomes stable. L-L fault F3 is simulated near the terminal 4 as can be seen in Figure 3. The L-L fault is the 6.3.3. CaseA III most severe case for the interruption in the MTDC network. The current rises multiple times, and the

A L-L fault simulated near the terminal as can be seen in Figure 3. The L-L fault voltage dropsF3toiszero as shown in Figure 19. After4 identifying the aforementioned changes in theis the most current, severe case for the interruption in the MTDC network. The current rises multiple times, and harmonics voltages of the system. The proposed scheme successfully trips HCB43 and and HCB34 drops withouttophysical among terminals and also the nature changes of L-L in the voltage zero ascommunication shown in Figure 19. the After identifying theclassifies aforementioned fault with theharmonics post-fault analysis. the current, and voltages of the system. The proposed scheme successfully trips HCB43 and HCB34 without physical communication among the terminals and also classifies the nature of L-L fault with the post-fault analysis.

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Current (kA)

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Time (s)

Voltage (kV)

(a)

1.00

1.01

1.02

1.03

Power (MW)

Time (s) (b)

Time (s)

(c) Figure 19. System response during L-L fault on line 3 near terminal 4 (a) Fault current; (b) terminal

Figure 19. System response voltage; (c) system power.during L-L fault on line 3 near terminal 4 (a) Fault current; (b) terminal voltage; (c) system power. 6.4. Validation of Protection Scheme with Matlab

6.4. Validation of Protection Scheme with Matlab The proposed protection scheme performance is tested and verified under different fault conditions by using Matlab after computing the data from simulations. 20 shows different fault The proposed protection scheme performance is tested and Figure verified underthe different fault conditions from fault A to fault F, and Table 3 express the output results. Results show thatdifferent the conditions by using Matlab after computing the data from simulations. Figure 20 shows the harmonics of the voltage are above the set value of the fault detection criteria and it has successfully fault conditions from fault A to fault F, and Table 3 express the output results. Results show that the detected the fault for all cases and generated the trip signal for the closest circuit breaker from the harmonics of the voltage are above the set value of the fault detection criteria and it has successfully fault point. Meanwhile, fault classification has been achieved by the use of post-fault analysis with detected the fault for cases and generated the trip signal for scheme the closest circuit breaker communication. Thealloutcomes prove that the proposed protection is promising for VSC-from the fault point. Meanwhile, fault classification has been achieved by the use of post-fault analysis MTDC network. with communication. The outcomes prove that the proposed protection scheme is promising for VSC-MTDC network.

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HCB12

HCB13

L1

HCB21

E

C

B

HCB31

F HCB43

D

L3

HCB34

A

Figure 20. Different fault condition for the validation of proposed scheme.

Figure 20. Different fault condition for the validation of proposed scheme. Table 3. Performance of the proposed protection scheme for different fault conditions.

Table 3. Performance of the proposed protection scheme for different fault conditions. Fault Name A B C

Fault Name VAmnH (p.u.) B C 0.066 D 0.075 E 0.138 F

VmnH VnmH (p.u.) (p.u.) 0.066 VnmH 0.043 0.075 (p.u.) 0.068 0.138 0.043 0.099 0.026 0.022 0.068 0.044 0.021 0.049 0.099 0.039

Trip Classification Vmn Vnm (kV) (kV) Signal Result Classification V4 V = 157.37 V3 = 249.99 HCB34, HCB43 L-G Vnm (kV) Trip Signal Fault mn (kV) Result V1 = 154.43 V3 = 182.43 HCB13, HCB31 L-G Fault V1V4 = 139.35 HCB12, HCB21 L-G Fault L-G Fault = 157.37V2 = 151.21 V3 = 249.99 HCB34, HCB43 V4 = 0 V3 = 193.77 HCB43, HCB34 L-L Fault V1 = 154.43 V3 = 182.43 HCB13, HCB31 L-G Fault V2 = 0 V1 = 151.23 HCB21, HCB12 L-L Fault V1 V2 = 151.21 HCB12, HCB21 V3 = = 0139.35V1 = 67.37 HCB31, HCB13 L-L Fault L-G Fault

D 0.026 0.022 V4 = 0 V3 = 193.77 HCB43, HCB34 L-L Fault 6.5. Impact Analysis of Different Key Parameters on the Proposed Scheme E 0.044 0.021 V2 = 0 V1 = 151.23 HCB21, HCB12 L-L Fault DC capacitors and surrounding feeder cable capacitances are dominant elements for the first F 0.049 0.039 V3 = 0 V1 = 67.37 HCB31, HCB13 L-L Fault few microseconds, whenever a fault occurs. Subsequently, the capacitive discharges die out in a short time interval with higher di/dt values. Afterward, the infeed of the AC is the main contributor to the 6.5. Impact Analysis of Different Key Parameters on the Proposed Scheme fault current, and it also charges the capacitive components periodically. This capacitive charge is discharged through fault resistance. Fault resistance, DC capacitance, and surrounding feeder length DC capacitors and surrounding feeder cable capacitances are dominant elements for the first few mainly affect the fault currents and terminal voltages. Hence, these are the key parameters that microseconds, whenever a fault occurs. Subsequently, the capacitive discharges die out in a short mainly affect the proposed scheme and detailed simulation results expressed in Table 4. time interval higher di/dt values. the Afterward, the current; infeed of AC is the main contributor Faultwith resistance value influences value of fault CBthe current and terminal voltage drop.to the fault Simulation current, and it also charges the capacitive components periodically. This capacitive is results have illustrated the dependence of fault resistance to the proposed scheme. charge Size discharged through fault resistance. Fault resistance, DC capacitance, and surrounding feeder length of fault resistance has been varied from 0.01 Ω to 200 Ω, keeping all other parameters constant. Results mainly affecta the faultin currents and terminal voltages. Hence, the keyvalue parameters that mainly proved decrease the value of fault current and voltage dropthese with are increasing of fault resistor. 200 Ω fault resistance, faultdetailed current reduced less than 1 kA, and voltage drop was affectAt the proposed scheme and simulation results expressed in Table 4. also negligible. thevalue valueinfluences of the DC the capacitor affects the value the fault CBvoltage current,drop. FaultSimilarly, resistance valuealso of fault current; CB of current andcurrent, terminal and terminal voltage drop. The results of simulations have explained its dependence on the DC Simulation results have illustrated the dependence of fault resistance to the proposed scheme. Size of capacitance. Size of DC capacitor has been varied from 35 μF to 1000μF , and all the other

fault resistance has been varied from 0.01 Ω to 200 Ω, keeping all other parameters constant. Results constraints are kept constant. Results proved that decrement in the value of voltage drop and fault proved a decrease in the value of fault current and voltage drop with increasing value of fault resistor. current was associated with incremental DC capacitance values. More substantial value of capacitor At 200 Ω fault resistance, fault current reduced less than 1 kA, and voltage drop was also negligible. size stabilized the terminal voltage. Similarly, the value of the DC capacitor also affects the value of the fault current, CB current, Surrounding cable length has less influence on the fault current and voltage drop due to its and terminal voltage The results The of simulations have explained dependence on the DC capacitance. Hence drop. it cannot be ignored. value of surrounding cable L2 its affected the fault current capacitance. Size of DC capacitor has been varied from 35 µF to 1000µF, and all the other constraints and terminal voltage drop. Results illustrate the dependence of fault current and voltage drop on the are kept constant. Results proved that in varied the value voltage dropkm and fault all current length of the conductor. The length of decrement cable has been fromof 100 km to 1000 keeping other was parameters constant. TheDC results have proven that the substantial value of fault current and voltage drop associated with incremental capacitance values. More value of capacitor size stabilized increasesvoltage. with the increase of surrounding cable length. The surrounding cable length does not affect the terminal much and has the dominating effect of influence dischargingon cable first current few milliseconds. Increase in due cableto its Surrounding cable length has less theinfault and voltage drop length can also increase the time delay of contribution from rest of the system that is connected to the capacitance. Hence it cannot be ignored. The value of surrounding cable L2 affected the fault current cable. and terminal voltage drop. Results illustrate the dependence of fault current and voltage drop on the length of the conductor. The length of cable has been varied from 100 km to 1000 km keeping all other parameters constant. The results have proven that the value of fault current and voltage drop increases

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with the increase of surrounding cable length. The surrounding cable length does not affect much and has the dominating effect of discharging cable in first few milliseconds. Increase in cable length can also increase the time delay of contribution from rest of the system that is connected to the cable. Table 4. Influence of the key parameters for the proposed protection scheme. Key Parameter

Parameter Values Ω/µF/km

IF (kA)

VmnH (p.u.)

VnmH (p.u.)

Vmn (kV)

Vnm (kV)

Influence of Fault Resistance

0.01 1.00 10.0 100.0 200.0

15.22 13.63 7.63 1.38 0.72

0.066 0.068 0.053 0.027 0.015

0.049 0.046 0.038 0.022 0.011

160.73 171.83 220.09 266.14 274.62

257.13 254.99 272.45 291.65 294.53

Influence of DC Capacitance

35 100 250 500 1000

15.22 13.30 10.60 8.38 5.78

0.066 0.0438 0.064 0.0298 0.0170

0.049 0.0317 0.027 0.031 0.0196

160.73 209.86 257.94 281.49 293.35

257.13 261.15 277.85 288.48 294.57

Influence of Surrounding Feeder Length

100 250 500 1000

15.22 15.27 15.90 16.11

0.066 0.089 0.071 0.070

0.049 0.038 0.039 0.040

160.73 160.17 159.08 158.81

257.13 254.71 251.69 250.19

6.6. Comparative Analysis The proposed protection scheme is compared with some state-of-the-art techniques. DC fault ride through the scheme is expressed in [36], which is based on the differential current technique, and need physical communication for operating the protection scheme. The proposed scheme does not require any communication time delay, as no communication is required for obtaining current signals from both ends. In short, the operating time of CDWM is much rapid as compared to the existing schemes, and it is based on current as well as voltage to enhance the reliability of the system. The analytical formulas for the calculation of fault current are proposed in [37]. Hence, it is only valid for the L-G fault and discusses the dominating period of the ac infeed only. On the other hand, the proposed scheme is equally viable for both L-G and L-L faults, as shown in Table 3. The single-ended differential protection scheme is a reliable competitor for protection of MTDC by using multipoint optical current computing sensors across the intact length of transmission lines [12]. It uses a differential current method by utilizing the predefined threshold values. However, in case of sudden changes in the load current, the predefined threshold values are not valid. Moreover, the only current signal is used for fault detection. Likewise, multiple sensors are installed along the transmission line that may become less efficient or defective with the passage of time. As a result, it effects the performance of overall system. The other downsides of this technique are heavy capital and maintenance cost of the optical sensors as well as fiber optic cable. As compared to it, the proposed scheme doesn’t need any communication for measuring the differential current, it is not only based on the current signal to enhance the reliability of the system, there is no heavy cost in executing the proposed scheme. 7. Conclusions This paper proposes a fault detection scheme based on CDWM for the protection of MTDC networks connected to large-scale renewable energy sources. It is found that the proposed protection scheme can correctly recognize and precisely identify a fault and its location with CDWM and the harmonics of the system voltage without communication. It offers significant fault clearing time by the use of hybrid CB with high reliability for the MTDC network. The proposed scheme can categorize the nature of faults in a way that is equally viable for all kinds of faults. Comprehensive simulation results validate the performance of our proposed scheme for four terminal MTDC networks with different fault scenarios. The results show the adequate isolation of the faulty parts and concurrent

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stabilization of the rest of the system. The outcomes are also verified with Matlab to recheck the results. Moreover, the impact of key parameters is taken into account at different values to examine the proposed protection scheme under different parameters. Author Contributions: All authors contributed to this work. M.H.N. researched the fault analysis theories, fault identification principle and drafted the article. X.Z. provided the results of the simulation. Valuable comments on the first draft were received from N.T. and M. G. were involved in revising the final manuscript. Acknowledgments: This work was partially supported by Shanghai Rising-Star Program (18QA1402100), National Key Research and Development Program of China (2016YFB0900601) and National Natural Science Foundation of China (51407115, 51377104). Conflicts of Interest: The authors declare no conflict of interest.

References 1. 2.

3. 4.

5.

6. 7. 8. 9. 10. 11.

12.

13. 14. 15. 16. 17.

Franck, C.M. HVDC circuit breakers: A review identifying future research needs. IEEE Trans. Power Deliv. 2011, 26, 998–1007. [CrossRef] Merlin, M.M.C.; Green, T.C.; Mitcheson, P.D.; Trainer, D.R.; Critchley, D.R.; Crookes, R.W. A new hybrid multi-level voltage-source converter with dc fault blocking capability. In Proceedings of the 9th IET International Conference on AC and DC Power Transmission, London, UK, 19–21 October 2010. Chen, Y.; Liu, X.; Sheng, J.; Cai, L.; Jin, Z.; Gu, J.; An, Z.; Yang, X.; Hong, Z. Design and application of a superconducting fault current limiter in DC systems. IEEE Trans. Appl. Supercond. 2014, 24, 1–5. [CrossRef] Mokhberdoran, A.; Carvalho, A.; Silva, N.; Leite, H. Antonio Carrapatoso. Application study of superconducting fault current limiters in meshed HVDC grids protected by fast protection relays. Electr. Power Syst. Res. 2017, 143, 292–302. [CrossRef] Tahata, K.; El Oukaili, S.; Kamei, K.; Yoshida, D.; Kono, Y.; Yamamoto, R.; Ito, H. HVDC circuit breakers for HVDC grid applications. In Proceedings of the 11th IET International Conference on AC and DC Power Transmission, Birmingham, UK, 10–12 February 2015. Descloux, J.; Raison, B.; Curis, J.-B. Protection strategy for undersea MTDC grids. In Proceedings of the PowerTech (POWERTECH), Grenoble, France, 16–20 June 2013. Van Hertem, D.; Ghandhari, M. Multi-terminal VSC HVDC for the European super grid: Obstacles. Renew. Sustain. Energy Rev. 2010, 14, 3156–3163. [CrossRef] Baran, M.E.; Mahajan, N.R. Overcurrent protection on voltage source-converter-based multiterminal DC distribution systems. IEEE Trans. Power Deliv. 2007, 22, 406–412. [CrossRef] Sneath, J.; Rajapakse, A.D. Fault detection and interruption in an earthed HVDC grid using ROCOV and hybrid DC breakers. IEEE Trans. Power Deliv. 2016, 31, 973–981. [CrossRef] Wentao, H.; Tai, N.; Zheng, X.; Fan, C.; Yang, X.; Kirby, B.J. An impedance protection scheme for feeders of active distribution networks. IEEE Trans. Power Deliv. 2014, 29, 1591–1602. Zheng, X.; Tai, N.; Thorp, J.S.; Xia, Y. Improved differential protection scheme for long distance UHVDC transmission line. In Proceedings of the IEEE PES General Meeting Conference & Exposition, National Harbor, MD, USA, 27–31 July 2014. Tzelepis, D.; Dy´sko, A.; Fusiek, G.; Nelson, J.; Niewczas, P.; Vozikis, D.; Orr, P.; Gordon, N.; Booth, C.D. Single-ended differential protection in mtdc networks using optical sensors. IEEE Trans. Power Deliv. 2017, 32, 1605–1615. [CrossRef] Azizi, S.; Afsharnia, S.; Sanaye-Pasand, M. Fault location on multi-terminal DC systems using synchronized current measurements. Int. J. Electr. Power Energy Syst. 2014, 63, 779–786. [CrossRef] Abu-Elanien, A.E.B.; Abdel-Khalik, A.S.; Massoud, A.M.; Ahmed, S. A non-communication based protection algorithm for multi-terminal HVDC grids. Electr. Power Syst. Res. 2017, 144, 41–51. [CrossRef] Yeap, Y.M.; Geddada, N.; Ukil, A. Analysis and validation of wavelet transform based DC fault detection in HVDC system. Appl. Soft Comput. 2017, 61, 17–29. [CrossRef] Abu-Elanien, A.E.B.; Elserougi, A.A.; Abdel-Khalik, A.S.; Massoud, A.M.; Ahmed, S. A differential protection technique for multi-terminal HVDC. Electr. Power Syst. Res. 2016, 130, 78–88. [CrossRef] Zheng, X.; Tai, N.; Yang, G.; Ding, H. A transient protection scheme for HVDC transmission line. IEEE Trans. Power Deliv. 2012, 27, 718–724. [CrossRef]

Energies 2018, 11, 1086

18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28.

29. 30. 31.

32. 33.

34.

35. 36. 37.

21 of 21

Cheng, J.; Guan, M.; Tang, L.; Huang, H. A fault location criterion for MTDC transmission lines using transient current characteristics. Int. J. Electr. Power Energy Syst. 2014, 61, 647–655. [CrossRef] Zheng, X.; Tai, N.; Wu, Z.; Thorp, J.S. Harmonic current protection scheme for voltage source converter-based high-voltage direct current transmission system. IET Gener. Transm. Distrib. 2014, 8, 1509–1515. [CrossRef] Zheng, X.; Tai, N.; Thorp, J.S. A transient harmonic current protection scheme for HVDC transmission line. IEEE Trans. Power Deliv. 2012, 27, 2278–2285. [CrossRef] Liu, J.; Nengling, T.; Fan, C.; Huang, W. Protection scheme for high-voltage direct-current transmission lines based on transient AC current. IET Gen. Transm. Distrib. 2015, 9, 2633–2643. [CrossRef] Le Blond, S.; Bertho, R.; Coury, D.V.; Vieira, J.C.M. Design of protection schemes for multi-terminal HVDC systems. Renew. Sustain. Energy Rev. 2016, 56, 965–974. [CrossRef] Tahir, S.; Wang, J.; Baloch, M.H.; Kaloi, G.S. Digital Control Techniques Based on Voltage Source Inverters in Renewable Energy Applications: A Review. Electronics 2018, 7, 18. [CrossRef] Soares, A.J.; Schroeder, M.A.O.; Visacro, S. Transient voltages in transmission lines caused by direct lightning strikes. IEEE Trans. Power Deliv. 2005, 20, 1447–1452. [CrossRef] Phadke, A.G.; Thorp, J.S. Computer Relaying for Power Systems; John Wiley & Sons: New York, NY, USA, 2009. Bucher, M.K.; Franck, C.M. Contribution of fault current sources in multiterminal HVDC cable networks. IEEE Trans. Power Deliv. 2013, 28, 1796–1803. [CrossRef] Nadeem, M.H.; Zheng, X.; Tai, N.; Gul, M.; Baloch, M.H. Analysis of Fault Current Contribution and Impact of Key Parameters in MTDC Network. Interciencia J. 2017, 42, 257–268. Nadeem, M.; Haroon, T.N.; Zheng, X.; Gul, M. Multi-Terminal HVDC Fault Current Analysis During Line to Ground Fault. In Proceedings of the IEEE, Innovative smart grid technologies IGST Asia 2017, Auckland, New Zealand, 1–5 December 2017. Worzyk, T. Submarine Power Cables: Design, Installation, Repair, Environmental Aspects; Springer Science & Business Media: New York, NY, USA, 2009. Mura, F.; Meyer, C.; de Doncker, R.W. Stability Analysis of High-Power DC Grids. IEEE Trans. Ind. Appl. 2010, 46, 584–592. [CrossRef] Dodds, S.; Railing, B.; Akman, K.; Jacobson, B.; Worzyk, T.; Nilsson, B. HVDC VSC (HVDC light) transmission—Operating experiences. In Proceedings of the CIGRE Session, Paris, France, 22–27 August 2010. Howell, E.K. Arcless Circuit Interrupter. U.S. Patent No. 4,636,907, 13 January 1987. Callavik, M.; Blomberg, A.; Hafner, J.; Jacobson, B. The hybrid HVDC breakers: An innovation breakthrough enabling reliable HVdc grids. In Proceedings of the ABB Grid System Technology Paper, Dresden, Germany, 18–21 November 2012. Poor, A.H.; Hafner, J.; Jacobson, B. Technical assessment of load commutation switch in hybrid HVdc breaker. In Proceedings of the 7th ECCE ASIA International Conference Power Electron, Hiroshima, Japan, 18–21 May 2014. Descloux, J.; Raison, B.; Curis, J.-B. Protection strategy for undersea MTDC grids. In Proceedings of the IEEE Power Tech, Grenoble, France, 16–20 June 2013. Sanusi, W.; al Hosani, M.; El Moursi, M.S. A novel DC fault ride-through scheme for MTDC networks connecting large-scale wind parks. IEEE Trans. Sustain. Energy 2017, 8, 1086–1095. [CrossRef] Bucher, M.K.; Franck, C.M. Analytic approximation of fault current contribution from AC networks to MTDC networks during pole-to-ground faults. IEEE Trans. Power Deliv. 2016, 31, 20–27. [CrossRef] © 2018 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

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