Improved Fault Tolerance of Active Power Filter System
C.B. Jacobina1, M.B. de R. Correa1 2, R.F. Pinheiro1 3, A.M.N. Lima1 and E.R.C. da Silva1 ;
;
Departamento de Engenharia Eletrica, Universidade Federal da Paraiba Fax: +55-83-310-1015(1418)- E-mail:
[email protected] Caixa Postal 10.105, 58109-970 Campina Grande, PB, Brazil 2 CEFET-AL UNED-Palmeira dos Indios, AL 3 Depto. de Eng. Eletrica, Universidade Federal do Rio Grande do Norte, RN, Brazil 1
Abstract: This paper investigates the utilization
of a relatively simple topology that provides faulttolerant operation for a three-phase system containing a shunt active power lter. With such a topology, when one of the lter converter legs is lost, the lter can still operate by connecting the grid neutral to a fourth converter leg. The structure proposed and the operating principles of the system are presented. The system model under fault condition is derived and a suitable control strategy is proposed. Experimental results are presented to demonstrate the correctness of the proposed solution. I. Introduction
The strict regulations about the ow of electrical energy has stimulated the use active power compensation schemes [1,2]. The active power compensation is normally achieved with the help of switching converters connected as an active lter to the load. AC power systems are very sensitive to dierent types of failure occurring at the power converter. Whenever possible, the isolation of the fault is preferable to the stop of the system since it keeps the drive partially operative. In recent years dierent papers focused schemes of faulttolerant converter systems [3{6]. This paper proposes the utilization of a fourth converter leg connected to the grid neutral for maintaining the system under power balanced operation whenever one of the lter converter legs in the drive system of Figs. 1(a) is lost. With the control strategy proposed, when one of the lter converter legs is lost, the power compensation can still be provided with only two phases, until it can be stopped with security. The control strategy permits to maintain the active power compensation except for the homopolar term that cannot be compensated. II. System Description
Figs. 1(a) present a shunt system composed by the grid source, a three-phase load and a voltage source converter. The grid source is composed by three balanced voltage sources (es1 , es2 , es3 ) with equal series resistances (Rs )
and inductances (Ls ). The switching converter of the active power lter is a voltage source converter (V SC ) with equal series resistances (Rf ) and inductances (Lf ). This converter also has a fourth leg connected to the grid neutral. During a balanced operation the fourth leg is inactive. The current at the output of the V SC is controlled to deliver the reactive and harmonic current demanded by the load providing the active power ltering feature. The dc side of the V SC requires a capacitor bank with minimum energy storage capacity. The converter needs active power because the load voltage is dierent from the grid voltage (due to Rs and Ls ) and because the losses associated to its operation. The V SC average power can be directly supplied from the grid. In this case, the active power lter control can be achieved by controlling the grid current in phase with the grid voltage, with amplitude is de ned by dc-bus voltage regulation. Figure 1(b) presents one possible system con guration after loosing one of the active power lter legs (the phase 1 open). The fault detection is accomplished by using the methods presented in [7]. The relevant characteristics exhibited by the system can be preserved after the fault. However, after the fault, the lter cannot control all three-phase currents but, instead, it can control the dq grid component current to be in phase with the corresponding dq grid component voltage. This is done at the expenses of a homopolar current owing in the grid. III. Before-Fault Model
A. Three-phase model The operation of the system given in Fig. 1(a) before the occurrence of the fault can be analyzed with the help of the equivalent circuits in Fig. 2(a). In this analysis the three phase load is represented by three current sources (il1 , il2 and il3 ). Kircho's laws applied to the equivalent circuit of Fig. 2(a) leads, for a generic phase j (j = 1; 2; 3), to
esj ; vfj0 ; 0n + ulj = Rt isj + Lt didtsj (1) (2) ulj = Rf ilj + Lf didtlj where 0n is voltage dierence between the neutral point
e s1 e s2 n
es3
+
Rs L s
Rf L f
+
Rs L s
Rf L f
+
Rs L s
i l1
Rf L f
+
i f1 i f2
q
q2
q1 1
2
i f3
q4
vc
3
q5
q6
e s2 0
C/2
qb
-
i l3
i l2
e s1
C/2
qa
3
Three-phase Load
n
es3
Rs L s
Rf L f
+
Rs L s
Rf L f
i f2
+
Rs L s
Rf L f
i f3
i l1
i l2
+
i f1 =0
+
q
q2 2
3
vc
3
q5
q6
C/2
qa
0
C/2
qb
-
i l3
Three-phase Load ( a)
(b)
Fig. 1. System con gurations. es1
+
Rt
Lt
u l1
+
+
v f10
i s1 es2 n
+
Rt
Lt
ul2
v f20
+
+
0
i s2 es3
+
Rt
Lt
ul3
vf30
+
+
i s3 (a) +
Rt
Lt
uld
+
+
vfd
+
Rt
Lt
ulq
+
+
v fq
isq
esq
; In (5) A; = AT and the vector y (yodq ) can be eip12
1
isd
esd
depends on the type of the load model. B. odq model The odq variables are determined from 123 variables by using the transforming equation given by y123 = Ayodq (4) with y123 = [y1 y2 y3 ]T , yodq = [yo yd yq ]T and 2 p1 1 p0 3 r 2 A = 23 64 p12 ; 12 2p3 75 : (5)
(b)
;
1 2
3 2
123
ther grid, lter and load voltage vectors es123 , vf 123 , ul123 (esodq , vfodq , ulodq ) or grid, lter and load current vector is123 , if 123 , il123 (isodq , ifodq , ilodq ). By using the transforming equation given in (4) and equations (1)-(2) or (3), the following dq model for representing the equivalent circuit of Fig. 2(a) can be obtained:
esd ; vfd + uld = Rt isd + Lt didtsd (6) esq ; vfq + ulq = Rt isq + Lt didtsq (7) of the lter converter (0) and neutral point of the grid (n) dild (8) u = R i + L ld f ld f and Rt = Rs + Rf and Lt = Ls + Lf . dt Eliminating 0n and using is1 + is2 + is3 = il1 + il2 + il3 = ulq = Rf ilq + Lf didtlq (9) 0, a two-phase model can be obtained: Fig. 2(b) presents the dq equivalent circuit for (6)-(9). es12 ; vf 12 + ul12 = Rt ;Rt is1 The homopolar equation p obtained from (4) and (1)-(2) es31 vf 31 ul31 ;2Rt ;Rt is2 is given by vfo ; fs = 3 = 0, because il1 + il2 + il3 = 0 Lt dis1 =dt : (3) and is1 + is2 + is3 = es1 + es2 + es3 = 0. If vfo is chosen + ;L2Lt ; ; L dis2 =dt t t to be zero, then consequently 0n = 0. Fig. 2. Equivalent circuit for the before fault system. (a) Threephase model. (b) model. dq
The model given by (1)-(2) or (3) can be extended to include the load model. To consider a particular type of load, the voltage-current load relationship must be provided and added to the model given by (1)-(2) or (3). The time derivative of the load current needed to compute ul
IV. After-Fault Model
A. Three-phase model Fig. 1(b) illustrates the system when the phase 1 is open. The circuit equations for phase 1 open are derived from the
es2
+
Rt
Lt
u l2
in which the new voltages yz and yx (y indicates es , vf , ef ), de ned by
v f2
+
+
i s2 es3
+
Rt
Lt
ul3
p
v f3
i s3 (a) +
Rt
Lt
ulx
+
+
vfx
i sd
esx +
Rt
Lt
u lz
+
+
v fz
εlx
+
i sq
esz
(17)
p
+
+
p
yx = ; 1=6(y2 + y3); yz = 1=2(y2 ; y3 );
(b)
Fig. 3. Equivalent circuit for the after fault system. (a) three-phase model. (b) model. dq
diagrams given in Fig. 1(b) by considering that if 1 = 0. The resulting equations for phases 2 and 3 (j = 2; 3) are
esj ; vfj + ulj = Rt isj + Lt didtsj ulj = Rf ilj + Lf didtlj
(10) (11)
and for the phase 1
vln1 = es1 ; Rs il1 ; Ls didtl1 ; if 1 = 0
(12)
where vln1 is the voltage for phase 1 of the load referred to the point n. Note that the current is1 cannot be controlled by vf 1 . Only the current is2 and is3 can be controlled. In the odq framework this means that only two currents among iso , isd and isq can be controlled. Moreover, since eso = 0, for providing balanced power, even when leg 1 of the voltage source converter is lost, then the natural choice is to control the dq currents. B. odq model Using the transforming equation given in (4) associated to the phase 1 open, in which is1 = il1 , it follows that: p p (13) is2 = il1 ; 3=2isd + 1=2isq p p is3 = il1 ; 3=2isd ; 1=2isq (14) Under these conditions the dq model for unbalanced operation is given by
esx ; vfx + ulx + "lx = Rt isd + Lt didtsd esz ; vfz + ulz = Rt isq + Lt didtsq
(15) (16)
with "lx = 2=3(Rt il1 + Ltdil1 =dt), have been introduced. Fig. 3(b) presents the dq equivalent circuit. Note that, except for the unbalanced disturbance terms es , ul and "lx this model is balanced. It is possible to merge the disturbance into the model. This leads to a model having dierent parameters which depend on what phase is open. Thep homopolar current p is given p by iso = (il1 + is2 + is3 )= 3 or by iso = ( 3il1 ; 2isd ) if (13)-(14) are introduced. The current iso depends on il1 (de ned by the load) and isd (determined by (15)-(16)). This analysis also explains why iso cannot be controlled by the lter. The modeling for the case when the failure occurs in the another phase follows similar lines. The corresponding model is dierent from model presented above only with respect to the disturbance terms. V. Control Scheme
The amplitude of the grid current is de ned by capacitor dc-bus voltage control. To control the active lter, an appropriate model for designing the current control loop is required. The before-fault control is achieved by controlling the grid current in phase with the corresponding grid voltage. The current controller can be either based on the phase component model given in (3) or based on the dq component model given in (6)-(9). The control variables are vf 12 and vf 31 (vfd and vfq ) and es12 , es31 and ulf 12 , ulf 31 (esd , esq and ulfd , ulfq ) are considered as disturbance terms that must be compensated by the controller. If a linear control is used it must compensate positive and negative sequence components [8] because ulf 12 and ulf 31 (ulfd and ulfq ) are unbalanced as a consequence of the load unbalancing. Figure 4(a) presents the block diagram for illustrating the control strategy based on phase components: - Synch block generates the signals for synchronizing the grid reference current with the grid voltage. - The capacitor voltage regulator (Rc ) determines the amplitude of the grid reference current. - The current controllers (Rs12 ) determine the lter reference voltage. The after-fault control is achieved by controlling the grid dq current in phase with the corresponding dq grid voltage. The current controller for phase 1 open is either based on the phase components model given in (10)-(11) or based on the dq components model given in (15)-(16). The control variables are vf 2 and vf 3 (vfd and vfq ) and es2 , es3 and ulf 2 , ulf 3 (esd , esq and ulfd, ulfq ) are considered as
LOAD
o
o
~
es1 2 3
v c* + vc
Synch
Σ
Rc
i*s 1 2
X
+
Σ
Rs 1 2
vf*1 2 * v f3 1
1
q2 q3
Converter
s12
PW M
e
q
* I s1 23 o
i s1 2 3
es123
is 1 2
is*d q
es d q A
Sy n ch
-1
X
* i s1 23
T
+
es o= 0 v c* +
o
Σ
Rc
vc
I *sd q
i s*1= i l 1 i s*2 = i l 2 i s*3= i l 3
Σ
q1
Rs1 2 3
vf1* 2 3
PW M
o
(for pha se 1 open) (for pha se 2 open) ( for ph ase 3 open )
q2 q3 qa
~
e s1 2 3
Converter
LOAD
o
(b)
(a)
Fig. 4. Block diagram for the system controller.
disturbance terms that must be compensated by the controller. In this case the controller must compensate the unbalanced disturbance terms, besides the load unbalancing. Then, when a linear controller is used, it must compensate both positive and negative sequence components. As discussed before the models for describing the dynamics of all the possible after-fault con gurations dier only by the disturbance terms. This means that it is possible to have a controller with the same parameters for any phase open. Figure 4(b) presents the block diagram for illustrating the after-fault control strategy based on phase components. In this case the block (T ) represents the general transforming equation that takes into account in what leg the fault has occurred. For example, the equation (13)(14) represents the speci c implementation of this block when phase 1 is open. VI. PWM Space Vector
The fourth leg shown in the scheme of Fig. 1(a) is inactive during normal operation. It has been added for backup and it is employed after the fault detection within the remedial strategy. In this case the standard space vector modulation technique can be employed to generate control signals for the converter switches. The modulation technique for the after-fault scheme [Figs. 1(b)] is described next. For the scheme of Figs. 1(b) let us consider that the conduction state of the power switches is associated to binary variables q2 , q3 , q5 , q6 , qa and qb . Therefore, from now on binary '1' will indicate a closed switch and binary '0' an open one. Pairs q2 -q5 , q3 -q6 and qa -qb are complementary and as a consequence, q5 = 1 ; q2 , q6 = 1 ; q3 and qb = 1 ; qa . The system terminals voltages, vf 2 and vf 3 , depend on the states of the power switches and may be expressed in
TABLE 1. Vector and voltages generated by the converter.
q2 q3 qa 0 1 1 0 0 0 1 1
0 0 1 1 1 0 0 1
vector
v v v v v v v v
0 0 0 0 1 1 1 1
=0 1 = E p j=4 2E e 2 = j=2 3 = Ee j 4 = Ee p j5=4 2E e 5 = j 3=2 6 = Ee 7 = 0 0
vf 2 vf 3
0
E E
0 0
0
E E
0
0
;E 0 ;E ;E 0 ;E
terms of the previously de ned binary variables q2 , q3 and qa , as
vf 2 = vf 2n = vf 20 + 0n = (2q2 ; 1) E2 ; (2qa ; 1) E2 v = v = v + = (2q ; 1) E ; (2q ; 1) E f3
f 3n
f 30
n
0
3
2
a
2
where E is the dc-bus voltage. The voltages supplied by the power converter to the system phases can be displayed in the space vector plane. This vector plane is de ned such that vf 2 and vf 3 correspond to the real axis (Re) and the imaginary (Im) axis, respectively, that is:
vk = vf + jvf for k = 0; 1; 2; :::; 8 2
3
(18)
as shown in Fig. 5. The instantaneous voltage vectors generated by the converter are listed in Table 1, for the binary states of the power switches. There are eight vectors: four vectors with amplitude p E (v1 , v3 , v4 and v6 ), two vectors with amplitude 2E (v2 and v5 ) and two null vectors (v0 and v7 ), as shown in Table 1 and Fig. 5. These vectors de ne six sector K = 1; 2; :::; 6. The phase-voltage vf 2 and vf 3 assume only three dierent values: E , 0, or ;E .
The values for t0 and t7 are not de ned. They can be chosen by introducing the apportioning factor 0 1
Im v2
v3
t0 = (T ; tm ; tm+1); t7 = (1 ; )(T ; tm ; tm+1 ) (22)
K=2
K=3
v
vf3* K=1
v4
v 7 o v0
vf2*
v1
Re
K=4 K=5
K=6
v6
v5
Fig. 5. Space vector generated by the converter, sectors and the reference vector locus in 2 3 plane. f
f
Let v represent the reference voltage to be synthesized by the converter within one cycle time of length T . According to the space vector technique [9], the reference vector located in sector K is synthesized by using the zero vectors and the two adjacent vectors that de ne the sector. Then, for the sector K , it can be written that
v = vm tTm + vm tmT + v tT + v tT +1
+1
0
0
7
7
(19)
with the time positive weights for each vector tm , tm+1 , t0 and t7 restricted to T = tm +tm+1 +t0 +t7 (m = 0; 1; 2; :::; 8 and m + 1 = 1, if m = 6. Note that in steady state, v does not describe a circle, as in the dq plane for a balanced two-phase system. By using (18), then v = vf2 + jvf2 and since v0 = 0 and v7 = 0, it follows from (19) that If K If K If K If K If K If K
= = = = = =
1 ) t1 = (vf2 ; vf3 )TE ; t2 = vf3 TE 2 ) t2 = vf2 TE ; t3 = (vf3 ; vf2 )TE 3 ) t3 = vf3 TE ; t4 = ;vf2 TE (20) 4 ) t4 = (vf 3 ; vf 2 )TE ; t5 = ;vf 3 TE 5 ) t5 = ;vf2 TE ; t6 = (vf2 ; vf3 )TE 6 ) t6 = ;v TE ; t1 = v TE f3
f2
where TE = T=E . Given the magnitudes of the components of vector v , i.e., vf2 and vf3 , the sector can be determined in the following way If vf2 If vf2 If vf2 If vf2 If vf2 If vf2
Then, the modulation technique for the scheme presented in Fig. 1b can be implemented by executing the following steps: i) Given vf2 and vf3 , determine K from (21) and tm and tm+1 from (20). ii) Given compute t0 and t7 from (22). The modulation strategy for the other phase open follows similar steps. VII. Simulation Results
Figure 6 presents the grid power (pg ) and active lter power (low-pass ltered) (pf ) [Fig. 6(a)], the grid and lter phase currents [Fig. 6(b)], and the grid dq voltages and currents [Fig. 6(c)] for the system, before and after the fault occurrence (leg 1 open). The system parameters are: Rg = 0:1 pu, Xg = 0:38 pu, Rf = 0:05 pu, Xf = 0:2 pu. The current load is given by following composition: active (0:5 pu) + reactive (0:3 pu) + negative sequence (0:2 pu). The grid voltage amplitude is 1 pu. The fault has occurred at t = 0:03s, when both switches of leg 1 are open. It can be noted that before and after the fault the dq currents are controlled quite well. On the other hand the grid power is nearly continuous, except for a small ripple introduced by the switching of the converter, and the average power of the active lter is zero. VIII. Experimental Results
In the experimental set-up, the controllers were implemented by software in a Pentium II ; 266MHz microcomputer, equipped with dedicated plug-in boards, with h = 200s, and the switching frequency of the V SC was 5kHz . A positive-negative sequence controller is employed [8]. Figs. 7 show the reference and actual dq currents for the system before and after the fault occurrence, for the positive-negative sequence controller and the positive sequence controller operating at 60Hz . The fault was caused at t = 0:015s, when both switches of leg 3 are open. Except for the transient caused by the fault, the controller tracks quite well the current.
IX. Conclusions > 0; vf3 0; vf2 > vf3 ) K = 1 This paper has demonstrated that is possible to pro> 0; vf3 0; vf2 vf3 ) K = 2 0; vf 3 > 0 ) K = 3 (21) vide fault tolerant properties for a three-phase shunt active power lter by adding a fourth leg to the lter converter. < 0; vf 3 0; vf 2 < vf 3 ) K = 4 The fourth leg is connected to the grid neutral, is idle < 0; vf3 < 0; vf2 vf3 ) K = 5 during normal operation and is employed when a fault in one of the three other legs is detected. This control of 0; vf3 < 0 ) K = 6
1
0.68
pg (pu)
0.66 0.64
0.5
d − axis currents (A)
0.62 0.6 0.58 0
0.05
0.1
0.15
0.2
0.25
isd
−0.5
0.4 pf (pu)
0
0.2 0
i*
sd
−1 0
0.01
−0.2 −0.4 0
0.05
0.1
0.15 time (s)
0.2
if1, if2, if3 (pu)
q − axis currents (A)
ig1, ig2, ig3 (pu)
0
−0.5 −1 0
ig1 0.01
0.02
0.03
i 0.04
0.05
0.06
0.07
0.08
if2
0.5
Fig. 7.
0
0.02
0.03
0.04 0.05 time (s)
0.06
0.07
egd, igd (pu)
1
egd
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.04 0.05 time (s)
0.06
0.07
0.08
egq, igq (pu)
1
e
gq
0.5
i
0
gq
−0.5 −1 0
0.01
0.02
0.03
0.01
0.02
time (s)
reference and actual currents before and after the fault.
References
igd
−0.5 −1 0
sq
since the con guration of the active lter when the fault occurs does not permit to control the homopolar components. The proposed solution extends the functionality of the system and, consequently, increases its reliability.
0.08
(b)
0.5
dq
i*
if3
if1 0.01
0.04
sq
0
−1 0
1
−1 0
0.03
i
−0.5
g3
−0.5
0.04
0.5
ig2
0.5
0.03
1
0.25
(a) 1
0.02
time (s)
(c)
Fig. 6. Transient response before and after the fault. (a) Grid ( g ) and lter (low-pass ltered) power ( f ). (b) Grid and lter phase currents. (c) Grid voltages and currents. p
p
dq
this extra leg is part of the remedial strategy for compensate for the fault. Since the after-fault con guration is an asymmetric system it was necessary to develop a suitable model and control strategy. It has been demonstrated that it is possible to maintain power balanced operation of the grid source even when one of the inverter legs is lost. However, it is not possible to provide full fault compensation
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