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IEEE ELECTRON DEVICE LETTERS, VOL. 35, NO. 10, OCTOBER 2014
Improving the Electrostatic Discharge Robustness of a Junction Barrier Schottky Diode Using an Embedded p-n-p BJT Chung-Yu Hung, Tzu-Cheng Kao, Jian-Hsing Lee, Jeng Gong, Kuo-Hsuan Lo, Hung-Der Su, and Chih-Fang Haung Abstract— The high-voltage (H-V) junction barrier Schottky (JBS) diode is often incorporated into the input or output of H-V integrated circuits. When the chip is connected to the external environment, it inevitably suffers electrostatic discharge (ESD) stress. However, the JBS diode can only withstand the forward-mode ESD but it is highly vulnerable to reverse-mode ESD. In this letter, a new kind of JBS diode that is incorporated with a p-n-p bipolar is developed. The experimental results demonstrated that the new device can improve the failure threshold voltages of the human body mode and machine mode by at least four times. The area increase for the new device is 2.2%. Index Terms— Human-body mode, machine model, junction barrier Schottky diode (JBS), ESD.
I. I NTRODUCTION
W
ITH the low turn-on threshold voltage and junction capacitance, fast recovery time, and high cutoff frequency, the Schottky diode is widely used for radiofrequency (RF) switched-mode power supply (SMPS), and power management integrated circuit (PMIC) applications. Because of the large leakage current, the JBS diode [1] is introduced instead of the standard Schottky diode. For H-V applications, the JBS diode needs to tolerate not only high voltage, but also ESD stress when it is incorporated into the I/O circuit. It has been reported that the leakage current of the JBS diode does not severely increase with the reverse bias voltage [2], [3]. Since it is a unipolar component, the JBS diode can provide very robust ESD protection capabilities on the forward-mode while it lacks protection capability for the reverse-mode ESD [4], [5]. With the progress and development of the semiconductor process, transistors size Manuscript received July 31, 2014; revised August 14, 2014; accepted August 14, 2014. Date of publication September 8, 2014; date of current version September 23, 2014. This work was supported in part by Richtek Technology Corporation and in part by the Ministry of Science and Techonology (MOST) under Grant 103-2221-E-029-029. The review of this letter was arranged by Editor S.-H. Ryu. C.-Y. Hung, T.-C. Kao, and K.-H. Lo are with the Institute of Electronic Engineering, National Tsing Hua University, Hsinchu 300, Taiwan, and also with Richtek Technology Corporation, Hsinchu 30288, Taiwan (e-mail:
[email protected]). J.-H. Lee is with Globalfoundries Inc., Malta, NY 12020 USA. J. Gong is with the Department of Electrical Engineering, Tunghai University, Taichung 407, Taiwan. H.-D. Su is with Richtek Technology Corporation, Hsinchu 30288, Taiwan. C.-F. Haung is with the Institute of Electronic Engineering, National Tsing Hua University, Hsinchu 300, Taiwan. Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2014.2350020
Fig. 1. Cross-sectional view and equivalent circuits for the conventional JBS diode.
is continuously shrinking that causes the ESD ability to decline ESD organization has begun to reduce the ESD target on component level HBM/MM specifications and requirements [6]. Actually, for most systems and manufacturers, the acceptable ESD levels have not been changed, i.e. the +2 KV human-body model (HBM), the −2 KV HBM, the +200 V machine model (MM), and the −200 V MM. In order to meet the specifications and has better robustness, the scheme commonly used to increase the device ESD level is to add an additional ESD protection device to conduct the reverse-mode current. In this letter, an alternative solution is proposed, which incorporates an ESD device into the JBS diode. Moreover, this solution only slightly increases the device dimensions. II. D EVICE AND E XPERIMENT A. Device Structure In this work, the JBS structure is fabricated by using a silicide 0.18-µm HV Bipolar, CMOS and DMOS (BCD) process. Figure 1 shows the cross section and the equivalent circuit for the conventional JBS diode. The Schottky diode Dsh is created using the metal and the HVN− layer, and the small P− implants are used to reduce the leakage current during the reverse bias operation [1]–[3]. The JBS diode is surrounded by a P+ guard-ring and an N+ guard-ring. In addition to the Schottky diode, a PN diode D1 is situated between the P+ guard-ring and the HVN− layer. All components are isolated from the p-substrate by an N+ -buried layer (NBL). Fig. 2 shows the cross-sectional view and the equivalent circuit for the new JBS structure designed to improve the reverse-mode ESD. An additional P+ /DP− guard-ring is added
0741-3106 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
HUNG et al.: IMPROVING THE ESD ROBUSTNESS OF A JBS DIODE
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TABLE I DC B REAKDOWN V OLTAGE (BV) AND ESD T EST R ESULTS
Fig. 2.
Cross-sectional view and equivalent circuits for the new JBS diode.
to the cathode of the conventional JBS diode, which forms the lateral PNP bipolar from the P+ /P− junction of the anode to the P+ /DP− junction of the cathode. The area increase is 2.2 % for the new JBS diode compared to the conventional one. B. Experiment The HBM and MM ESD tests are based on the JEDEC standards JESD22-A114-B [7] and JESD22-A115A [8], respectively. In this work, each device structure was stressed by using a series of three ESD pulses at each level with respect to VSS until the failure criterion was reached. The criterion was defined as the device I-V curve compare to the original one shift over ±10% in our experiment. The zapping voltage steps for the MM and the HBM was 50 V and 500 V, respectively. In order to gain a more detailed insight into the ESD behavior, the high current I-V characteristics of the JBS diodes under the transmission line pulse (TLP) ware investigated and measured. The pulse width and rising time of the TLP used for this study were 100ns and 10ns, respectively. III. C HARACTERIZATION AND D ISCUSSION Table I shows the DC breakdown voltage and ESD test results for both the conventional JBS diode and the new JBS diode shown in Figs. 1 and 2. The conventional JBS has a very high immunity to forward-mode ESD stress, but is highly vulnerable to reverse-mode ESD stresses. Based on 1µA criterion, the breakdown voltage (BV) of the JBS diode is 37V in DC characteristics, which is high enough to satisfy the 24V operating voltage. The breakdown voltage for the new JBS diode dropped slightly to 35V, because the DP− well was deep than P− well for the parasitic PNP bipolar. As for the result of ESD zapping, the conventional diode was able to sustain 8KV HBM, but was limited to only −0.5 KV HBM, +50 V MM and −50 V MM. The ESD immunities for the new JBS diode both modes are very robust and meet industry specifications, achieving +8 KV HBM, −2.5 KV HBM, +250 V MM and −200 V MM. Figure 3 shows the high current I-V characteristics and DC leakage current for the conventional and the new JBS diodes under reverse-mode TLP stress. Based on the same bias conditions, the 30V DC leakage current for both the conventional and the new JBS diodes are almost the same. This implies that adding the P+ /DP− guard-ring does not change the DC I-V characteristics of the new JBS diode.
Fig. 3. High current I-V characteristics for the conventional and the new JBS diodes under reverse-mode TLP stress of 100 ns.
When biased at the second breakdown region, the second breakdown current (It2) for the conventional JBS diode is only 0.28 A. However, the It2 for the new JBS diode can achieve 1.5A. Because of the P+ /DP− guard-ring, the new JSB has an additional parasitic PNP bipolar component between the anode and the cathode. The decrease in the turn-on threshold voltage Vt1 for the new JBS diode demonstrates that the PNP bipolar can be triggered during an ESD zapping event. With the PNP bipolar to conduct the reverse current, the new JBS diode can sustain a much higher current than the conventional JBS diode. Vt1 is about 38V for the new JBS diode, it also meets the maximum operating voltage. In Table I, the DC breakdown voltage is determined at a reverse current of 1µA. The conventional JBS has soft breakdown behavior, its reverse current is 10µA at reverse bias of 50V. The linear plot of Fig. 3 to determine Vt1 does not reveal the µA information. Since the Vt1 for the conventional JBS diode is 60 V, as indicated in Fig. 3, the zapping voltage (+ / −50V) is below the Vt1 for the device, and cannot turn-on, so it will not damage the device. This is why the conventional JBS diode does not fail at +50 V MM and −50 V MM, although the It2 is only 0.28 A, which is much smaller than the peak current 0.8 A for the 50 V MM. The It2 are 1.79 and 1.67 times the HBM threshold voltage for conventional and new JBS diode, respectively. From the correlation between TLP and the HBM, with a least square fit from slope between It2 and HBM threshold voltage that was established on several different types of isolated protection components, including nMOS and SCR structures, etc [9],
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IEEE ELECTRON DEVICE LETTERS, VOL. 35, NO. 10, OCTOBER 2014
following half cycle. So, the positive MM threshold voltage able to be sustained by the new JBS diode is slightly higher than the negative MM threshold voltage. IV. C ONCLUSION The conventional JBS diode has an inherent drawback, which is lack of protection capability for reverse-mode ESD. In this study, a new kind of JBS has been developed by introducing an additional P+ /DP− guard-ring to the JBS diode to form a PNP bipolar transistor that overcomes this drawback without changing the leakage current during normal operations. R EFERENCES Fig. 4. Current waveforms for the new JBS diode under −200 V MM zapping.
a value of 1.94 was obtained. From this result, the–HBM failure threshold voltages for the conventional and the new JBS diodes are 0.54 KV and 2.71 KV, respectively, which match the test results shown in Table I very well. Figure 4 shows the current waveforms for the new JBS diode subjected to −200 V MM zapping. Although the peak current is nearly 2.15 A, the duration of the current above the It2 level of 1.5 A is only 2 ns, which is too short to generate enough heat to damage the device like the 100nsec TLP. As the zapping voltage of the MM (−250 V) is further increased, the current during the first cycle will be higher than the It2 level of 1.5A and can generate enough heat to damage the device. Consequently, the new JBS diode is able to sustain −200 V MM zapping events. For the positive MM zapping event, the negative half of the cycle will dominate the ESD robustness of the JBS diode since its current capability in forward-mode is much higher than in reversemode. Moreover, the current of the MM mode decreases to nearly 30% in the
[1] B. J. Baliga, “The pinch rectifier: A low-forward-drop high-speed power diode,” IEEE Electron Device Lett., vol. 5, no. 6, pp. 194–196, Jun. 1984. [2] H. Kozaka et al., “Low leakage current Schottky barrier diode,” in Proc. 4th Int. Symp. Power Semicond. Devices ICs (ISPSD), 1992, pp. 80–85. [3] C.-M. Zetterling et al., “High voltage silicon carbide junction barrier Schottky rectifiers,” in Proc. IEEE/Cornell Conf. Adv. Concepts High Speed Semicond. Devices Circuits, Aug. 1997, pp. 256–262. [4] J. Dong et al., “Influence of Si SBD P+ ring junction depth on ESD robustness,” in Proc. Int. Conf. Optoelectron. Microelectron. (ICOM), Sep. 2013, pp. 33–37. [5] S.-H. Chen et al., “HBM ESD robustness of GaN-on-Si Schottky diodes,” in Proc. 33rd Elect. Overstress/Electrostatic Discharge Symp. (EOS/ESD), Sep. 2011, pp. 1–8. [6] Industry Council on ESD Target Levels. (Oct. 2010). White Paper 1: A Case for Lowering Component Level HBM/MM ESD Specifications and Requirements. [Online]. Available: http://www.esda.org/ [7] Electrostatic Discharge (ESD) Sensitivity Testing Human Body Model (HBM), JEDEC Standard JESD22-A114F, 2008. [Online]. Available: http://www.jedec.org/ [8] Electrostatic Discharge (ESD) Sensitivity Testing Machine Model (MM), JEDEC Standard JESD22-A115C, 2010. [Online]. Available: http://www.jedec.org/ [9] L.-M. Ting et al., “Integration of TLP analysis for ESD troubleshooting,” in Proc. 23rd EOS/ESD Symp., Sep. 2001, pp. 440-447.
