Industrial Electronics, IEEE Tra

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 3, JUNE 1999

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Improving Dynamic Response of Power-Factor Correctors by Using Series-Switching Postregulator Marta Hernando, Member, IEEE, Javier Sebastián, Member, IEEE, Pedro José Villegas, Member, IEEE, and Salvador Ollero, Member, IEEE

Abstract— A new method to improve the dynamic response of power-factor correctors (PFC’s) is described in this paper. The method is based on the use of a new very highly efficient postregulator, called a series-switching postregulator. This new postregulator exhibits very high efficiency due to the fact that only a part of the total power undergoes a power conversion process. The proposed postregulator can be used with any PFC topology (either with or without a transformer), with no modifications in the topology, and can be easily protected against short circuits. Index Terms—AC–DC power conversion, harmonic distortion, IEC-1000-3-2. postregulators, power-factor correctors, power supplies.

I. INTRODUCTION

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HE use of power-factor correctors (PFC’s) [1], [2] is the usual way to get a high power factor on off-line switching power supplies. When a PFC is made up of only one stage, the static output voltage is accurately regulated, whereas the output voltage usually exhibits poor dynamic regulation. This is due to the fact that a low-pass filter must be included in the output voltage feedback loop when the bulk capacitor used to remove the low-frequency ripple (100–120 Hz) is placed at the output [2]. To improve dynamic regulation and to decrease bulk capacitor size, a first option is to connect a second dc-to-dc converter in cascade with the first converter, with the bulk capacitor placed in between. This solution has two main drawbacks; as the whole power is handled twice, efficiency decreases. Also, circuit complexity is higher than for a one-stage converter. References [3]–[8] offer solutions in order to simplify the twocascade-stage system. They are based on one-stage converters where part (or the total) power is handled twice. The number of components is lower than in the two-cascade-stage system, but voltage and current stress in these components are higher. An alternative method to reduce bulk capacitor size and to improve the dynamic response of PFC’s with almost no efficiency penalty has been recently proposed [9]–[11]. This method is based on the use of a two-cascade-stage system where the second stage is a very highly efficient postregManuscript received November 7, 1997; revised February 17, 1998. Abstract published on the Internet March 1, 1999. This work was supported by CICYT under Project TIC97-0936. M. Hernando, J. Sebastián, and P. J. Villegas are with the Departamento de Ingenier´ıa Eléctrica, Electrónica, de Computadores y Sistemas, Universidad de Oviedo, 33204 Gijón, Spain (e-mail: [email protected]). S. Ollero was with Alcatel España, 28045 Madrid, Spain. He is now with Chloride Power Electronics, 28770-Colmenar Viejo, Madrid, Spain. Publisher Item Identifier S 0278-0046(99)04136-2.

ulator called a “two-input buck (TIBuck) postregulator”. In this postregulator, a considerable fraction of the input power (typically, 85%–90%) comes up to the load with no power processing and, therefore, with efficiency 1, whereas the remaining power undergoes power processing based on a buck topology and, therefore, with a typical efficiency of 80%–95%. As a result, overall efficiency of the postregulator is very high (typically, 97%–99%) and, therefore, complete firststage postregulator efficiency is very near to that of the first stage. However, this solution exhibits two main disadvantages. • The first stage must be a two-output PFC. • When a short circuit occurs, the energy stored in the higher voltage bulk capacitor causes a peak current which circulates through the TIBuck’s transistor. In this paper, a new type of high-efficiency postregulator is described. This new postregulator is called a series-switching postregulator. As in the case of the TIBuck postregulator, a considerable fraction of the input power (typically, 85%–90%) comes up to the load with no power reprocessing and, therefore, with efficiency 1, whereas the remaining power undergoes power processing based on a dc-to-dc converter with transformer (a forward converter, for example) and, therefore, with a typical efficiency of 80%–90%. As a result, overall efficiency of the postregulator is very high (typically, 97%–98%) and, therefore, complete first-stage postregulator efficiency is very near to that of the first stage. Moreover, the proposed postregulator overcomes the above-mentioned disadvantages because only one input and only one bulk capacitor are needed, and the short-circuit peak current can be diverted in such a way that it passes through a low-frequency diode instead of any of the topology’s semiconductors. Finally, the proposed structure (main PFC series-switching postregulator) is a good tradeoff between dynamic behaviors (such as small bulk capacitor and fast response when the load changes), efficiency, cost and size. II. THE SERIES-SWITCHING POSTREGULATOR Fig. 1(a) shows a series-switching postregulator (the postregulator proposed in this paper) connected at the output of a standard one-stage PFC. In this circuit, the input voltage to the additional converter is the output voltage of the preregulator, and the output of this converter is connected in series with the output of the global converter. Therefore, the total first-stage output power is divided into two parts [see Fig. 1(b)].

0278–0046/99$10.00  1999 IEEE

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(a)

Fig. 2. Series-switching postregulator efficiency SS versus KO , for different values of C .

(b) Fig. 1. Series-switching postregulator proposed. (a) Main idea. (b) Power processing.

• A part of this power, , undergoes a power conversion . Its value is with efficiency

• The remainder of the power, , comes up to the load without power postprocessing and, then, with efficiency 1. Its value is

The total output power at the output of the series-switching postregulator is (1) being the output power of the converter used in the series-switching postregulator, that is, the only power that has undergone a conversion. can be easily computed Overall postregulator efficiency and the quotient as follows: from (2) and are, the lower is and the So, the closer higher the overall postregulator efficiency is, because more power comes up to the load without power postprocessing in comparison with the power that undergoes a conversion with . Fig. 2 shows the postregulator efficiency as a efficiency and . However, the choice of must be function of must be always positive and made bearing in mind that variations and to guarantee large enough to compensate is constant (Fig. 3). The lower the output voltage that variations (output voltage ripple transient response) of the could be chosen and a lower preregulator are, the lower could be selected.

Fig. 3. Relationship that vO ; vOC ; and vOSS must satisfy for right operation.

III. USING THE SERIES-SWITCHING POSTREGULATOR IN DISTRIBUTED POWER SUPPLY SYSTEMS Although the proposed postregulator can be used with any PFC, it is a very attractive solution to be used in distributed power supply systems with a 48-V battery connected at the output of a PFC (Fig. 4). In this case, the voltage ripple must be very low (150 mV) to avoid battery damage. On the one hand, if only a standard one-stage PFC is used, the bulk capacitor used to guarantee the low voltage ripple across the battery must be very big [Fig. 4(a)]. On the other hand, if a two-stage PFC [cascade connection, Fig. 4(b)] is used, efficiency decreases and cost increases. The proposed solution (Fig. 4(c)) is a good tradeoff between bulk capacitor size and converter cost and efficiency. It should be noted that, in normal can be set around 1/10–1/8 and, therefore, applications, only this same portion of the output power is processed in the postregulator. In practice, the dc-to-dc converter used in the postregulator will have almost the same features as the on-board dc-to-dc converters (similar input voltage and power range), with only one difference: the output voltage feedback instead of . Due to the fact that both loop will check and the postregulator output voltage the input voltage have the same ground reference, the output voltage feedback loop does not need any galvanic isolation, which makes it cheaper and easier to be designed. In summary, the proposed postregulator allows us to improve the dynamic behavior of the overall PFC (output voltage ripple and transient response), slightly increasing the overall system complexity. Thus, from a system made up of one onestage PFC plus a very big bulk capacitor and “ ” low-power converters, we can obtain a faster system (better dynamics)

HERNANDO et al.: IMPROVING DYNAMIC RESPONSE OF PFC’S BY USING SERIES-SWITCHING POSTREGULATOR

(a)

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(b)

(c) Fig. 4. Using the series-switching postregulator in distributed power supply systems.

(a) (a)

(b) Fig. 5. Implementation of the series-switching postregulator. (a) Based on a forward dc-to-dc converter. (b) Based on a flyback dc-to-dc converter. (b)

made up of almost the same PFC (the output voltage is slightly ” low-power lower), plus one small bulk capacitor and “ converters. IV. IMPLEMENTATION OF THE SERIES-SWITCHING POSTREGULATOR In Fig. 5, two possible implementations of the seriesswitching postregulator are shown, one of them using a

+

seFig. 6. Implementation of the overall converter. (a) Flyback PFC ries-switching forward postregulator. (b) Boost PFC series-switching forward postregulator.

+

forward converter [Fig. 5(a)] and the other one using a flyback dc-to-dc converter [Fig. 5(b)]. Fig. 6 shows several possible implementations of the overall ac-to-dc converter with the PFC preregulator and the pro-

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(a)

Fig. 9. ACMC in a series-switching postregulator. (b) Fig. 7. Small-signal model. (a) Standard forward converter. (b) Proposed forward-based postregulator.

Fig. 8. Transfer function of the forward-based series-switching postregulator.

posed series-switching postregulator. The PFC is a flyback in Fig. 6(a) and a boost in Fig. 6(b). The same postregulator is used in both implementations, i.e., the series-switching postregulator based on a forward dc-to-dc converter.

Fig. 10. Prototype of the series-switching postregulator.

being (4)

V. SMALL-SIGNAL MODELING The standard averaging techniques [12], [13], can be used to obtain a small-signal model of the proposed postregulator. Fig. 7(a) shows the small-signal model of a standard forward converter, whereas the small-signal model of the proposed postregulator, based on a forward converter, is given . Fig. 8 shows in Fig. 7(b). In both circuits, the block diagram of the transfer functions obtained from the circuit shown in Fig. 7(b).

is the resistor of the current where is the gain of the current regulator at sensor, is the the frequencies where this gain is constant, and oscillator ramp peak-to-peak voltage. Similarly, the transfer function between the output voltage and the control voltage , has another pole at due to the output RC cell. The final is expression for (5)

VI. THE AVERAGE-CURRENT-MODE CONTROL (ACMC) APPLIED TO THE SERIES-SWITCHING POSTREGULATOR Fig. 9 shows the basic diagram for the series-switching postregulator with ACMC. Following the process explained in [14] and [15] applied to this postregulator [16], the transconis given by ductance (3)

Moreover, the transfer function between the output voltage and input voltage has also been carried out [16] (6) being (7)

HERNANDO et al.: IMPROVING DYNAMIC RESPONSE OF PFC’S BY USING SERIES-SWITCHING POSTREGULATOR

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Fig. 13. Output voltage ripple.

Fig. 11.

Transfer function Gi .

Fig. 14. Transient response.

Fig. 15. Overall efficiency SS in the series-switching postregulator.

VIII. EXPERIMENTAL RESULTS Fig. 12.

Transfer function KGvi (K =

A prototype of a series-switching postregulator has been built and tested. Its main characteristics are (Fig. 10)

026:7 dB).

As was deduced in [16], the relation between the crossover and the switching frequency is frequency (8) VII. SHORT-CIRCUIT PROTECTION When a short circuit is detected, the protection circuitry decreases both the PFC and the postregulator duty cycles up to values near to zero. In these conditions, the output voltage to (the output capacitor decreases very quickly from is not the bulk capacitor and, therefore, it is relatively small). When both voltages are equal, the low-frequency gives an alternative way for the peak current diode , avoiding damage in that discharges the bulk capacitor any of the converter’s semiconductors. The sharing of the current by both ways depends on the real characteristics of the semiconductors employed and on the value of the output inductor, but the current peak by the output of the converter will be attenuated anyway.

V – A

V

V kHz.

The ACMC has been applied to this prototype. Several experimental and theoretical transfer functions are shown in Figs. 11 and 12. The voltage ripple at the input and the output of the postregulator is given in Fig. 13, where it can be seen that an attenuation of 50 dB has been achieved. Fig. 14 shows the output voltage when a sharp change in load occurs. Note and 20 the different scales of representation: 5 V/div for . Finally, Fig. 15 shows the postregulator mV/div for efficiency. IX. CONCLUSION Series-switching postregulators are very interesting postregulators to be used with PFC’s due to their inherent high efficiency. This very high efficiency is based on the fact that not all the postregulator input power undergoes a switching conversion, but only a part of it. The remaining power passes directly through the converter with no switching conversion

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process and, therefore, with efficiency 1. The greater this power is in comparison with total power, the greater total efficiency is. The use of this type of postregulator to improve the dynamic response of a PFC has been analyzed in this paper. The results obtained show that the same line ripple at the output can be obtained either with this postregulator with ACMC or with a bulk capacitor 260 times larger. Transient response when the load changes has also been improved. Finally, it should be noted that all of these results have been obtained when the switching frequency was 100 kHz and with overall postregulator efficiency at full load of 97.5%. REFERENCES [1] R. J. Kocher and R. L. Steigerwald, “An dc-to-dc converter with high quality input waveforms,” IEEE Trans. Ind. Applicat., vol. IA-19, pp. 586–599, July/Aug. 1983. [2] L. H. Dixon, “High power factor preregulators for off-line power supplies,” in Unitrode Power Supply Design Seminar, Unitrode Corp., Merrimack, NH, 1988, pp. 6.1–6.16. [3] I. Takahashi and R. Y. Igarashi, “A switching power supply of 99% power factor by the dither rectifier,” in Proc. Int. Telecommunications Energy Conf., 1991, pp. 714–719. [4] M. Madigan, R. Erickson, and E. Ismail, “Integrated high quality rectifier-regulators,” in Proc. IEEE PESC’92, 1992, pp. 1043–1051. [5] R. Redl, L. Balogh, and N. Sokal, “A new family of single-stage isolated power-factor correctors with fast regulation of the output voltage,” in Proc. IEEE PESC’94, 1994, pp. 1137–1144. [6] M. H. Kheraluwala, R. L. Steigerwald, and R. Gurumoorthy, “A fastresponse high power factor converter with a single power stage,” in Proc. IEEE PESC’91, 1991, pp. 769–779. [7] Y. Jiang, F. C. Lee, G. Hua, and W. Tang, “A novel single-phase power factor correction scheme,” in Proc. IEEE APEC’93, 1993, pp. 287–292. [8] Y. Jiang and F. C. Lee, “Single-stage single-phase parallel power factor correction scheme,” in Proc. IEEE PESC’94, 1994, pp. 1145–1151. [9] J. Sebastián, P. Villegas, F. Nuño, and M. Hernando, “Very efficient twoinput DC-to-DC switching post-regulators,” in Proc. IEEE PESC’96, 1996, pp. 874–880. [10] J. Sebastián, P. Villegas, F. Nuño, O. Garc´ıa, and J. Arau, “Improving dynamic response of power factor preregulators by using two-input highefficient post-regulators,” in Proc. IEEE PESC’96, 1996, pp. 1818–1824. [11] J. Sebastián, P. Villegas, M. M. Hernando, and S. Ollero, “High quality flyback power factor corrector based on a two-input buck postregulator,” in Proc. IEEE APEC’97, 1997, pp. 288–294. [12] R. D. Middlebrook and S. Cuk, “A general unified approach to modeling switching-converter power stage,” in Proc. IEEE PESC’76, 1976, pp. 1–34. [13] R. D. Middlebrook, “A continuous model for the tapped-inductor Boost converter,” in Proc. IEEE PESC’75, 1975, pp. 63–79. [14] D. O’Sulivan, H. Sprujit, and A. Crausaz, “Pulse-width-modulation (PWM) conductance control,” ESA J., vol. 13, no. 1, pp. 33–46, 1989. [15] L. H. Dixon, “Average current mode control of switching power supplies,” in Unitrode Power Supply Design Seminar, Unitrode Corp., Merrimack, NH, 1991, pp. 7–17. [16] P. Villegas, J. Sebastián, M. M. Hernando, F. Nuño, and J. A. Mart´ınez, “Average current mode control of series-switched post-regulators used in power factor correctors,” in Proc. IEEE PESC’98, 1998, pp. 1808–1814.

Marta Hernando (M’94) was born in Gijón, Spain. She received the M.Sc. and Ph.D. degrees in electrical engineering from the University of Oviedo, Gijón, Spain, in 1988 and 1992, respectively. She is currently an Associate Professor at the University of Oviedo. Her main interests are switchingmode power supplies, high-power-factor rectifiers and ac and dc motor drives.

Javier Sebastián (M’87) was born in Madrid, Spain, in 1958. He received the M.Sc. degree from the Polytechnical University of Madrid, Madrid, Spain, and the Ph.D. degree from the University of Oviedo, Gijón, Spain, in 1981 and 1985, repectively. He was an Assistant Professor and an Associate Professor at both the Polytechnical University of Madrid and the University of Oviedo. Since 1992, he has been with the University of Oviedo, where he is currently a Professor. His research interests are switching-mode power supplies, resonant power conversion, converter modeling, and high-power-factor rectifiers.

Pedro José Villegas (M’96) was born in Suances, Spain, in 1965. He received the M.Sc. degree in electrical engineering from the University of Oviedo, Gijón, Spain, in 1991. Since 1994, he has been an Assistant Professor at the University of Oviedo. His research interests are switching-mode power supplies, converter modeling, and high-power-factor rectifiers.

Salvador Ollero (M’99) was born in Madrid, Spain. He received the M.Sc. degree in electrical engineering from the Polytechnical University of Madrid, Madrid, Spain, and the M.B.A. degree from the Centro de Estudios Comerciales, Madrid, Spain, in 1988 and 1991, respectively. He was with Alcatel España, Madrid, Spain, working in the area of power electronics (SMPS, PFC, ac/dc), prior to joining Chloride Power Electronics, Madrid, Spain, where he is is charge of research and development. Currently, his main interests are uninterruptible power supplies and protection systems.