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Presented at the 24th European PV Solar Energy Conference and Exhibition, 21-25 September 2009, Hamburg, Germany

IMPACT OF SOLAR CELL MANUFACTURING PROCESSES ON THERMAL OXIDE-PASSIVATED SILICON SURFACES S. Mack1, A. Wolf1, E.A. Wotke1, A. Lemke1* , B. Holzinger1, T. Dimitrova2, D. Biro1, R. Preu1 Fraunhofer Institute for Solar Energy Systems (ISE), Department PV Production Technology and Quality Assurance Heidenhofstrasse 2, D-79110 Freiburg, Germany Tel: +49-761-4588-5596. Fax: +49-761-4588-7812, email: [email protected] 2 Four Dimensions Inc., 3140 Diablo Ave. Hayward, CA, 94545, USA

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ABSTRACT: In this paper, we investigate the impact of a solar cell fabrication process on the properties of thermal oxide-passivated Si surfaces. Therefore, symmetric thermally oxidized silicon wafers are exposed to the cell process and analyzed by means of quasi steady-state photoconductance and capacitance-voltage-measurements. The oxide thickness reduces during processing. Alkaline texturing, diffusion and firing processes are shown to decrease the effective carrier lifetime. Moreover, the total charge density decreases and the interface trap density at midgap increases along the manufacturing process. The latter complies with the observed reduction of the effective carrier lifetime. Nevertheless this process induced degradation of the oxide passivation is fully reversible with aluminum deposition and subsequent annealing in forming gas. After a post-metallization anneal, on saw damage etched surfaces of 1 Ωcm p-type floatzone material, surface recombination velocities of less than 50 cm/s are measured. Keywords: SiO2, Passivation, Thermal oxide

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INTRODUCTION

Due to their excellent surface passivation capabilities, thermal oxides are widely used to produce high-efficiency silicon solar cells [1]. So far, this application has been mainly restricted to small-dimension and/or cost-intensive laboratory solar cells. Nevertheless, the present industrial cell fabrication process is adaptable for the implementation of thermal oxides as a mean to passivate the rear surface [2]. The laser fired contacts (LFC) technology is an industrially feasible method for rear contact realization [3,4]. One way to introduce a thermal oxide passivated rear surface into the conventional manufacturing process is to start with the growth of a thick thermal oxide [5]. The oxide is then removed from one surface followed by texturing, emitter diffusion, deposition of the SiNX-anti reflection coating (ARC), screen printing of the front contacts, contact firing, evaporation of the Al back contact, LFC formation and a final annealing step. In this process the oxide not only serves as a passivation layer but also for masking the rear surface during texturing and diffusion. The question arises how the solar cell manufacturing process affects the properties of the Si-SiO2 interface and whether the oxide passivation proves to be stable. So far only a few results were published that describe the impact of individual processing steps on the SiO2layer and the Si-SiO2 interface [5,6,7]. Especially high temperature processes, as the firing step required for the formation of screen printed contacts, showed a deteriorating effect on the oxide passivation, that was only partly reversible. In this work we track the properties of the oxide passivation along the whole process chain by measuring the effective minority carrier lifetime τeff on symmetric lifetime samples using the quasi steady-state photoconductance (QSSPC) [8] method. The results are compared to the interface trap density at midgap Dit and the total number of oxide charges Qtot derived from evaluating the capacitancevoltage (CV) curves of metal-oxide-semiconductor (MOS) structures. *

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EXPERIMENTAL

The material used in the experiment are 125*125 mm² (pseudo-square) 250 µm thick boron doped floatzone (FZ) as-cut as well as shiny etched Si wafers of base resistivity ρbulk = 1 Ωcm. The process flow is shown in Fig. 1. Processes only applied to the ascut wafers are positioned on the left, whereas processes only applied to the shiny etched wafers are positioned on the right. After a KOH saw-damage-etch (SDE) and a subsequent modified RCA cleaning [9], the Si wafers are oxidized in a quartz tube furnace of industry size. A thermal oxide of 300 nm thickness is grown at 900 °C in a steam rich atmosphere, produced by burning of hydrogen, followed by a post-oxidation anneal in N2. We skip the oxide removal step on the front side, which would normally follow in the cell process. Instead the oxide remains on both surfaces yielding a sample where both sides represent the rear surface of our solar cell As-cut p-type FZ-wafers 1 Ωcm

Shiny etched p-type FZ-wafers 1 Ωcm

KOH damage etch and cleaning Wet thermal oxidation Alkaline texturing POCl3-diffusion and PSG etch Simulated SiNx deposition Firing

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Figure 1: Process flow of the performed experiment. Some samples are subject to the whole solar cell process (Group 1), others are removed from processing in different states (Groups 2 to 5). Subsequently, all wafers receive a PMA. Additionally, CV and QSSPC measurements are performed before and after the PMA.

Now at Australian National University, Centre for Sustainable Energy Systems, Canberra ACT 2600, Australia

Presented at the 24th European PV Solar Energy Conference and Exhibition, 21-25 September 2009, Hamburg, Germany

−1 2 ⎡⎛ 1 1 ⎞ 1 ⎛W ⎞ ⎤ ⎟⎟ − ⎜ ⎟ ⎥ ⎢⎜⎜ − D⎝ π ⎠ ⎥ ⎢⎣⎝ τ eff τ bulk ⎠ ⎦

−1

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using the sample thickness W, the Auger-limited bulk lifetime τbulk = 3 ms [11], and the diffusion constant D = 27.1 cm²/s [12]. Moreover, for the as-cut wafers of Group 1 we track the lifetime along the process by intermediate QSSPC measurements after each processing step (not shown in Fig 1). Capacitance-voltage (CV) measurements allow the characterization of the oxide and the interface for the shiny etched samples (right hand side in Fig 1). These measurements are performed at 4Dimensions, Hayward, CA, USA, using simultaneous measurement of a quasi static and a high-frequency pulsed CV curve with a pulse length τp of 10-4 s. Please note that for these measurements neither the single side removal of the SiO2 layer nor the evaporation of metal contacts is required. Instead, contacting and measuring of the sample is done using a mercury probe with a dot size of 0.0135 cm2. Some bias light is switched on to facilitate the generation of electron-hole-pairs for all measurements. This approach enables us to determine the midgap interface trap density Dit and the total density of charges Qtot. Equations published by Schroder [13] and Nicollian and Brews [14] enable the extraction of Dit from the CV data. The total charge density Qtot follows from the flat band voltage Vfb by

⎡ ⎤ Kε E ⎛N ⎞ Qtot = ⎢ FHg − χ − g − VT ln⎜⎜ A ⎟⎟ − Vfb ⎥ 0 2q ⎝ ni ⎠ ⎣ ⎦ qtox

(2)

using the work function of mercury FHg = 4.475 V, the electron affinity of silicon χ = 4.05 V, the silicon band gap Eg = 1.12 eV, the elementary charge q, the thermal

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RESULTS AND DISCUSSION

3.1 Effective carrier lifetime Figure 2 shows the development of the mean effective carrier lifetime in different states of the solar cell process, tracked on identical wafers (Group 1) of ascut origin. The lifetime is measured in the center of the wafer. Starting with a mean value of (65±9) µs, the effective lifetime decreases to (28±20) µs after texturing. 280

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voltage VT, the density of acceptors NA = 1.5*1016 cm-3, the temperature dependent intrinsic carrier concentration ni, the dielectric constant of SiO2 K = 3.84, the permittivity of empty space ε0 and the oxide thickness tox. After the QSSPC and CV measurements all samples receive a 2 µm thick layer of aluminum deposited onto both surfaces by means of electron beam evaporation. The subsequent post-metallization anneal (PMA) or alneal [15] in forming gas at 425 °C for 25 minutes liberates atomic hydrogen that passivates residual dangling bonds at the Si-SiO2 interface. Stripping the metal layer in an aluminum etch solution enables us to perform QSSPC and CV measurements again. The measurement results obtained for individual groups before and after the alneal sequence give information on whether a possible reduction in passivation quality during a certain processing step is reversible or not. At the end of the cell process, a thickness of the thermal oxide of 100 nm is desired. Texturing and the PSG etch each reduce the thickness by around 100 nm. Therefore, a starting thickness of 300 nm is selected. An optimization of the texturing and the PSG etch might allow a reduction of the required starting thickness from 300 nm to around 200 nm. Please note that, apart of the furnace for forming gas annealing, only equipment of industry-size is used, with a strong focus on industrial feasibility, regarding use of chemicals, temperatures involved and throughput [16,17].

Effective carrier lifetime τeff (µs)

structure. These symmetric samples then follow the cell manufacturing process starting with alkaline texturing for the formation of random pyramids, followed by a POCl3 tube furnace diffusion for emitter formation and a subsequent phosphosilicate-glass (PSG) etch. The next step simulates the plasma enhanced chemical vapor deposition (PECVD) of the SiNX-ARC by sandwiching the sample between two dummy wafers, so that both surfaces remain uncoated. Finally the samples receive a firing step with a peak set temperature of 800 °C (without printing of the metal contacts in advance). During these processes, although getting thinner, the oxide acts as an etch resist and a diffusion barrier whereas in the finished cell it serves as a passivation layer and back side reflector. After each process some wafers of both types, as-cut and shiny etched, are withdrawn from processing, as indicated in Fig. 1 by dashed arrows. These samples are labeled Group 2 to 5. The samples of Group 1 continue as intended (solid lines). An ellipsometry measurement then yields the oxide thickness for all samples. For the as-cut wafers of all five groups we then measure the effective minority carrier lifetime τeff with the QSSPC method at an injection density of Δn = 5*1014cm-3. The surface recombination velocity (SRV) S follows from the effective lifetime according to [10]

Figure 2: Mean value and standard deviation of the effective carrier lifetime measured along the process sequence on twelve identical wafers (Group 1 in Fig. 1) The lifetime after PMA is an average of three of these wafers. The corresponding surface recombination velocity is shown on the right hand scale. The numbers in the boxes refer to the oxide thickness at the specific processing stage. A strong increase in τeff by a PMA is visible.

3.2 Interface trap density at midgap Similar to the procedure above, shiny-etched FZ samples are removed at different stages of the fabrication sequence, as shown in Fig. 1. The high surface quality of the shiny etched wafers facilitates CV measurements. Figure 4 shows the mean value and standard deviation of the interface trap density, measured at nine different sites on one wafer of each of the five groups.

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This effect is quite remarkable, as it is not obvious that an alkaline texturing solution changes the properties of the silicon-silicon oxide interface underneath the oxide mask. However, a decrease of passivation quality of thermal oxides in chemical solutions was already reported by Zhang [6]. The POCl3-diffusion and the etching of the PSG reduce the lifetimes even further to a level of (7±1) µs. As has already been described by O’Sullivan [18], a loss of atomic hydrogen at the interface due to the high process temperature causes the observed drop in the effective carrier lifetime. During the simulated ARC-deposition the lifetime recovers slightly, which might be due to the hydrogencontaining atmosphere. After an industrial firing with steep temperature ramps, the surface passivation breaks down completely. Very low lifetimes of only 3 µs are measured, indicating a high density of interface states, which is confirmed by CV measurements (see Fig. 4). Again, the breaking of Si-H bonds during firing presumably causes the observed increase in the interface trap density [18]. After a subsequent Al-metallization and a PMA, the effective lifetime recovers to a mean value of (230±37) µs, which equals a SRV of (49±8) cm/s and demonstrates the necessity of this process step. Please note that the surface of these samples features a finite roughness with the typical pillow-like structure that remains after removing the saw damage in KOH [19]. A SRV of ~50 cm/s is low enough to allow effective recombination velocities below 200 cm/s for a surface that features LFC contacts [20]. Figure 3 shows the mean effective lifetimes measured on three as-cut wafers that are removed from processing after distinct processes at different stages of the solar cell process, see Groups 1 to 5 in Fig. 1. As expected, a similar curve for the lifetime along the process chain as in Fig. 2 is visible. The effective lifetime decreases from (81±7) µs after oxidation to (2±1) µs after firing (left pillars). All wafers then are subject to Almetallization and a PMA, which increases the effective lifetime considerably to values between (210±20) and (310±30) µs, equal to a SRV of (55±6) cm/s or (35±4) cm/s, respectively (Fig 2). The trend present before annealing disappears after the post-metallization anneal. Thus, the annealing step recovers the passivation and all lifetimes are on a comparable level, regardless of the stage in the cell process, implicating that the deterioration of the passivation during the process is fully reversible. Note that the presented lifetime values for the annealed wafers represent a lower limit, as, in contrast to the standard cell process, the aluminum layer on top of the oxide has to be removed in order to enable the QSSPC measurement and the wet chemical treatment might reduce the passivation quality, as mentioned above. On the other hand, the thermal budget for annealing a metallized solar cell has to be reduced to prevent a deterioration of the front contacts [20].

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Presented at the 24th European PV Solar Energy Conference and Exhibition, 21-25 September 2009, Hamburg, Germany

Figure 3: Mean value and standard deviation of the effective carrier lifetime measured on three wafers per group which are removed at different stages of the manufacturing process (see Fig. 1). The pillars on the left and right represent the carrier lifetime measured before and after a PMA, respectively. The corresponding surface recombination velocity is shown on the right hand scale. The numbers in the boxes refer to the oxide thickness. The lifetime reduction along the solar cell process is totally recoverable by a post-metallization anneal. The nine sites are located closely to each other in the center of the wafer. After oxidation a mean interface trap density of (0.9±0.4)*1011 cm-2eV-1 is extracted. Continuing the solar cell fabrication process increases Dit (see Fig 4). This increase complies with the process induced lifetime reduction shown in Fig 3. Again, especially the high-temperature processes diffusion and firing show a strong impact. Firing raises Dit up to (2.6±0.6)*1011 cm-2eV-1, presumably due to the breaking of Si-H bonds. The texturing process shows only a small impact on Dit, whereas the lifetime decreases significantly. The pseudo-ARC deposition even decreases Dit. As mentioned above, this might be due to the hydrogen content of the plasma in the PECVD deposition chamber. A subsequent PMA reduces Dit considerably (left pillars in Fig. 4), as has been expected, underlining the effective annealing of process-induced degradation observed for the lifetime samples. Annealing a wafer removed after oxidation (Group 5) reduces Dit by a factor of two to (0.5±0.1)*1011 cm-2eV-1. Similar Dit values are extracted for the annealed samples of the other groups, with slightly higher values of (0.6±0.2)*1011 cm-2eV-1 for the complete cell process (Group 1). Also, local differences on the wafers appear more clearly, which is mirrored by an increase in the standard deviation. The recombination model by Eades and Swanson predicts a linear dependence of S from Dit in low levelinjection [21]. Thus, for the measurements before the PMA, the moderate increase in Dit from oxidation (Group 5) to firing (Group 1) by a factor of two to six (depending on the standard deviation) does not fully explain the strong increase in S by more than one magnitude (see Fig. 3). This might also be attributed to the fact, that the CV measurements are performed on shiny etched material, whereas S is extracted from QSSPC measurements on wafers with saw damage etched surfaces. However, both the increase in Dit along the fabrication process and the decrease during the PMA

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Presented at the 24th European PV Solar Energy Conference and Exhibition, 21-25 September 2009, Hamburg, Germany

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Figure 4: Mean value and standard deviation of the interface trap density at midgap measured on nine points on one wafer removed at different stages of the manufacturing process. The left and right pillars represent the measurement before and after a PMA, respectively. The numbers in the boxes refer to the oxide thickness.

Figure 5: Mean value and standard deviation of the total charge density measured on nine points on one wafer removed at different stages of the manufacturing process. The left and right pillars represent the measurement before and after a PMA, respectively. The numbers in the boxes refer to the oxide thickness.

qualitatively resemble the results of the lifetime data shown in Fig. 3. CV-measurements are also performed with half the pulse length of the high frequency CV curve τp, that is τp/2 = 5*10-5 s. The extracted mean interface trap density is 30-50 % higher compared to the values obtained with a longer pulse length of τp = 10-4 s. It is possible, that some of the traps respond to the lower frequency. According to Schroder, some traps might even react to frequencies as high as 1 MHz [13]. Though the value of Dit is influenced by the pulse length, using one and the same measurement conditions enables a qualitative analysis of the changes of Dit.

3.5, solar cells produced with this cell process do not suffer from low current densities.

3.3 Total charge density Figure 5 displays the mean value and standard deviation of the total charge density Qtot calculated from the flat band voltage by means of Eq. (2). Before the PMA, the samples exhibit a clear trend. Starting with a positive total charge density of (7.4±0.5)*1011 cm-2 after oxidation, Qtot decreases to (3.9±0.1)*1011 cm-2 after pseudo-ARC-deposition (Group 2). Firing slightly raises Qtot again to (4.8±1.1)*1011 cm-2. Annealing after aluminum deposition reduces the total charge density for all wafers. Values between 3 and 6*1011 cm-2 are achieved. The extracted total charge densities are rather high compared to literature values for the density of fixed charges at the Si-SiO2-interface of state-of-the-art thermal oxides for high-efficiency cells, which are in the order of 6*1011cm-2 at the end of the cell process, which might drive the p-type surface into inversion [24] and thus lead to power loss due inversion layer shunting [25]. Nevertheless, as will be shown in

3.4 Variation of post metallization anneal parameters Annealing of a screen printed cell requires a PMA with a reduced thermal budged, since a 25 minutes long PMA at a temperature of 425 °C, as used for the above described experiments, would strongly deteriorate the screen printed front contact [26,20]. Using shorter annealing processes at lower temperatures raises the question whether the passivation still fully recovers during annealing. To analyze this issue, FZ samples (originally as-cut material) are removed from processing after oxidation (Group 5) as well as after firing (Group 1). After Al evaporation onto both surfaces these wafers receive a PMA using different combinations of temperature and time, ranging from 350°C for 5 minutes to 425°C for 25 minutes. Again, a QSSPC measurement yields the effective carrier lifetime after the wet chemical removal of the Al layers. Figure 6 shows the results. Before the PMA, the samples withdrawn after oxidation exhibit an effective carrier lifetime around 65 µs (Group 5, solid line in Fig 6), whereas the samples withdrawn after firing show carrier lifetimes of only 3 µs (Group 1, dashed line in Fig 6). A PMA at 350 °C for 5 minutes raises the level to (106±20) µs for the samples of Group 5 and (50±5) µs for those of Group 1 (see Fig. 6). The difference indicates that this anneal does not fully recover the oxide passivation from the damage introduced by the cell process. With increasing annealing temperature, the effective carrier lifetime increases for both groups and the difference between the two groups becomes smaller. The more effective supply of hydrogen during the PMA is probably the reason for this behavior. An anneal at 400 °C for 5 minutes is sufficient to eliminate differences between the two groups, yielding about 200 µs for both. Thus, it seems that this is the minimum thermal budget required for recovering process induced damage of the oxide passivation. Increasing the temperature to 425 °C does not significantly affect the passivation.

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Presented at the 24th European PV Solar Energy Conference and Exhibition, 21-25 September 2009, Hamburg, Germany

Figure 6: Effective lifetime and surface recombination velocity vs. annealing process for samples removed after oxidation (left pillars) and after firing (right pillars). Shown are the mean value and the standard deviation of nine measurement points on one wafer. The solid and dashed lines mark the average lifetime level before the PMA for group 5 and 1, respectively. In contrast, prolonging the annealing time to 25 minutes slightly increases the carrier lifetime for Group 5, whereas it reduces the lifetime for Group 1. For this sample the averaged effective lifetime sinks and the standard deviation increases. Values between 25 µs and 380 µs are measured at different sites on the sample with the lower values closer to the wafer edge. In the above described experiment (Fig. 3) similar annealing parameters (425 °C, 25 minutes) are used. However, this inhomogeneity has not been observed, since for the data shown in Fig. 3 the effective lifetime is measured only in the center of the wafer. It seems that prolonged annealing enhances local differences in the oxide passivation for the samples that are exposed to the whole process (Group 1). Apparent from Fig. 6, for shorter annealing processes (5 minutes), which are relevant for the annealing of solar cells with screen printed contacts, the described inhomogeneity for the samples of Group 1 is not observed. 3.5 Solar cell results p-type Czochralski (Cz) material of 210 µm starting thickness and 1.5 Ωcm resistivity is used to fabricate solar cell with the proposed process sequence (see Fig. 1). The solar cells feature an emitter with a sheet resistance of 65 Ω/sq. and screen-printed front contacts. After contact firing, a 2 µm thick aluminum layer is deposited on the rear surface by e-gun evaporation. A laser forms the local rear contacts (LFC) [3]. A subsequent FGA at 350 °C for 5 minutes improves the surface passivation while still keeping a low contact resistance for the screen printed front contacts [20]. As a reference, conventional screen printed cells with an aluminum back surface field (BSF) are fabricated. Please note that these cells feature a full area BSF and no soldering pads at the rear surface. Illumination at 0.3 suns for 35 h fully activates the boron-oxygen complex [27] before the measurement of the current-voltage (IV) curve. A stable efficiency of 17.5 % is reached for the thermal oxide passivated device and 17.1% for the Al-BSF reference (independently confirmed, see Table I). The higher open circuit voltage VOC and short circuit current density JSC of the oxide

Table I: Achieved Cz solar cell efficiencies applying the proposed cell process (see Fig. 1). Measurements are performed for stabilized cells by ISE CalLab using the AM1.5g IEC60904-3Ed.2 (2008) spectrum. If indicated, a mask is used to shadow a 2 mm wide stripe of the wafer edge during the measurement. Mask Thermal No Yes oxide Al-BSF No no pads

η

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Voc jsc FF [mV] [mA/cm2]

[%]

149 138.6 149

624 623 615

17.5 17.9 17.1

37.0 37.2 35.7

75.9 77.3 77.8

passivated cell clearly reflect the improved surface passivation and higher internal reflection compared to the Al BSF reference. During Al deposition, a ~2 mm thick stripe of the wafer edge of the oxide passivated cell remains not metallized. This part of the cell features a high local series resistance which reduces the fill factor. Therefore additional IV-measurements are performed during which this area is shadowed by a mask. Apparent from Table I, the fill factor (FF) increases, when using the mask enabling stable efficiencies of 17.9% for the oxidepassivated device.

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SUMMARY AND OUTLOOK

In this work, we analyze the impact of a solar cell fabrication process on the properties of the oxide passivated surface by means of QSSPC and CV measurements. During the process sequence, the effective carrier lifetime measured on symmetric oxide passivated wafers reduces. However, after deposition of a 2 µm thick Al layer and subsequent annealing in forming gas, the effective lifetime completely recovers. On samples with saw damage etched surfaces a mean level of 220 µs, corresponding to a SRV of 49 cm/s, is reached. This level is reached regardless of the state in the cell process, in which the wafers are withdrawn from processing. The CV measurements reveal that the interface trap density at midgap increases during processing, which correlates with the observed decrease in the effective carrier lifetime. The final annealing step reduces Dit to around 5*1010cm-2eV-1, regardless of the process step, after which the samples are withdrawn, which agrees with the constant lifetime level observed after annealing. Starting from 7*1011cm-2, the total charge density reduces during processing. After firing and annealing, a total charge density of 4*1011cm-2 is extracted. The final post-metallization anneal after aluminum deposition at the end of the cell process is shown to be mandatory to recover the passivation of the thermal oxide. An anneal at 400°C for 5 minutes is sufficient to eliminate differences in the passivation quality induced by the cell process. Large area solar cells with a stabilized efficiency of 17.9 % are produced on Cz material, using only industrial production equipment. An increase in cell efficiency can be achieved by substituting the full area Al-BSF rear contact with a thermal oxide passivated rear surface and laser fired contacts.

Presented at the 24th European PV Solar Energy Conference and Exhibition, 21-25 September 2009, Hamburg, Germany

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ACKNOWLEDGMENTS

The authors would like to thank all co-workers at the Photovoltaic Technology Evaluation Center (PV-TEC) at Fraunhofer ISE for processing of the samples and our project partners from the Laser Fired Contact Cluster (LFCC) for fruitful discussions. This work is funded by the German Federal Ministry for the Environment, Nature Conservation and Nuclear Safety under contract number 0327572.

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REFERENCES

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[21] W.D. Eades and R.M. Swanson, Journal of Applied Physics 58 (1985) 4267. [22] A.G. Aberle, S.W. Glunz, A.W. Stephens et al., Progress in Photovoltaics: Research and Applications 2 (1994) 265. [23] A.G. Aberle, S. Glunz, and W. Warta, Journal of Applied Physics 71 (1992) 4422. [24] B. Fischer, PhD Thesis, University of Konstanz (2003). [25] S. Dauwe, L. Mittelstädt, A. Metz et al., Progress in Photovoltaics: Research and Applications 10 (2002) 271. [26] S. Kontermann, M. Hörteis, M. Kasemann et al., Solar Energy Materials & Solar Cells 93 (2009) 1630. [27] J. Schmidt and K. Bothe, Physical Review B (Condensed Matter) 69 (2004) 0241071.