Integration, Architecture, and Applications of 3D CMOS- Memristor ...
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Integration, Architecture, and Applications of 3D CMOS- Memristor ...
+ Wide range of material systems and physical phenomena Current ( uA )
100 50 nm hp 0 ‐100 1. • Crossbar is tilted by an angle α equal to ArcTan(1/r) with respect to the pins. • # of reachable crosspoints per wire segment is r2 – 1
Crossbar Construction – Bottom Level
Adding a Second Crossbar Layer Connectivity domain in the first crossbar layer
Connectivity domain in the second crossbar layer
The mapping is done through pin translation wires
Blue pins are common to all crossbar layers. Red pins are "redefined" for each layer using the pin translation wires.
First layer of red pins.
First layer of red and blue pins.
Layer of (bluish) wires connected to the blue pins.
Single (orange) wire connected to a red pin. The cross‐points with the bottom wires are shown in green.
First complete crossbar layer.
A single pin translation wire (in yellow).
Every orange wire is “translated” into another point using the same type of pin translation wire.
The first crossbar layer with its pins translation wires are then “buried” in SiO2
We start to build the next crossbar layer (bluish wires)
We start to build the next crossbar layer (bluish wires)
We add the orange wires (the cross‐points are formed)
And we add the pins translation wires and repeat the process…
Maximum Number of Layers • Each layer has N2 cells. • There are r2 – 1 cross points per cell. • That gives us a total of N2(r2 – 1) cross points per layer. • The double decoding scheme allows us to address up to N4 locations • Which means that we can (potentially) have up to N2/(r2 – 1) crossbar layers.
