International conference

International conference 1.

Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai and Rong-Shue Hsiao, “Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems,＂ Accepted by IEEE Computer Society of IIHMSP 2007, Nov. 26-28, 2007. Kaohsiung, Taiwan. (Paper ID: IIHMSP-2007-IS01-005). (EI)

2.

Trong-Yen Lee, Yang-Hsin Fan, Shih-Chin Yen, Chia-Chun Tsai and Rong-Shue Hsiao, “An Integrated Functional Verification Tool for FPGA Systems,” Accepted by IEEE Computer Society of ICICIC 2007, Sep. 5-7, 2007. Japan. (Paper ID: ICICIC-2007-IS30-005). (EI)

3.

Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai and Rong-Shue Hsiao, “Hardware-oriented Partition for Embedded Multiprocessor FPGA Systems,” Accepted by IEEE Computer Society of ICICIC 2007, Sep. 5-7, 2007. Japan. (Paper ID: ICICIC-2007-IS10-005). (EI)

4.

Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai, and Rong-Shue Hsiao, “An Efficiently Hardware-Software Partitioning for Embedded Multiprocessor FPGA System,” in Proc. of International Multiconference of Engineers and Computer Scientists (IMECS), pp. 346-351, March 21-23, 2007, Hong Kong. (EI)

5.

Trong-Yen Lee, Yang-Hsin Fan and Chia-Chun Tsai, “Reduction of RLC Tree Delay Using Bidirectional Buffer Repeater Insertion,” IEEE Computer Society Proc. of the First International Conference on Innovative Computing, Information and Control (ICICIC'06), Vol. 2. pp. 515-518, Aug. 30- Sep. 1, 2006. Beijing, China. (EI)

6.

Trong-Yen Lee, Yang-Hsin Fan, Yu-Ming Cheng and Chia-Chun Tsai, “A Hardware-Software Partitioning for Multiprocessor Embedded Systems,” in Proc. of the IEEE International Conference on Systems and Signals (IEEE ICSS 2005), pp. 543-548, April 28-29, 2005. Kauhsiung, Taiwan.

7.

Trong-Yen Lee, Jen-Pu Tseng, Yang-Hsin Fan, Chia-Chun Tsai, Wen-Ta Lee and Yuh-Shyan Hwang, “Hardware-Software Partitioning Tool Using Multiple Algorithms for FPGA Systems,” in Proc. of the IEEE International Conference on Systems and Signals (IEEE ICSS 2005), pp. 537-542, April 28-29, 2005. Kauhsiung, Taiwan.

8.

Trong-Yen Lee, Yang-Hsin Fan, Tsung-Hsun Yang, Chia-Chun Tsai,Wen-Ta Lee, Yuh-Shyan Hwang, “A Retargetable Code Generation Translation Methodology for Embedded Systems,” in Proc. of the International Computer Symposium, ICS, pp. 765-770, Dec. 15-17, 2004. Taipei, Taiwan.

9.

Trong-Yen Lee, Yang-Hsin Fan, Tsung-Hsun Yang, Chia-Chun Tsai,Wen-Ta Lee, Yuh-Shyan Hwang, ”RCGES: Retargetable Code Generation for Embedded Systems,” in Proc. of the International Conference on 2nd Automated Technology for Verification and Analysis, ATVA, pp. 415-425, Oct. 31- Nov. 3, 2004. Taipei, Taiwan.

National conference 1.

Trong-Yen Lee, Yang-Hsin Fan and Su-Zhen Hong, “A Low-Complex Image Coding Algorithm Based on Wavelet Transform,” Accepted by VLSI Design/CAD Symposium, Aug. 7-10, 2007. Hualien, Taiwan.

2.

范揚興, 張保榮, 徐龍政, 黃偉杰, 張詠筌及鄭博文, “嵌入式動態歌詞之 MP3 音樂播放器,＂ 2007 年第一屆高應大創意網 e 化競賽, 論文集送印中, 六月 21 日, 2007. 高雄, 台灣.

3.

Yang-Hsin Fan, Bao-Rong Chang, Po-Wen Cheng, Wei-Chieh Huang and Yung-Chuan Chang, “A Reconfigurable Step Motor of 8-bit Microcontroller,” in Proc. of Symposium on Applications of Information, Management and Communication Technology, Sesseion C3, Jun. 14. 2007. Kaohsiung, Taiwan.

4.

范揚興, 張保榮, 張詠筌, 鄭博文, 黃偉杰, “雙策略與低成本之微處理器步進馬達控制電路,＂ 2007 高應大第三屆全國電子設計創意競賽, 頁 104-108. 高雄, 4 月 15 日, 2007. 高雄, 台灣.

5.

Trong-Yen Lee, Yang-Hsin Fan, Shih-Chin Yen, Chia-Chun Tsai and Rong-Shue Hsiao, “VERR: Design A Verification Tool for FPGA System,” in Proc. of VLSI Design/CAD Symposium, Aug. 9-12, 2005. Hualien, Taiwan.

6.

Trong-Yen Lee, Jen-Pu Tseng, Yang-Hsin Fan, Chia-Chun Tsai and Rong-Shue Hsiao, “Design of a Hardware-Software Partitioning Tool for FPGA Systems,” in Proc. of VLSI Design/CAD Symposium, Aug. 9-12, 2005. Hualien, Taiwan.

7.

李宗演, 鄭育旻, 范揚興, 蔡加春, 蕭榮修, “多處理機之嵌入式系統軟硬體分割技術 , ＂ in Proc. of International Conference on 16th Information Management (ICIM2005), Paper No. ITA-461-P, May 28, 2005. Taipei, Taiwan.

8.

李宗演, 顏仕欽, 范揚興, 蔡加春, 蕭榮修, “VERR: FPGA 系統驗證工具之設計,＂民生電子暨信號處理研討會, 12 月 17 日-18 日, 2005. 雲林, 台灣.

9.

Yang-Hsin Fan, Ming-Che Hsieh, Tung-Chung Tsai, Cheng-Chang Jeng, Mu-Tseng Lin, “A Knowledge Management System based on Modules and XML,” in Proc. of the National Conference on Taiwan Academic Network, TANET, pp. 1026-1029, Oct., 2004. Taitung, Taiwan.

10. Trong-Yen Lee, Chi-Hsiung Dai, Yang-Hsin Fan, Chia-Chun Tsai,Wen-Ta Lee, Yuh-Shyan Hwang, “A Hardware-Software Partitioning for Reconfigurable DSP-based SoC,” in Proc. of the National Conference on 1th Applied Science and Technology Conference, ASTC, paper no. QK04, Dec., 2004. Kaohsiung, Taiwan.

Book 1.

2. 3. 4. 5. 6. 7.

Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai and Rong-Shue Hsiao, “Partitioning Strategy for Embedded Multiprocessor FPGA Systems,” Book chapter of Current Trends in Intelligent Systems and Computer Engineering, Spinger Publisher, 2007. 張偉勤, 范揚興, 王博熙,(2000),自已學 FrontPage2000,台北:松崗電腦圖書公司范揚興, 張偉勤(1999),自已學 Excel2000,台北:松崗電腦圖書公司詹坤達, 袁熒助, 張偉勤, 范揚興(1999),活學易用 Windows98,台北:松崗電腦圖書公司范揚興, 張秋榮(1998),Windows 98 Step by Step,台北:碁峰電腦圖書公司戴建耘, 張秋榮, 范揚興, 陳昭安(1998),Visual Basic 與 SQL Server 應用設計篇,台北:松崗電腦圖書公司范揚興, 何敏煌(1998),我愛 ActiveX 與 Visual Basic Script,台北:松崗電腦圖書公司

The Third International Conference on Intelligent Information Hiding and Multimedia Signal Processing November 26-28, 2007 / Kaohsiung City, Taiwan http://bit.kuas.edu.tw/~iihmsp07

Dear Prof./Dr./Ms./Mr. Yang-Hsin Fan, Thank you for your submission to IIHMSP-2007. We are pleased to inform you that your paper ID No.: IIHMSP-2007-IS01-005 Title: Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems Author(s): Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai, and Rong-Shue Hsiao has been accepted for presentation in IIHMSP-2007. Your paper will be published in the conference proceeding with the Conference Publishing Services of the IEEE Computer Society. Please do take the comments and suggestions of the reviewers into account in the revision to further improve the quality of your paper. The length of the paper should not exceed 4 pages. The camera-ready version should follow the instruction of the publisher, and should be sent to us no later than August 1, 2007, together with the copyright release form. We are looking forward to meeting you in Kaohsiung. Further information on IIHMSP-2007 can be obtained from the conference web sites. http://bit.kuas.edu.tw/~iihmsp07

Kind regards,

Program Committee Chair Jeng-Shyang Pan Kaohsiung University of Applied Sciences, Taiwan

The Second International Conference on Innovative Computing, Information and Control September 5-7, 2007 / Kumamoto City International Center, Kumamoto, Japan http://www.ijicic.org/icicic2007.htm, http://bit.kuas.edu.tw/~icic07

Dear Prof./Dr./Ms./Mr. Yang-Hsin Fan, Thank you for your submission to ICICIC-2007. We are pleased to inform you that your paper ID No.: ICICIC-2007-IS30-005 Title: An Integrated Functional Verification Tool for FPGA Systems Author(s): Trong-Yen Lee, Yang-Hsin Fan, Shih-Chin Yen, Chia-Chun Tsai, and Rong-Shue Hsiao has been accepted for presentation in ICICIC-2007. Your paper will be published in the conference proceeding with the Conference Publishing Services of the IEEE Computer Society. Please do take the comments and suggestions of the reviewers into account in the revision to further improve the quality of your paper. The length of the paper should not exceed 4 pages. The camera-ready version should follow the instruction of the publisher, and should be sent to us no later than 30 April, together with the copyright form, and the copy of your registration receipt (from your bank). We are looking forward to meeting you in Kumamoto. Further information on ICICIC-2007 can be obtained from the conference web sites. http://www.ijicic.org/icicic2007.htm, http://bit.kuas.edu.tw/~icic07

Kind regards,

Program Committee Chair


Jeng-Shyang Pan

Junzo Watada

Kaohsiung University of Applied Sciences, Taiwan

Waseda University, Japan

The Second International Conference on Innovative Computing, Information and Control September 5-7, 2007 / Kumamoto City International Center, Kumamoto, Japan http://www.ijicic.org/icicic2007.htm, http://bit.kuas.edu.tw/~icic07

Dear Prof./Dr./Ms./Mr. Yang-Hsin Fan, Thank you for your submission to ICICIC-2007. We are pleased to inform you that your paper ID No.: ICICIC-2007-IS10-005 Title: Hardware-oriented Partitioning for Embedded Multiprocessor FPGA Systems Author(s): Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai, and Rong-Shue Hsiao has been accepted for presentation in ICICIC-2007. Your paper will be published in the conference proceeding with the Conference Publishing Services of the IEEE Computer Society. Please do take the comments and suggestions of the reviewers into account in the revision to further improve the quality of your paper. The length of the paper should not exceed 4 pages. The camera-ready version should follow the instruction of the publisher, and should be sent to us no later than 30 April, together with the copyright form, and the copy of your registration receipt (from your bank). We are looking forward to meeting you in Kumamoto. Further information on ICICIC-2007 can be obtained from the conference web sites. http://www.ijicic.org/icicic2007.htm, http://bit.kuas.edu.tw/~icic07

Kind regards,



Jeng-Shyang Pan

Junzo Watada

Kaohsiung University of Applied Sciences, Taiwan

Waseda University, Japan