Inverter Control with Space Vector Modulation - Springer

Chapter 2

Inverter Control with Space Vector Modulation

Figure 2.1 shows the principle circuit of an inverter fed 3-phase AC motor with three phase windings u, v and w. The three phase voltages are applied by three pairs of semiconductor switches vu+/vu−, vv+/vv− and vw+/vw− with amplitude, frequency and phase angle defined by microcontroller calculated pulse patterns. The inverter is fed by the DC link voltage UDC. In our example, a transistor inverter is used, which is today realized preferably with IGBTs. Figure 2.2 shows the spacial assignment of the stator-fixed αβ coordinate system, which is discussed in Chap. 1, to the three windings u, v and w. The logical position of the three windings is defined as: 0, if the winding is connected to the negative potential, or as 1, if the winding is connected to the positive potential of the DC link voltage. Because of the three windings eight possible logical states and accordingly eight standard voltage vectors u0, u1 … u7 are obtained, of which the two vectors u0—all windings are on the negative potential—and u7—all windings are on the positive potential—are the so called zero vectors. The spacial positions of the standard voltage vectors in stator-fixed αβ coordinates in relation to the three windings u, v and w are illustrated in Fig. 2.2 as well. The vectors divide the vector space into six sectors S1 … S6 and respectively into four quadrants Q1 … Q4. The Table 2.1 shows the logical switching states of the three transistor pairs.

2.1 Principle of Vector Modulation The following example will show how an arbitrary stator voltage vector can be produced from the eight standard vectors. Let us assume that the vector to be realized, us is located in the sector S1, the area between the standard vectors u1 and u2 (Fig. 2.3). us can be obtained from the vectorial addition of the two boundary vectors ur and ul in the directions of u1 and u2, respectively. In Fig. 2.3 mean: © Springer-Verlag Berlin Heidelberg 2015 N.P. Quang and J.-A. Dittrich, Vector Control of Three-Phase AC Machines, Power Systems, DOI 10.1007/978-3-662-46915-6_2

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2 Inverter Control with Space Vector Modulation

Fig. 2.1 Principle circuit of a VSI inverter-fed 3-phase AC motor

Fig. 2.2 The standard voltage vectors u0, u1… u7 formed by the three transistor pairs (Q1… Q4: quadrants, S1… S6: sectors)

Table 2.1 The standard voltage vectors and the logic states

Fig. 2.3 Realization of an arbitrary voltage vector from two boundary vectors

u v w

u0

u1

u2

u3

u4

u5

u6

u7

0 0 0

1 0 0

1 1 0

0 1 0

0 1 1

0 0 1

1 0 1

1 1 1

2.1 Principle of Vector Modulation

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Subscript r, l: boundary vector on the right, left Supposed the complete pulse period Tp is available for the realization of a vector with the maximum modulus (amplitude), which corresponds to the value 2UDC/3 of a standard vector, the following relation is valid: 2 jus jmax ¼ ju1 j ¼ . . . ¼ ju6 j ¼ UDC 3

ð2:1Þ

From this, following consequences result: 1. us is obtained from the addition of ur þ ul 2. ur and ul are realized by the logical states of the vectors u1 and u2 within the time span:

Tr ¼ Tp

jur j jul j ; Tl ¼ Tp jus jmax jus jmax

ð2:2Þ

u1 and u2 are given by the pulse pattern in Table 2.1. Only the switching times Tr, Tl must be calculated. From Eq. (2.2) the following conclusion can be drawn: To be able to determine Tr and Tl, the amplitudes of ur and ul must be known.

It is prerequisite that the stator voltage vector us must be provided by the current controller with respect to modulus and phase. The calculation of the switching times Tr, Tl will be discussed in detail in Sect. 2.2. For now, two questions remain open: 1. What happens in the rest of the pulse period Tp ðTr þ Tl Þ? 2. In which sequence the vectors u1 and u2, and respectively ur and ul are realized? In the rest of the pulse period Tp ðTr þ Tl Þ one of the two zero vectors u0 or u7 will be issued to finally fulfil the following equation. us ¼ ur þ ul þ u0 ðor u7 Þ ¼

Tp ðTr þ Tl Þ Tr Tl u þ u þ u0 ðor u7 Þ 1 2 Tp Tp Tp

ð2:3Þ

The resulting question is, in which sequence the now three vectors—two boundary vectors and one zero vector—must be issued. Table 2.2 shows the necessary switching states in the sector S1. Table 2.2 The switching states in the sector S1

u v w

u0

u1

u2

u7

0 0 0

1 0 0

1 1 0

1 1 1

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It can be recognized that with respect to transistor switching losses the most favourable sequence is to switch every transistor pair only once within a pulse period. If the last switching state was u0, this would be the sequence u0 ) u1 ) u2 ) u7 but if the last switching state was u7, this would be u7 ) u2 ) u1 ) u0 With this strategy the switching losses of the inverter become minimal. Different strategies will arise if other criteria come into play (refer to Sects. 2.5.1, 2.5.3). If the switching states of two pulse periods succeeding one another are plotted exemplarily a well-known picture from the pulse width modulation technique arises (Fig. 2.4). Figure 2.4 clarifies that the time period Tp for the realization of a voltage vector is only one half of the real pulse period Tp. Actually, in the real pulse period Tp two vectors are realized. These two vectors may be the same or different, depending only on the concrete implementation of the modulation. Until now the process of the voltage vector realization was explained for the sector S1 independent of the vector position within the sector. With the other sectors S2–S6 the procedure will be much alike: splitting the voltage vector into its boundary components which are orientated in the directions of the two neighboring standard vectors, every vector of any arbitrary position can be developed within the

Fig. 2.4 Pulse pattern of voltage vectors in sector S1

2.1 Principle of Vector Modulation

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whole vector space. This statement is valid considering the restrictions which will be discussed in Sect. 2.3. The following pictures give a summary of switching pattern samples in the remaining sectors S2 … S6 of the vector space (Fig. 2.5).

Fig. 2.5 Pulse pattern of the voltage vectors in the sectors S2… S6

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From the fact, that: 1. the current controller delivers the reference value of a new voltage vector us to the modulation after every sampling period T, and 2. every (modulation and) pulse period Tp contains the realization of two voltage vectors, the relation between the pulse frequency fp = 1/Tp and the sampling frequency 1/T is obtained. The theoretical statement from Fig. 2.4 is that two sampling periods T correspond to one pulse period Tp. However this relationship is rarely used in practice. In principle it holds that the new voltage vector us provided by the current controller is realized within at least one or several pulse periods Tp.

Thereby it is possible to find a suitable ratio of pulse frequency to sampling frequency, which makes a sufficiently high pulse frequency possible at a simultaneously sufficiently big sampling period (necessary because of a restricted computing power of the microcontroller). In most systems fp is normally chosen in the range 2, 5–20 kHz. Figure 2.6 illustrates the influence of different pulse frequencies on the shape of voltages and currents.

Fig. 2.6 Pulse frequency fp and the influence on the stator voltage as well as the stator current. 1 pulsed phase-to-phase voltage; 2 fundamental wave of the voltage; 3 current

2.2 Calculation and Output of the Switching Times

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2.2 Calculation and Output of the Switching Times After the principle of the space vector modulation has been introduced, the realization of that principle shall be discussed now. Eventually the inverter must be informed on “how” and respectively “how long” it shall switch its transistor pairs, after the voltage vector to be realized is given with respect to modulus and phase angle. Thanks to the information about phase angle and position (quadrant, sector) of the voltage vector the question “how” can be answered immediately. From the former section the switching samples for all sectors as well as their optimal output sequences with respect to the switching losses are already arranged. The question “how long” is subject of this section. From Eqs. (2.2), (2.3) it becomes obvious, that the calculation of the switching times Tr, Tl depends only on the information about the moduli of the two boundary vectors ur, ul. The vector us (Fig. 2.7) is predefined by: 1. Either the DC components usd, usq in dq coordinates. From these, the total phase angle is obtained from the addition of the current angular position ϑs of the coordinate system (refer to Fig. 1.2) and the phase angle of us within the coordinate system. usq #u ¼ #s þ arctan ð2:4Þ usd 2. Or the sinusoidal components usα, usβ in αβ coordinates. This representation does not contain explicitly the information about the phase angle, but includes it implicitly in the components. Therefore two strategies for calculation of the boundary components exist. 1. Strategy 1: At first, the phase angle ϑu is found by use of the Eq. (2.4), and after that the angle γ according to Fig. 2.7 is calculated, where γ represents the angle ϑu reduced to sector 1. Then the calculation of the boundary components can be Fig. 2.7 Possibilities for the specification of the voltage vector us

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performed by use of the following formulae, which is valid for the whole vector space: 2 2 ð2:5Þ jur j ¼ pffiffiffi jus j sinð60 cÞ ; jul j ¼ pffiffiffi jus j sinðcÞ 3 3 With: jus j ¼

qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi u2sd þ u2sq

ð2:6Þ

2. Strategy 2: After the coordinate transformation, the stator-fixed components usα, usβ are obtained from usd, usq. For the single sectors, ur and ul can be calculated using the formulae in Table 2.3. The proposed strategies for the calculation of the switching times Tr, Tl are equivalent. The output of the switching times itself depends on the hardware configuration of the used microcontroller. The respective procedures will be explained in detail in the Sect. 2.4. The application of the 2nd strategy seems to be more complicated in the first place because of the many formulae in Table 2.3. But at closer look it will become obvious that essentially only three terms exist. 1 1 2 a ¼ jusa j þ pffiffiffiusb ; b ¼ jusa j pffiffiffiusb ; c ¼ pffiffiffiusb 3

3

3

ð2:7Þ

With the help of the following considerations the phase angle of us can be easily calculated. 1. By the signs of usα, usβ one finds out in which of the four quadrants the voltage vector is located.

Table 2.3 Moduli of the boundary components ur, ul dependent on the positions of the voltage vectors

jur j

S1

Q1

S2

Q1 Q2

S3

Q2

S4

Q3

S5

Q3 Q4

S6

Q4

1 jusa j pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 2 pffiffiffi usb 3 1 jusa j pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 2 pffiffiffi usb 3

jul j 2 pffiffiffi usb 3

1 jusa j þ pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 1 jusa j pffiffiffi usb 3 2 pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 1 jusa j þ pffiffiffi usb 3 1 jusa j pffiffiffi usb 3

2.2 Calculation and Output of the Switching Times

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2. Because the moduli of ur and ul are always positive, and because the term b changes its sign at every sector transition, b can be tested on its sign to determine to which sector of the thus found quadrant the voltage vector belongs.

2.3 Restrictions of the Procedure For practical application to inverter control, the vector modulation algorithm (VM) has certain restrictions and special properties which implicitly must be taken into account for implementation of the algorithm as well as for hardware design.

2.3.1 Actually Utilizable Vector Space The geometry of Fig. 2.3 may lead to the misleading assumption that arbitrary vectors can be realized in the entire vector space which is limited by the outer circle in Fig. 2.8b, i.e. every vector us with jus j 2 UDC =3 would be practicable. The following consideration disproves this assumption: It is known that the vectorial addition of ur and ul is not identical with the scalar addition of the switching times Tr and Tl. To simplify the explanation, the constant half pulse period which, according to Fig. 2.4, is available for the realization of a vector is replaced by Tp=2 ¼ Tp =2. After some rearrangements of Eq. (2.2) by use of (2.5) the following formula is obtained. TR ¼ Tr þ Tl ¼

pffiffiffi jus j 3 Tp=2 cosð30 cÞ UDC

ð2:8Þ

In case of voltage vector limitation, that is jus j ¼ 2 UDC =3, it follows from (2.8): 2 TR max ¼ Tp=2 pffiffiffi cosð30 cÞ 3

with

0 c 60

ð2:9Þ

Fig. 2.8 Temporal (a) and spacial (b) representation of the utilizable area for the voltage vector us

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The diagram in Fig. 2.8a shows the fictitious characteristic of TΣmax at excess of the half pulse period Tp/2. By limitation of TΣ to Tp/2 the actually feasible area is enclosed by the hexagon in Fig. 2.8b. In some practical cases—e.g. for reduction of harmonics in the output voltage— the hexagon area is not used completely. Only the area of the inner, the hexagon touching circle will be used. The usable maximum voltage is then: 1 jus jmax ¼ pffiffiffi UDC 3

ð2:10Þ

Thus the area between the hexagon and the inner circle remains unused. Utilization of this remaining area is possible if the voltage modulus is limited by means of a time limitation from TΣ to Tp/2. To achieve this, the zero vector time is dispensed with, and only one transistor pair is involved in the modulation in each sector (refer to Fig. 2.20, right). A direct modulus limitation will be discussed later in connection with the current controller design. An important characteristic for the application of the VM is the voltage resolution Δu, which for the case of limitation to the inner circle or at use of Eq. (2.10) can be calculated as follows: 2 Dt Du ¼ pffiffiffi UDC ½V 3 Tp

ð2:11Þ

At deeper analysis, restricted on the hexagon only, it turns out that the zero vector times become very small or even zero if the voltage vector approaches its maximum amplitude. This is equivalent to an (immediate) switch on or off of the concerned transistor pair after it has been switched off or on. For this reason the voltage vector modulus has to be limited to make sure the zero vector times T0 and T7 never fall below the switching times of the transistors. For IGBT´s the switching times are approx.