Feb 25, 2015 - operating voltages of energy sources vary with environment, and 2) Different ... When the rising edge comes, the body is pre-depleted through Cb ... with switching body biasing and adaptive dead-time for efficiency.
ISSCC 2015 / SESSION 20 / ENERGY HARVESTING AND SC POWER CONVERSION / 20.7 20.7
A 0.45-to-3V Reconfigurable Charge-Pump Energy Harvester with Two-Dimensional MPPT for Internet of Things
Xiaosen Liu, Edgar Sanchez-Sinencio Texas A&M University, College Station, TX Compared with inductive DC-DC boost converters [1], the charge pump (CP) features no off-chip inductors and is suitable for monolithic low power energy harvesting applications such as Internet of Things (IoT) smart nodes. However, the single conversion ratio (CR) CP has a narrow input voltage range. This induces a charge redistribution loss (CRL) and becomes a bottleneck preventing highly efficient energy harvesting [2]. CRL stems from two facts: 1) The operating voltages of energy sources vary with environment, and 2) Different energy sources feature a wide range of output voltages. By tuning the CR as one dimension, reconfigurable CPs can eliminate CRL; however, they need complex control algorithms, lack maximum power point tracking (MPPT) [3], and only provide fractional ratios [4]. Thus, they are not preferable for energy harvesting from various sources. Due to the environment-dependent characteristics of energy sources, utilizing the MPPT technique is mandatory. Another challenge is that the MPPT module often needs complex circuitry [5] and the power consumption of this circuitry affects the conversion efficiency. Thus, MPPT is difficult to apply in the μW level harvesting for IoT power management. In this paper, a CP energy harvester featuring high efficiency and a wide input range in a low power scenario is developed for the power management of IoT smart nodes. It dynamically reconfigures its CR in both integral and fractional parts. The adaptive changing mechanism is incorporated as part of the MPPT procedure. The impedance of the CP is matched in terms of both conversion ratio and switching frequency, which benefits both wide input range for various energy sources and optimized harvesting efficiency at the same time. Furthermore, to eliminate the power hungry current sensor, detailed MPPT sensing is conducted in the voltage-domain by peak value comparison. A constant on-time mechanism is utilized to regulate the output voltage to 3.3V low-voltage TTL (LVTTL). Figure 20.7.1 shows the architecture of the reconfigurable energy harvesting system. The harvested energy sources could be photovoltaic (PV), thermoelectric, or piezoelectric, among others. For a regulated 3.3V LVTTL output voltage, the allowable input voltage range is extended from 0.45 to 3V. The system is composed of one forward path and two feedback loops: one for regulation and one for MPPT. In the forward path, a reconfigurable CP boosts the input voltage, Vs, to the required level and delivers its energy to the load of IoT smart nodes. In the regulation loop, the constant on-time scheme, which is designed as 16 clock cycles, runs the CP. After that period, the CP is turned off, and Vout is discharged. Once Vout is lower than the 3.3V reference, the CP switches on again for the next 16 clock cycles. In the MPPT loop, which uses a hill-climbing algorithm, the impedance of the CP, Zcp, is two-dimensionally tuned by CR and the switching frequency, fs. The MPPT module uses the peak value of Vout as the power indicator and, hence, higher Vout means better impedance matching, higher output power, and a better operating point. The CR-voltage-efficiency relation is shown in Fig. 20.7.1. The conventional single-CR CP only achieves sole peak efficiency at a certain Vs. However, this work tunes the CR from 8 down to 11/3 in steps. Thus, the harvesting efficiency across various input voltages from 0.45 to 3V is flattened and is higher than 75% as the combined red line. Because the CR is reconfigured, the resulting Zcp in Fig. 20.7.1 is also tuned. Thus, the CR tuning is part of the MPPT procedure. Figure 20.7.2 shows the architecture of the reconfigurable CP. It stems from the generic structure of a voltage doubler. By manipulating the input nodes of each stage with SM1-6, the nested 4 stages can provide a variable CR as 11/3, 12/3, … 41/3, 42/3, 5, 6, 8. With the CR selecting signal SM5, the 1st stage provides 1Vs and 2Vs at its output nodes V1L and V1R. Based on that, the 2nd stage provides 1Vs, 2Vs, 3Vs, and 4Vs at V2L and V2R. The fractional voltage is implemented in the 3rd stage, where SM6 selects 1/3Vs or 2/3Vs. The final combination is executed in the
370
• 2015 IEEE International Solid-State Circuits Conference
4th stage, where SM1 and SM2 choose the boosting sources from other stages through a 4b demultiplexer. The final output voltage, Vout, is extracted from V4L and V4R with complementary clocks SF7 and SF8. Considering the wide range of Vs, the conventional transmission switches do not have passing capability for low voltage and blocking capability for high voltage at the same time. Thus, self-switching body biasing (SSBB) is needed for each PMOS power transistor as Mx in Fig. 20.7.2. Differing from conventional SBB approach, which uses auxiliary controllers and consumes additional energy [6], Mx uses an Rb-Cb filter for transiently increasing the body bias and reducing conduction loss on the falling edge. When the rising edge comes, the body is pre-depleted through Cb and improves its blocking resistor. Note that CRs as 7, 71/3, 72/3, 61/3, … 51/3 cannot be generated from this topology. However, as shown in Fig. 20.7.1, the efficiency degradation becomes insensitive to Vs deviation due to its smaller value. Therefore, CR=6 and CR=8, which still ensures a minimum 76% efficiency for input voltages from 0.45 to 0.65V. Shoot-through current and its energy loss increase quadratically with boosting voltages. Another loss is the flow-back leakage current between cascaded stages during switching. Adding non-overlapping time on two levels solves such problems. The local non-overlapping (LNO) module, as shown in Fig. 20.7.2, adds a 1ns offset between the signals controlling low-side and high-side switches. A global non-overlapping circuit, as shown in Fig. 20.7.3, generates the switching signals for the 4 stages, SF1-F7. They have cascaded and incorporated shapes, which ensure no shoot-through and flow-back currents during boosting. Differing from the conventional approach, SF1-F7 are achieved by the delay line T1-4 and P1-4 in the two feedback paths through two logic modules. Figure 20.7.4 shows the architecture of the two-dimensional MPPT module and its searching procedure. A finite-state machine (FSM) composes the MPPT controller. At the beginning of the MPPT procedure, the FSM changes SM1-6 and steps down CR from 8 to 11/3. For each state, the CP is operated with a constant on-time scheme, and a S/H circuit records the peak value of Vout. Then the CP is halted for discharging to the 3.3V reference. The neighboring two peak values, Vout,now and Vout,past indicate the nonlinear characteristics of the energy sources. Vout,now > Vout,past means more energy is pumped into the load during the on-time thereby achieving a better operating point. If Vout,now ≤ Vout,past, the MPP is already achieved and the CP is locked to that CR. After the optimal CR is achieved, the MPPT controller starts sweeping fs to track the optimal Vs. The switching clock is generated by a current-starved ring oscillator programmed and tuned from 20kHz up to 1MHz. Figure 20.7.5 demonstrates the transient MPPT tracking waveform for a thermoelectric pile. First, the optimal CR is captured as 4 and then fs is tuned to 286kHz for a maximum peak Vout. Figure 20.7.6 shows the tracking performance for two different PV cells and one thermoelectric pile with 1.2V, 2.5V, and 0.6V nominal values, respectively. Compared with the simulated single-CR CP and previous works, this paper utilizes the two-dimensional MPPT to eliminate the CRL and achieves a high efficiency over a wide 0.45-to-3V input range for various energy sources. References: [1] S. Bandyopadhyay, et al., “A 1.1nW energy harvesting system with 544pW quiescent power for next-generation implants,” ISSCC Dig. Tech. Papers, pp. 396-397, Feb. 2014. [2] Y. Shih, B.P. Otis, “An Inductorless DC–DC Converter for Energy Harvesting With a 1.2-μW Bandgap-Referenced Output Controller,” IEEE Trans. Circuits and Systems-II: Express Briefs, vol. 58, pp. 832-836, Dec. 2011. [3] W. Jung, et al., “A 3nW fully integrated energy harvester based on selfoscillating switched-capacitor DC-DC converter,” ISSCC Dig. Tech. Papers, pp. 398-399, Feb. 2014. [4] L. G. Salem, P. P. Mercier, “An 85%-efficiency fully integrated 15-ratio recursive switched-capacitor DC-DC converter with 0.1-to-2.2V output voltage range,” ISSCC Dig. Tech. Papers, pp. 88-89, Feb. 2014. [5] H. Kim, et. al, “An Energy-Efficient Fast Maximum Power Point Tracking Circuit in an 800-μW Photovoltaic Energy Harvester,” IEEE Trans. Power Electronics, vol. 28, pp. 2927-2935, June 2013. [6] J. Kim, P.K.T. Mok, C. Kim, “A 0.15V-input energy-harvesting charge pump with switching body biasing and adaptive dead-time for efficiency improvement,” ISSCC Dig. Tech. Papers, pp. 394-395, Feb. 2014.
978-1-4799-6224-2/15/$31.00 ©2015 IEEE
ISSCC 2015 / February 25, 2015 / 10:45 AM
Figure 20.7.1: The harvester and the 2-D MPPT procedure.
Figure 20.7.2: The reconfigurable CP with SSBB and LNO.
Figure 20.7.3: The global non-overlapping signals.
Figure 20.7.4: The 2-D MPPT and its procedure.
20
Figure 20.7.5: MPPT tracking for a thermoelectric pile.
Figure 20.7.6: Efficiency and performance comparison.
DIGEST OF TECHNICAL PAPERS •
371
ISSCC 2015 PAPER CONTINUATIONS
Figure 20.7.7: Die micrograph.
• 2015 IEEE International Solid-State Circuits Conference
978-1-4799-6224-2/15/$31.00 ©2015 IEEE
