Key Research Issues for Reconfigurable Network ... - Semantic Scholar

6 downloads 52 Views 141KB Size Report
Email: rachid.dafali@univ-ubs.fr. Abstract—Network on chip (NoC) has emerged as the design paradigm for scalable System on Chip with harsh bandwidth ...
2008 International Conference on Reconfigurable Computing and FPGAs

Key Research Issues for Reconfigurable Network-on-Chip R.Dafali, J-Ph.Diguet and M.Sevaux Universit´e Europ´eenne de Bretagne - UBS / CNRS Lab-STICC dept., BP 92116, F-56321 Lorient Cedex, FRANCE Email: [email protected] Abstract—Network on chip (NoC) has emerged as the design paradigm for scalable System on Chip with harsh bandwidth requirements. However, current NoCs remain not flexible enough to support communication dynamic behaviors (size, instances) inherent to a growing majority of embedded systems. Few solutions have been proposed to make NoC reconfigurable using different methods but, to the best of our knowledges, none of them has a clear and reusable design methodology. The first objective of this paper is to propose an overview of existing work as a starting point for research in this domain. Then to deal with the current situation, we introduce a description of a dynamic reconfiguration model for NoC and enumerate several outstanding research issues organized on three topics: dynamic reconfiguration administration, network infrastructure reconfiguration and network protocols reconfiguration.

I. I NTRODUCTION The design of recent Systems-on-Chip (SoC) for a large scope of applications, such as telecom and multimedia domains, and in various platform types ranging from dedicated platforms to fully programmable platforms is mainly constrained by on-chip communications. Networks-on-Chip (NoCs) have recently emerged as a promising concept to support communication on SoCs providing a solution to connect different IP-cores through an effective, modular, and scalable communication network. In recent years, the introduction of hard and soft processor cores into reconfigurable circuits, exploiting the flexibility of FPGA, has changed the job and horizon of designers by providing them with complete Reconfigurable System-on-Chip (RSoC). This evolution is also driven by key industry issues such as design productivity and embedded system reliability that turn RSoC into viable solutions for embedded systems design. Moreover we observe that standard NoCs remain not flexible enough to support dynamic environments where communication characteristics are strongly changing at runtime. Actually, in such a context current NoC CAD approaches based on path and time-slot allocation (e.g. [17], [18]) or on simulation (e.g. Arteris [1]) can lead

978-0-7695-3474-9/08 $25.00 © 2008 IEEE DOI 10.1109/ReConFig.2008.72

to extra cost since worst-cases must be considered to support communication demand fluctuations including peaks. Thus, a new NoC design methodology, which provides adaptivity of the infrastructure resources and of the network protocols emerge as an alternative solution to face current constraints. Developing such a design methodology for Reconfigurable NoC-based communication, opens a new area of research by considering dynamic and partial reconfiguration. The objective of this paper is to highlight some fundamental issues in Reconfigurable NoC (RNoC) design, and propose a model for NoC dynamic reconfiguration in connection with features of the OSI network layer. This paper is organized as follows. First, we introduce a novel dynamic reconfiguration model for reconfigurable network-on-Chip design flow. Then, in section 2, 3 and 4, we discuss several outstanding research issues and suggest some open problems. Finally we compare the different existing design methods for RNoC. II. R ECONFIGURABLE N O C DESIGN METHODOLOGY This section presents the dynamic reconfiguration model and defines the layered abstraction-based view. The model is derived from standard network abstraction models in particular OSI (Open Systems Interconnection) and is adapted to RNoC. A. Dynamic reconfiguration model The embedded systems development is based on hardware and software resources that are physically separated but cooperate to achieve various tasks. The architecture is therefore composed of a set of components collaborating to execute application(s). At run-time communication requirements can change according to data dependency of application needs, to user choices in terms of concurrent application choices, architecture hazards (cache coherency for instance) and network access conditions (data-rate, protocols, standards). It can also depend on architecture reconfiguration itself in order to implement or remove given functional blocks. Moreover,

181

Authorized licensed use limited to: UNIVERSITE DE BRETAGNE SUD. Downloaded on September 4, 2009 at 02:39 from IEEE Xplore. Restrictions apply.

Dynamic reconfiguration process

Validation

Dynamic reconfiguration design area

The New Configuration

Construction Administration

NoC Layers

Decision

System

Network Adapter Execution Network

Dynamic Reconfiguration Infrastructure

Dynamic Reconfiguration protocols

Provide the new configuration

Collect run time communication information

Data Link

Link system Reconfiguration performed

Fig. 1.

Illustration of the dynamic reconfiguration process and design method for reconfigurable NoC according to network layers

it is increasingly needed to be able to change the system architecture in order to add new services, which were not defined or known at design time. To cope with these changes caused by ’natural’ consequences of the system evolution, the designer must include a control mechanism that transforms and adapts HW/SW environmental parameters to the new process and execution conditions, without incurring any system downtime or interruption. This mechanism is called the Dynamic Reconfiguration (DR). The principle of DR model proposed in [9], [10] is organized around three stages: 1) The Validation Process: The system can be considered as an implementation of many specifications, which consists of logical parameters and a physical structure. Hence its reconfiguration is presented in the form of changes in specifications, such as adding, modifying or removing components from the environment. The validation step ensures that changes made by new specification are compatible with the logical and physical architecture of the system. 2) The Configuration Management: The configuration manager translates the valid changes expressed for the configuration specification into executable commands to the operating system to change the current system. This translation requires knowledge of the state of the system. The required information can be obtained from a database managed by the configuration manager, and fed

continuously by the updates from the different components of the system. 3) The Execution Process: The operating system assembles, builds up and installs the new configuration on the system, according to the instructions sent by the configuration manager. This DR model is based on an approach which does not include a decision-making process, because it considers that the decision depends on the designer strategy for the implementation of the DR. So to extend the above model in order to have a complete design methodology, we are adding a new level of abstraction to it through the integration of the decision process of DR. Figure 1 illustrates our proposed DR model for NoC, this representation is based on an approach where the configuration manager (System) decides, validates, and builds a new configuration, according to information content collected by the network adapter. Then the system provides the new configuration to be performed on the NoC infrastructure and protocols through the network adapter. B. A Layered Design Methodology The operating process of the NoC can be represented by the simplified OSI model of computer networks [3]. In Benini and Micheli [2] and Arteris [1], it was shown that the OSI model of layered network communication can easily be adapted for NoC usage. This model does not define services and protocols to be used for each layer, but nevertheless it describes

182

Authorized licensed use limited to: UNIVERSITE DE BRETAGNE SUD. Downloaded on September 4, 2009 at 02:39 from IEEE Xplore. Restrictions apply.

what the network must achieve at each level. We use this model since it allows the interconnection of heterogeneous systems by adapting the changing flow of information to be processed. The application of a DR on a NoC implies to modify protocols and standards of one or more layers of the OSI model. Figure 1 shows our design methodology of RNoC according to the properties and functions of individual NoC layers: • system: it represents the operative part of the reconfiguration, its global knowledge of the application and network architecture provides the parameters to decide, validate, and implement a new configuration. • network adapter: it introduces adaptation protocol between IP and the network. Its knowledge of the number of messages transmitted, consumed, blocked or rejected, allows it to collect the necessary information needed by the system to decide concerning the new implementation of reconfiguration. • network: it defines the routing technique used for delivery of packages through the network and topology. Thus the system can reconfigure and modify protocols in this layer amending: – The network topology. – The routing algorithm. – The switching technique. • The data link: it manages network resources to deliver a packet, reconfiguration at this layer can handle data exchange protocol between routers, multiplexing methods (e.g TDMA or SDMA) and techniques of detection and correction of errors. In this section, we have defined the model of the DR and its correspondence with NoC layers. This correspondence induces a new design area composed of three axes (left side of Figure1). The first defines the administration methods (decision, validation, and execution) of DR. This administration can be integrated at different levels (system or network adapter). The second and third axis analyze the changes that may be introduced respectively on the structure and network protocols to implement the DR.

IP

IP

IP

DM

DM

NA

NA

DM NA

R

Configuration Manager DR Rules R Router DM Delegate manager NA Network Adapter

DM NA

R

IP

NoC NA

R

R

NA DM

NA

NA

DM

DM

IP

IP

IP

Fig. 2. Administration Management Partitioning for Dynamic Reconfiguration of NoC.

the latency depending on the communication type and priority. The configuration manager is responsible for the administration, and its deployment must adhere to the following points to ensure a dynamic and runtime reconfiguration: • The system must ensure the management of coherency and maintain the quality of service of the network. By ensuring that all changes with a new configuration do not have any inconsistency or negative impact on network performance. • The system must enable a delegation of decisionmaking, validation and implementation of one or more components of the network. Because the centralized management requires more infrastructure and increases the time for implementation. • The system must manage the evolution of hardware or software components. It ensures an exact knowledge of the infrastructure and elements connected to the network in case a new component is added dynamically. • The system should minimize disruption. The deployment of a new configuration should monopolize the minimum elements of the network to ensure continuity in transfers not affected by the new configuration. B. Current existing Approaches

III. DYNAMIC R ECONFIGURATION A DMINISTRATION

Most solutions proposed for the RNoC design do not integrate any administration strategy. With the exception of the approach defined in [14], [15], which present a method that incorporates an Operating System (OS). The role of the OS is to manage the allocation of resources and to minimize the number of blocked packets in the NoC. For this reason, it uses a management model

A. Definition The administration deals with the management of each component of the network, and also the management of the global configuration. Its ultimate goal is to maintain the overall behavior according to quality of services constraints, which can be the throughput and/or

183

Authorized licensed use limited to: UNIVERSITE DE BRETAGNE SUD. Downloaded on September 4, 2009 at 02:39 from IEEE Xplore. Restrictions apply.

based on the collection, analysis, and interpretation of statistical blocked and consumed packets. This statistic of network traffic enables the OS to regulate the time slot during which each network element will send their packets. In addition the OS dynamically adjusts the routing in the NoC. However, the dynamic routing adaptation is not performed at run-time, and requires the total cessation of traffic, which makes the system unworkable throughout the period of reconfiguration. In addition, the OS administration doubles the cost of NoC in terms of surface and energy consumption because it must use an independent network to collect the control messages from the NI. Finally no details are given about the policies implemented for deciding the size of network access windows. C. Open Issues The administration of DR is effective when it respects the rules of coherency, quality of services, delegation, and disruption. To realize this class of administration, it must be shared between the manager (e.g. OS) and network components (e.g. network adapter). Consequently, the manager will have the role of supervisor, monitor, and intervenes only to make total reconfiguration of the network. While the components can administer the reconfiguration of certain mechanisms (e.g. buffer sizing, priority, TDMA table). This technique of DR administration includes a distribution and a delegation of management. As shown in Figure 2, the delegate manager decides, validates and achieves partial reconfiguration according to the rules established by the supervisor and it stands to inform the supervisor of the state of the network. The configuration manager assembles the administration rules for each delegate manager according to the overall network state. Moreover, it is able to configure directly a part or the full network. Such an approach has been presented in the very specific domain of security management in [8]. This method represents a suggestion to integrate an efficient DR administration for RNoC design. However, the efficient and low cost management of RnoC configurations remains an open problem.

dynamic buffer sizing, and dynamic link bitwidth distribution. A. Current existing Approaches Previous works for adapting NoC architecture target network topology reconfiguration. The first solution addressed in [5] is called circuit switched. This approach allows modules, which are willing to communicate, to establish a physical connection by setting some multiplexers on the communication links. Other methods addressed in [4], [16] adapt the number of switches and their location by a partial DR when hardware modules are inserted or removed. The realization of these approaches strongly depends on the characteristics of the underlying hardware. To make use of dynamic topology reconfiguration a homogeneous FPGA, which is dynamically reconfigurable at logic block level, is required. B. Open Issues The NoC structure reconfiguration at run-time offers the ability to effectively circulate communications according to the new constraints. So far, the solutions proposed to adapt the network structure by removing or adding switches require the use of a reconfigurable device and demand a significant overhead for implementation. Some studies, such as [19] use an intelligent switch where it combines packet-switching and physical circuitswitching. This arrangement offers more flexibility in topology reconfiguration. But there is still a lot of work to be done in order to build the switch which consumes the minimum of power and area. The network topology is not the only point of investigation we can be explored to achieve a reconfiguration of the NoC infrastructure. Indeed, the reconfiguration of the size of the buffer represents an opportunity to reduce the surface and the energy consumption of NoC. Several solutions exist to scale the size of buffers at design time. But so far, no research has been conducted to change dynamically the size of the buffer. V. DYNAMIC R ECONFIGURATION P ROTOCOLS

IV. DYNAMIC R ECONFIGURATION I NFRASTRUCTURE

The main goal of the NoC is to support the end-toend communication between the modules at the specified Quality-of-Service (QoS). To support the QoS requirements, the NoCs must define and include a specific network protocols, which determine the Data switching technique, the addressing and routing technique, the multiplexing technique, the end-to-end congestion and the flow control schemes.

The NoC infrastructure is the combination of various elements (routers, network interfaces, and links) that determine the communication architecture. At runtime, adding or removing configured hardware modules in ReSoC structure and changing constraints for the communication need a dynamic communication infrastructure which provides the features of adaptivity in topology,

184

Authorized licensed use limited to: UNIVERSITE DE BRETAGNE SUD. Downloaded on September 4, 2009 at 02:39 from IEEE Xplore. Restrictions apply.

Research and design methods

Concept

Dynamic Reconfiguration Administration

Dynamic Reconfiguration Infrastructure

Dynamic Reconfiguration Protocols

Operating system controlled NoC [15]

Includes an OS that can manage communication on a NoC. The OS optimizes communication resource allocation and minimizes interaction between concurrent applications.

Operating System.

Not defined.

Dynamic Injection rate control and routing adaptation.

Dynamic Time-Slot Allocation [11]

Proposes an algorithm to dynamically perform routing and allocation of guaranteed communication resources on NoC that provides QoS with TDMA techniques.

Extended Iterative deepening algorithm. (IDA)

Not defined

Dynamic Time-slot allocation and routing adaptation.

DyNoC (Dynamic Network-on-Chip) [4]

Consists in processing elements surrounded by huge number of switches. At run-time, switches can be disabled and their hardware resources can be reused for dynamically inserted hardware modules. Routing is realized as an extension of the XY algorithm which is capable of surrounding obstacles.

Not defined.

Network topology reconfiguration.

Update the routing protocol.

CoNoChi (Configurable [16]

Adapts network structure to the location, number and size of currently configured hardware modules. Switches can be added or removed from the network by a global instance at runtime.

Global control instance of the system.

Network topology reconfiguration.

Update the routing protocol.

ViChaR (Virtual Channel Regulator) [13]

Introduces a centralized buffer architecture, which dynamically allocates virtual channels and buffer slots in real-time, depending on traffic conditions.

Unified Control Logic (UCL).

Not defined.

Dispensing dynamically a variable of VCs on demand.

Undisrupted Qualityof-service during NoC reconfiguration [7]

This work present a model that enables partial reconfiguration of NoC and an algorithm that uses the model to map multiple applications onto a NoC, delivering undisrupted QoS during reconfiguration.

Unified mapping and configuration algorithm.

Not defined.

Dynamic selection of QoS constrained paths.

ReNoC (Reconfigurable Network-onChip) [19]

NoC architecture viewed by the application as a logical topology built on top of the real physical architecture. To create this application-specific topologies, ReNoC combines packet-switching and circuit-switching in the same topology switch.

Not defined.

Network topology reconfiguration.

Dynamic combination of packet-switching and circuitswitching.

NoC)

TABLE I SURVEY OF RESEARCH AND DESIGN METHODS FOR RECONFIGURABLE N O C AND COMPARISON OF THESE METHODS ACCORDING TO DYNAMIC RECONFIGURATION ADMINISTRATION , INFRASTRUCTURE AND PROTOCOLS .

A. Current existing Approaches The DR of a NoC implies a change in the quality of service requirements. In term of protocols, this change impose the exploration and the calculation of a new routing paths and new multiplexing technique for time slots distribution. Several studies have suggested algorithms and methods for dynamically calculating either paths or slots table. In [7], the authors presented a model that enables spatial reconfiguration of NoC and an algorithm that uses the model to map multiple applications onto a NoC, delivering undisrupted QoS. This solution presents several limitations. First, it considers only static applications, defined at design time. Secondly, the run time choices are restricted to choosing from a number of precomputed compositional NoC configurations. In [12], the authors propose a dynamic and fast routing algorithm based on self-routing algorithm for

multiprocessor systems with shuffle interconnections [6]. This algorithm takes only one clock cycle to compute the shortest path. But, this approach is quite restrictive since it imposes a De Bruijn network topology and packet length limited to a single one PHysical uniIT (phit), it is nevertheless particularly adapted to turbocommunication applications. In [11], the authors developed a fast heuristic to perform dynamic time-slot allocation on NoC that provides hard-guaranteed QoS with TDMA techniques, but this approach is applied only for regular networks based on mesh topology. B. Open Issues These solutions are developed in a way that requires knowledge of the various changes that are applied on RNoC for a given configuration. Actually we can distinguish two kinds of situations, the first one corresponds

185

Authorized licensed use limited to: UNIVERSITE DE BRETAGNE SUD. Downloaded on September 4, 2009 at 02:39 from IEEE Xplore. Restrictions apply.

to mode changes, in such a case the transition from a set of applications or standards to another usually offers opportunities, for instance based on anticipation and initialization phases, to launch runtime heuristics for computing new path and time-slot allocation. The second case is intrinsically dynamic and corresponds to communication natural variations for a given set of applications. To optimally adapt RNoC to unforeseen changes and guarantied communications, we must develop algorithms providing a safe and smooth adaptation scheme in order to obtain low cost solutions for run-time spatiotemporal exploration and assignment of paths and time slots. VI. D ISCUSSION To complete our investigation work on reconfigurable NoC, a survey of some research and design methods for RNoC is presented in Table I. Comparison of these methods is done according to dynamic reconfiguration administration, infrastructure and protocols. We found that most methods do not cover the three areas which have been defined in our NoC dynamic reconfiguration model. The solution addressed in [16] presents a methodology which is based on the three axes except that the administration is simple because it is based on a global control instance of the system. Although the solution presented in [15] offers a complete administrative system based on an operating system though no OS policies are really proposed and the area and power overhead must be dramatically decrease to obtain viable and acceptable solutions. VII. C ONCLUSION In this paper, we have presented different horizons of research in the field of RNoC. We have proposed a dynamic reconfiguration model for RNoC based on the correspondence with NoC layers. And we have offered a design methodology based on three axes: The administration, the reconfiguration of infrastructure and the reconfiguration of protocols. We have detailed each one of the axes including motivation, state of art, open research issues and methods. This work provides the core scheme of our current work in the domain of RNoC, that is focused on a controlled tradeoff between quality of service and overhead at the three levels of decision: administration, infrastructure and protocols. R EFERENCES [1] Arteris. A comparison of network-on-chip and busses. White paper., 2005. [2] L. Benini and G. De Micheli. Powering networks on chips. System Synthesis, 2001. Proceedings. The 14th International Symposium on, pages 33–38, 2001. [3] T. Bjerregaard and S. Mahadevan. A survey of research and practices of network-on-chip. ACM Computing Surveys, 38, 2006.

[4] C. Bobda, A. Ahmadinia, M. Majer, J. Teich, S. Fekete, and J. van der Veen. Dynoc: A dynamic infrastructure for communication in dynamically reconfugurable devices. Int. Conf. on Field Programmable Logic and Applications, Aug. 2005. [5] L. Braun, M. Hubner, J. Becker, T. Perschke, V. Schatz, and S. Bach. Circuit switched run-time adaptive network-on-chip for image processing applications. Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on, pages 688–691, Aug. 2007. [6] C. Francalanci and P. Giacomazzi. High-performance self-routing algorithm for multiprocessor systems with shuffle interconnections. Parallel and Distributed Systems, IEEE Transactions on, 17(1):38–50, Jan. 2006. [7] A. Hansson, M. Coenen, and K. Goossens. Undisrupted qualityof-service during reconfiguration of multiple applications in networks on chip. Design, Automation, Test in Europe Conference and Exhibition, 2007. DATE ’07, pages 1–6, April 2007. [8] J-Ph.Diguet, S.Evain, R.Vaslin, G.Gogniat, and E.Juin. Noccentric security of reconfigurable soc. In 1st ACM/IEEE Int. Symp. on Networks-on-Chips, Princeton, USA, may 2007. [9] J. Kramer and J. Magee. Dynamic configuration for distributed systems. IEEE Transactions on Software Engineering, 11(4):424– 436, April 1985. [10] Jeff Kramer and Jeff Magee. The evolving philosophers problem: Dynamic change management. IEEE Trans. Softw. Eng., 16(11):1293–1306, 1990. [11] T. Marescaux, B. Bricke, P. Debacker, V. Nollet, and H. Corporaal. Dynamic time-slot allocation for qos enabled networks on chip. Embedded Systems for Real-Time Multimedia, 2005. 3rd Workshop on, pages 47–52, Sept. 2005. [12] H. Moussa, A. Baghdadi, and M. Jezequel. Binary de bruijn on-chip network for a flexible multiprocessor ldpc decoder. Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE, pages 429–434, June 2008. [13] C.A. Nicopoulos, Dongkook Park, Jongman Kim, N. Vijaykrishnan, M.S. Yousif, and C.R. Das. Vichar: A dynamic virtual channel regulator for network-on-chip routers. Microarchitecture, 2006. MICRO-39. 39th Annual IEEE/ACM International Symposium on, pages 333–346, Dec. 2006. [14] V. Nollet, T. Marescaux, P. Avasare, D. Verkest, and J.-Y. Mignolet. Centralized run-time resource management in a network-onchip containing reconfigurable hardware tiles. Design, Automation and Test in Europe, 2005. Proceedings, pages 234–239 Vol. 1, March 2005. [15] Vincent Nollet, Th´eodore Marescaux, Diederik Verkest, JeanYves Mignolet, and Serge Vernalde. Operating-system controlled network on chip. In DAC ’04: Proceedings of the 41st annual conference on Design automation, pages 256–259, New York, NY, USA, 2004. ACM. [16] Thilo Pionteck, Roman Koch, and Carsten Albrecht. Applying partial reconfiguration to networks-on-chips. In FPL, pages 1–6, 2006. [17] A. Radulescu, J. Dielissen, K. Goossens, E. Rijpkema, and Paul Wielage. An efficient on-chip ni offering guaranteed services, shared-memory abstraction, and flexible network configuration. In IEEE TCAD, 2004. [18] S.Evain and J-Ph.Diguet. Efficient space-time noc path allocation based on mutual exclusion and pre-reservation. In 17th ACM Great Lakes Symposium on VLSI (GLSVLSI), Italy, mar 2007. [19] M.B. Stensgaard and J. Sparso. Renoc: A network-on-chip architecture with reconfigurable topology. Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on, pages 55–64, April 2008.

186

Authorized licensed use limited to: UNIVERSITE DE BRETAGNE SUD. Downloaded on September 4, 2009 at 02:39 from IEEE Xplore. Restrictions apply.