Load Compensation using DSTATCOM with LCL

Load Compensation using DSTATCOM with LCL-Filter Controlled by SRF Theory Emre Kantar and Elisabetta Tedeschi Department of Electric Power Engineering Norwegian University of Science and Technology Trondheim, Norway

Abstract—This paper presents the operation of a Distribution Static Compensator (DSTATCOM) interfacing the grid with inductor-capacitor-inductor (LCL) type of a filter, which is controlled by using dq0 current controller and space vector pulse-width modulation (SVPWM) scheme for compensation of unbalanced nonlinear loads. A two-level voltage source inverter (VSI) to operate as the DSTATCOM is connected at the point of common coupling (PCC) through the interface filter and injects currents according to load reactive and harmonic powers. LCLfilter has superior switching ripple attenuation capability over L-filter at a smaller value of overall inductance. Therefore, in this study, the design of LCL-filter for high switching ripple attenuation is mentioned briefly, and design of proper dq0 current controller are presented in utmost detail. The dq0 current controller is implemented in synchronous reference frame (SRF) rotating at fundamental frequency and are composed of harmonic compensation (HC) regulator [realized by sum of sinusoidal signal integrators (SSI)] in parallel to proportional-integral (PI) regulator. Neutral current compensation to fix unbalance issue in the load is carried out through 0−axis controller. A simulation model of the DSTATCOM with LCL-filter is developed, and elaborate results of load and reactive power compensation are presented. Index Terms—DSTATCOM, HC regulator, LCL-filter, power quality, SVPWM, voltage source inverter.

I. I NTRODUCTION A DSTATCOM is a shunt connected device designed to make source currents balanced and sinusoidal with UPF operation. For this purpose, it injects currents at the PCC (point of common coupling) as a function of harmonic and reactive components of load demand along with source neutral current compensation in the event of load unbalance [1]. The DSTATCOM consists of a voltage source inverter (VSI) supported by a dc-bus and an interface filter connected to the PCC. This VSI can be controlled by different pulse-widthmodulation (PWM) schemes so as to inject the desired filter currents at the PCC. The conventional method to interface VSI to the PCC is performed through L-filter [2]. Yet, actual injected current consists of additional undesired switching ripples due to the PWM switching since the L-filter provides only an attenuation ratio of 20 dB/decade for the switching ripples. Moreover, under harmonic load conditions, these switching ripples are transferred (in presence of feeder impedance) to the PCC voltages, which can disturb other sensitive loads connected to the grid. On the other hand, inductor-capacitor-inductor

(LCL) type filter has superior switching ripple attenuation ratio of 60 dB/decade compared to L-filter [2]–[4], and this can be achieved with much smaller passive elements, especially with reduced filter inductors, leading to a lesser voltage drop and power loss. However, one major concern with LCLfilter is its oscillating currents at resonant frequency (caused by L, C). Therefore, LCL-filter DSTATCOM involves the vital issues of proper selection of LCL-filter components and achieving proper damping of resonance oscillations to have proper control and stable operation of DSTATCOM. In [2], a proper LCL-filter design for effective ripple attenuation with converter side inductance equal or greater than the grid side inductance is provided, and its design steps are adopted in this work. Also, feasible damping schemes will be discussed at length in the following section. The DSTATCOM control consists of two stages such as reference filter current generation and current control strategy for switching. Reference filter currents can be generated using instantaneous symmetrical theory, Synchronous Reference Frame (SRF) theory and instantaneous reactive power theory (IRPT) [5], [6]. These reference currents are composed of fundamental and harmonic components, hence a proper current controller is required to track these reference currents. Current controller for shunt active power filter, employing an array of generalized integrators (GIs), one for fundamental and others for each harmonic in stationary frame is presented in [7]. GIs have characteristics of infinite open-loop gain and high selectivity, therefore zero steady-state error with selective compensation can be achieved. However, one SSI is required for each load current harmonic, thereby increasing number of SSIs requires heavy computational work. Current controller implemented in dq0 reference frame rotating at fundamental frequency for selective harmonic compensation of nonlinear load is given in [8], [9]. Here, SSI regulators help in effective compensation of harmonic load currents and each SSI regulator can simultaneously compensate for two specified harmonics [9]. In general, the load can be unbalanced and nonlinear with nonzero neutral current. Hence, a controller compensating this neutral current is required to obtain balanced sinusoidal source currents. Therefore, in view of the above discussed advantages of LCL-filter over L-filter and the difficulty involved in its control, a three-phase-fourwire DSTATCOM with interface LCL-filter is presented in this paper. The complete modeling of LCL-filter is carried

Sa+ Vdc1

Sb+

vg= vpcc

Sc+

Cdc

Lc

a

PCC

Lg

vpcc,a

ilcl b

vpcc,b c

Vdc2

ic

Cdc Sa-

Sb-

vpcc,c

Cf Rd

iload

n iload Control Block

Ea

ig,a

Eb

ig,b

Ec

ig,c

Grid

n

icf

Sc-

Gate Signals

Zgrid

Linear load Rl,l Ll,l

ilcl

n

Sensors

SVPWM

Vdc

Vpcc

Rn,l Ln,l Nonlinear load

Fig. 1. Three-phase-four-wire DSTATCOM with LCL-filter grid interface.

out with objectives of high switching ripple attenuation ratio, and setting the LCL-resonant frequency far away from the operating frequency of DSTATCOM. The current controller is realized in dq0 reference frame with proportional-integral (PI) controller with harmonic compensation (HC) regulators. In case of the reference filter currents are non-sinusoidal, application of HC regulator (tuned to particular harmonic frequency) can provide infinite gain to a specific harmonic frequency signal and helps in minimizing the steady-state error between the reference and actual filter currents. Since the load is unbalanced and nonlinear in nature, a proper 0-axis controller to compensate load neutral current is used in the current controller. Also, the dq0 current controller is provided with cross-coupling and feed-forward terms to have decoupled dq controllers and fast dynamic response. Extensive simulation studies to compensate unbalanced nonlinear load, with the controllers (PI with HC) are conducted, and the corresponding results are presented. II. S YSTEM M ODELING Fig. 1 demonstrates a three-phase-four-wire two-level DSTATCOM connected to the grid via converter-side and grid-side inductances Lc and Lg , respectively and a filter capacitance Cf . The internal resistances are not shown in the figure explicitly. vpcc stands for the instantaneous phase voltages at the PCC, and ilcl is the current injected by the STATCOM. iload represents the load current, whereas ig is the current injected from the grid. As a remark, a, b, c indices signify the variables in each phase. In this paper, grid-

side-current feedback method (GCF) is utilized to close the feedback loop, whereas the converter-side-current feedback might also have been used with minor modification in control the loop. A. Overview of LCL-Filter Resonance Damping Methods Two types of harmonic components; the resonant harmonics caused by insufficient damping of resonant poles of the system and the switching harmonics caused by the pulse-width modulation (PWM) unit exist around the resonant frequency [2], [10]. Switching harmonics may excite the resonance if the resonance peak is not blunted sufficiently (see Fig. 2). By neglecting the equivalent series resistances (ESRs) of filter components, the LCL-filter plant gain function Gp (s) is derived with reference to Fig. 3 as follows: Ilcl (s) = Gc (s) · Gp (s) Ie (s)  1  1 = Kp 1 + · 3 , sTi s Cf Lc Lg + s(Lc + Lg )

(1)

where Gc (s) is the gain of the P I-controller with Kp and Ti representing proportional gain constant and integral time constant, respectively. However, a nonzero s2 −term is missing in the denominator of (1) to stabilize the filter by blunting the resonance peak properly. In order to damp out the resonance peak, active or passive damping methods are developed and are widely used [3], [10]–[15]. Active damping (AD) method modifies the reference voltage information by using a virtual damping term with no additional power losses as depicted

Magnitude (dB)

150

1) Active Damping Technique: In Fig. 3(a), the open-loop system consisting of an LCL-filter plant Gp (s) and a PI controller Gc (s) is fed back with the grid-side current ilcl . Filter capacitor current icf is processed in the current control loop to achieve AD. As can be seen in the block diagram in Fig. 3(a), the reference converter voltage value vc ∗ is modified by a proportional P -controller with gain constant Kd and the resulting open-loop gain under GCF method is derived as follows: Ilcl (s) = Gc (s) · Gp (s) Ie (s) (2) Kp (1 + 1/sTi ) = 3 . s Cf Lc Lg + s2 Kd Cf Lg + s(Lc + Lg )

AD Undamped PD

100 50 0 -50 -100

Phase (deg)

-150 -90 -135 -180 -225 -270 10 2

10 3 Frequency (Hz)

10 4

10 5

(a) 2000 i lc l [A]

vg [V]

1000

0

-1000

-2000 0.14

0.16

0.18

0.2

0.22

0.24

0.26

Time [s]

(b) Fig. 2. (a) Open-loop magnitude and phase response of an LCL-filter under undamped, AD, and PD cases. (b) Injected grid-side current under undamped vs. critically damped resonance.

in Fig. 3(a). However, the complexity in the controllers and design of LCL-filter parameters to achieve a critically damped system requires more effort especially when the carrier frequency is limited [16]. Besides, additional sensors bring an extra cost. In the literature, a number of AD techniques utilizing the current/voltage information through the sensors attached to the filter capacitor, converter-side inductor or gridside inductor have been widely applied. In this work, filter capacitor current information is processed to achieve AD in the current control loop as demonstrated in Fig. 3(a). On the other hand, passive damping (PD) techniques provide a simple solution to the resonance phenomena where resistors are inserted to the filter capacitor branch in a number of ways to suppress the resonance [11], [13]. In addition to reduced number of sensors in the system, any change in the resonant frequency owing to the ageing, stray inductance/capacitance in the system, or large tolerance in the components do not affect the stability of the system severely since there is always a non-zero impedance on the path blunting the resonance peak [11]. Despite these advantages in PD, towards higher frequencies in the frequency band, the third-order attenuation characteristic of the LCL-filter is compromised as can also be seen in Fig. 2(a) [3], [11], [12]. Moreover, the extra losses caused by damping resistors lead to undesirable temperature rise, decrease of lifetime of filter elements and decrease of system efficiency substantially.

The s2 −term in the denominator in (2) is generated by the AD block—which is missing in the undamped transfer function (TF) of Gp (s) in (1)—and provides the damping term whereas the actual filter is not modified whatsoever. It is evident in Fig. 2(a) that the AD block functions as a notch filter providing a negative peak response counteracting the undamped LCL-filter resonance [10]. This negative peak at the resonant frequency damps out the resonant peak as a function of the selected gain constant Kd . As evident, the current controller does not contribute to resonance damping when GCF is utilized [2]. Internal losses such as ESR of passive elements cannot be relied on either, due to their inadequate damping where dynamic performance of underdamped systems is quite poor with very low control bandwidth [3], [11], [17]. Consequently, PD or AD must be implemented to blunt the resonant peak when GCF is used [3], [10]–[15], [18]. The degree of the damping introduced in the current loop depends on the AD controller gain (i.e. Kd ) and size of the filter components. Thus, to achieve the optimal damping factor of ζ = 0.707, tuning of the variables can be done by dividing the second highest term to the highest term in the denominator of (2) such that s Kd Lc + Lg = 2ζωres = 2ζ , (3) Lc Lc Lg Cf where ωres [rad/s] is the resonant frequency of the LCL-filter determined solely by the passive component values. 2) Passive Damping Technique: Passive resistors are implemented in the filter in various ways as reported in [10], [11], [14], [15]. Cutting down on the damping losses is the vital point when opting the most appropriate PD configuration [13]. Series damping resistor solution delivers the least passive damping losses [10] while causing the highest degradation in attenuation [3], [11]. In this work, PD configuration with series connected resistors to the filter capacitor branch is used (see Fig. 1). Following the same methodology adopted for AD method, TF of the filter Gp (s) under PD method with GCF operation is derived as: sCf Rd + 1 . Gp (s) = 3 s Cf Lc Lg + s2 Cf Rd (Lc + Lg ) + s (Lc + Lg ) (4)

LCL-Filter Plant Gp(s)

i*

ie +

−

Kp

sTi  1 sTi

vc**

vc* +

−

+

ic

1 sLc

−

icf +

vcf

1 sC f

−

ilcl

1 sLg

PI Controller Gc(s) Kd

(a)

AD Gain LCL-Filter Plant Gp(s) *

i

ie +

−

Kp

sTi  1 sTi

vc

* +

−

1 sLc

ic

icf +

−

vcf

1 Rd  sC f

ilcl

1 sLg

PI Controller Gc(s)

(b) Fig. 3. Block diagram of: (a) GCF method with AD control. (b) GCF method with PD control.

Even though the optimal damping factor ζ is 0.707, minimum ζ can be reduced to 0.5 to minimize the damping losses [13]. As performed in the former section, required Rd value can be calculated by dividing the constant terms of the second highest variable to those of the highest variable in the denominator.

Vdc*

Voltage PI controller

Vdc iload ,a

iload ,b

B. Reference Current Generation using Synchronous Rotating Reference Frame

iload ,c

Various control algorithms can be used for generation of reference filter currents [19]. Synchronous reference frame (dq0) theory is used for reference filter current generation in this work. In order to have balanced and sinusoidal source currents with UPF at the PCC, the source has to supply only the fundamental real component of load current. Therefore, the harmonics, reactive component of load current and 0−component of the load in the event of load unbalance should be supplied from the DSTATCOM. Therefore, the actual load currents are sensed and are transformed into dq0 reference frame as demonstrated in Fig. 4. Given the sinosoidal part of phase-a grid voltage denoted as cos θ, and hence θ = ωt, dq0 components rotate at grid (line) frequency when the actual load currents are transformed into dq0 reference frame. Therefore, the line frequency components of the load currents become dc quantities and the harmonic frequency components are superimposed on this dc quantity as undulating signals. A low-pass filter (LPF) of Butterworth type, with cut-off frequency sufficient to allow only dc component is used to extract ild and then is subtracted from ild to f obtain if ld (oscillating component). Therefore, ild and ild in daxis, stand for real fundamental and harmonic load currents, respectively in abc frame [20]. Since the dc-link capacitors of the DSTATCOM play no role in reactive power generation but in covering the internal losses of the switches and passive elements, idc,d component corresponding to dc voltage regu-

vpcc,a vpcc,b vpcc,c

idc ,d

ild

abc

ilq

dq0

LPF

ild

~ ild

i*fd i*fq i*f 0

il 0

 PLL Switching signals

i fd i fq i f 0

SVPWM

dq0 current controller

u d u q u0  dq0 abc vma vmb vmc

Fig. 4. Block diagram of reference filter current generation with current controller and PWM scheme.

lation is also added to if ld to obtain complete d−axis reference filter current. As complete ilq , il0 currents should be supplied from the DSTATCOM, no LPFs are required in q−axis and 0−axis components as shown in Fig. 4. Therefore, the d, q, 0 reference filter currents for the current controller become as follows: i∗f d = if ld + idc,d ,

i∗f q = ilq ,

i∗f 0 = il0 .

(5)

1) Current Controller with PI with HC Regulators: As DSTATCOM is used for compensation of unbalanced nonlinear load, its current controller has to deal with nonsinusoidal reference filter currents. Zero steady-state error can be achieved by applying PI regulator if the reference current is a dc quantity. However, if the reference current is an oscillating signal, the conventional PI regulator due to

its limited low frequency gain will cause steady-state error. HC regulators realized by sinusoidal signal integrators (SSI) to compensate harmonic load currents for shunt active power filter application is presented in [8], [9]. SSI regulator–tuned to particular frequency–helps in effective tracking of reference filter currents having high slope variations, hence improve the load compensation. Therefore, in this study, HC regulator is used along with PI regulator. The harmonic spectrum of unbalanced nonlinear load considered (to be shown in Section III) consists of current harmonics of order 6n ± 1(n = 1, 2, 3) of the fundamental frequency (ω) in stationary frame. It is observed that the dominant harmonics are at 6th, 12th and 18th harmonic in dq0 frame (5th, 11th and 17th in negative sequence). Therefore, SSI regulator tuned to resonate at integer multiples of 6ω in dq0 reference frame, can achieve a high gain in narrow frequency band around this tuned frequency [20]. Hence, it is capable of eliminating the steady-state error between the controlled signal and its reference. The TF of SSI is given as X Kc s (6) 2, 2 n=1,2,3 s + (6nω) where Kc is the gain of generalized integrator which is similar to the integral gain of PI-controller [13]. Six SSI regulators, three for d− and three for q−controllers are used for load compensation up to 19th harmonic as shown in Fig. 5. v pcc ,d Gc ( s )

i*fd



n 1,2,3

i fd

Kc s s 2  (6n ) 2

v pcc ,0

Ghc ( s )

i*f 0

 ( Lc  Lg )

i fq

i*fq

vc*,d

 1  K p 1    sTi 

 ( Lc  Lg )

eq

 1  K p 1    sTi 



n 1,2,3

Kc s s 2  (6n ) 2

e0

 1  K p 1    sTi 

vc*,0

if 0

vc*,q

v pcc ,q

Fig. 5. Decoupled dq0−controllers with PI and SSI regulators.

The PI-controller parameters are determined adopting the approach in [3]. Additionally, once the dq-current dynamics are decoupled and the grid voltages Vpcc,d and Vpcc,q are compensated, d and q current loops become identical and can be tuned using the same controller parameters [3], [11]–[13]. In order to decouple d and q current dynamics, decoupling term ω(Lc + Lg ) is processed with the PI controller output as shown in Fig. 5 [3], [17]. As the load is unbalanced and nonlinear, the DSTATCOM current controller should be incorporated with 0−axis controller for compensation of load neutral current (iln ) along with d and q controllers unlike in shunt active power filter application, where the load is balanced and nonlinear with

zero neutral current [20]. Therefore, in this study, 0−axis controller is provided with a PI-regulator as shown in Fig. 5. The reference filter current i∗f 0 is generated in dq0 reference frame, which is the reflection of iln . Hence, load neutral current compensation is achieved by the DSTATCOM, and its adverse effects on source neutral are eliminated. All in all, control scheme for each of d, q and 0-controllers is set up as unveiled in Fig. 5. 2) Modulation Scheme: Space-vector PWM (SVPWM) switching control is used for generation of switching signals for the switches of VSI. These switching signals are obtained from the output of SVPWM block as shown in Fig. 4, with modulating signals vma , vmb , vmc and triangular carrier signal as inputs [16], [21]. III. S IMULATION S TUDIES DSTATCOM is connected at the PCC via LCL-filter for load compensation (including reactive and harmonic compensation) and to achieve balanced source currents under UPF operation. PD method is favored as the resonance damping technique. AD method could be used alternatively with somewhat increased complexity in the current control loop. Compensation performance of DSTATCOM with dq0−current controller by using PI with HC regulator is presented in this section elaborately. The model shown in Fig. 1 was constructed in a simulation setting. Following the proposed LCL-filter design algorithm in [2], the filter parameters are determined. In addition to the filter components, the source, load, feeder impedance and controller parameters considered for simulation studies are shown in Table I. TABLE I S YSTEM PARAMETERS FOR DSTATCOM System parameters Grid voltage (Vg , fg ) Feeder impedance (Zgrid ) Linear load, a Linear load, b Linear load, c Nonlinear load DC-link voltage (Vdc1 = Vdc2 ) DC-link capacitor (Cdc1 = Cdc2 ) LCL-parameters (Lc , Lg , Cf , Rd ) Current PI gains (Kp , Ki ) SSI gain (Kc ) Voltage PI gains (Kpv , Kiv )

Simulation values 400 V, 50 Hz 1 + j1568 Ω Zl,la = 20 + j15.8 Ω Zl,lb = 30 + j20.0 Ω Zl,lc = 45 + j18.8 Ω Zn,l = 30 + j12.6 Ω 550 V 3.3 mF 6 mH, 3 mH, 2 µF, 22 Ω 50, 111000 250 0.2, 0.04

Before the DSTATCOM is commissioned, the terminal voltages at the PCC and unbalanced nonlinear load currents are measured and are shown in Figs. 6 and 7 respectively. Harmonic spectrum of iload,a up to 50th harmonic is obtained by fast Fourier transform (FFT) and is shown in Fig. 8. In order to display the harmonics closely, the y-axis scale is truncated at 15%. The load current total harmonic distortion values (THDs) are measured to be 11.13%, 12.52%, and 13.41% in a, b, and c phases respectively. After the DSTATCOM is

400 Va

Vc

0

-200

-400 0.16

0.17

0.18

0.19

0.2

Time [s]

Fig. 9. Simulation results of PCC voltages after compensation by the DSTATCOM. (THD = 0.94%.) 30

400 Va

Vb

Vc

ig,a

20 Source currents [A]

200 PCC voltages [V]

Vb

200 PCC voltages [V]

commissioned at the PCC, load compensation governed by PI with HC current regulators in dq0-frame is carried out, and the corresponding results are displayed in Figs. 9-14. The terminal voltages, compensated source currents and injected filter currents at the PCC are shown. The PCC voltages are balanced with reduced ripple content as discernible in Fig. 9. Compensated source currents are balanced with UPF operation (see Fig. 10) and phase-a component has a THDi around 2.7%, while its harmonic spectrum is also shown in Fig. 11. The injected LCL-filter currents along with the harmonic content of the injected phase-a current are shown in Fig. 12 and Fig. 13, respectively.

0

-200

ig,b

ig,c

10 ig,n

0 -10 -20

-400 0.16

0.17

0.18

0.19

-30 0.16

0.2

0.17

0.18

0.19

0.2

Time [s]

Time [s]

Fig. 10. Source currents supplied by the grid at the PCC.

Fig. 6. Simulation results of PCC voltages before compensation by the DSTATCOM. (THD = 2.58%.) 5 30

4 iload,a

iload,b

FFT of i g,a

Load currents [A]

10 0

3

2

1

iload,n

-10

THDi = 2.67%

iload,c

20

0

-20

0

-30 0.16

0.17

0.18

0.19

10

15

20

25 h

30

35

40

45

50

0.2

Time [s]

Fig. 11. Harmonic spectrum of ig,a extracted by FFT.

Fig. 7. Unbalanced nonlinear load currents.

LCL- filter currents [A]

20

15

THDi = 11.13% 10

FFT of iload,a

5

10

ilcl,a ilcl,b

ilcl,c

0

-10

5 -20 0.16

0.17

0.18

0.19

0.2

Time [s]

0 0

5

10

15

20

25 h

30

35

40

45

50

Fig. 12. Injected filter currents.

Fig. 8. Harmonic spectrum of iload,a extracted by FFT.

Fig. 14 depicts the shares/contributions of ig,a , ilcl,a and icf,a on feeding the load phase-a current il,a . It can be observed that the switching ripple is absorbed by Cf , and hence a considerable amount of ripple is cleared off ilcl,a . The dc-link voltages Vdc1 and Vdc2 are maintained around

550 V within an acceptable envelope as shown in Fig. 15. To give an insight regarding the dq0-current controller, the reference currents (shown by the dashed-lines) and injected filter currents (represented by the solid lines) in dq0-frame are shown in Fig. 16 sequentially. As evident, tracking achieved by PI and HC regulators is quite successful, and the tracking

4

*

fd

[A]

2

i fd vs. i

errors ed and eq are reduced extensively as depicted in Figs. 17(a) and (b), respectively. Apparently, SSIs providing high gain for tuned frequency signals improves the tracking performance and minimizes the error between the controlled signal and its reference [20].

0 -2 4

[A]

50

*

fq

0

i fq vs. i

THDi = 49.23%

30

-8

-12 0.05 [A]

20

*

f0

FFT of ilcl,a

40

-4

0

5

10

15

20

25 h

30

35

40

45

0.17

0.175

iload,a

ig,a

0.185

0.19

0.195

0.2

0.8 0.4 ed [A]

10 0

0 -0.4

-10 icf,a

0.17

0.18

(a)

-0.8 2

-20

0.19

1

0.2

eq [A]

Time [s]

Fig. 14. Phase-a currents ig,a , iload,a , ilcl,a , icf,a .

0 -1 -2 0.16

(b) 0.165

0.17

560

0.175

0.18

Time [s] V

dc1

V dc2

555

Fig. 17. (a) Error ed between id ∗ and id . (b) Error eq between iq ∗ and iq .

550

2DGraphSel1

2DGraphSel1

1.15

1.05

540 0.3

0.35

0.4

Time [s]

Fig. 15. DC-link voltages Vdc1 , Vdc2 .

PCC voltage [p.u]

545 PCC voltage [p.u]

DC-bus Voltage [V]

0.18

Fig. 16. Reference and actual filter currents in dq0 frame. Dashed curves represent the reference signals.

ilcl,a

-30 0.16

0.165

Time [s]

30 20

-0.05 0.16

50

Fig. 13. Harmonic spectrum of ilcl,a extracted by FFT.

Phase-a currents [A]

0

i f0 vs. i

10

1.00

If L-filter were favored over LCL-filter in this application, a much bigger total inductance would be needed whereas much larger ripple would be superimposed on the filter currents. Thus, the immense benefits brought by LCL in terms of performance, cost and size far outweigh the complexity in controller design. Hence, interfacing the DSTATCOM via an LCL-filter instead of a simple reactor provides much better harmonic compensation, particularly by reducing the high frequency switching harmonics caused by the PWM unit. Furthermore, Fig. 18(a) reveals that the compensation achieved

Voltag...

800.00m

950.00m 15.80

IV. D ISCUSSION

1.00

Voltag...

15.90 Total load rms current [A]

(a)

16.00

0

10.00 Total load rms current [A]

16.00

(b)

Fig. 18. PCC voltage vs. phase-a total load rms current when: (a) DSTATCOM enabled. (b) DSTATCOM disabled.

by the designed DSTATCOM is so vital that the terminal voltages at the PCC terminal are maintained around 1 p.u. Actually, it is slightly lower than 1 p.u due to voltage drop on the nonzero grid impedance. Otherwise, the voltage at the PCC would tend to drop as a function of the drawn load current and the grid impedance as evident in Fig. 18(b).

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