Low-IRESET Unipolar HfO2 RRAM and Tunable Resistive-Switching ...

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HfO2, 10-nm HfO2/3-nm Al2O3, and 3-nm Al2O3 were deposited as the RS layers. HfO2 films ... Ni top electrodes with a thickness of 100 nm and a diameter of.
ISDRS 2011, December 7-9, 2011, College Park, MD, USA

Student Paper Low-IRESET Unipolar HfO2 RRAM and Tunable Resistive-Switching Mode via Interface Engineering

Kuan-Liang Lin1*, Tuo-Hung Hou1, Yao-Jen Lee2, Jun-Hung Lin3, Jhe-Wei Chang3, Jiann Shieh4, Cheng-Tung Chou3, Wen-Hsiung Chang5, Wen-Yueh Jang5, and Chen-Hsi Lin5 1 Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan; 2 National Nano Device Laboratories, Hsinchu, Taiwan; 3Department of Chemical and Materials Engineering, National Central University, Jhongli, Taiwan; 4Department of Materials Science and Engineering, National United University, Miaoli, Taiwan; 5 Winbond Electronics Corporation, Taichung, Taiwan; *Tel: +886-3-5712121 ext 54219; E-mail: [email protected]

Resistive random access memory (RRAM) has emerged as a promising candidate for next-generation nonvolatile memory (NVM) due to its low-voltage operation, fast switching speed and high-density integration [1]. Two common resistive switching (RS) modes in RRAM are unipolar and bipolar modes [2]. A unipolar RRAM in series with a rectifying diode, so-called one diode-one resistor (1D1R) cell, is particularly attractive for high-density applications because of the minimal 4F2 cell size [3]. However, high RESET current (IRESET) impedes the cell size scaling in 1D1R array. Recently, we have demonstrated a reliable Ni/HfO2/Si unipolar RRAM, fully compatible with the Si technology [4, 5]. In this paper, we show that unipolar HfO2 RRAM exhibits excellent NVM characteristics promising for low-IRESET, low-power operation in the future high-density 1D1R array. In addition, we show that the RS mode can be tailored by a bottom interfacial layer of Al2O3 between HfO2 and Si. New evidence on the location of filament connections/ruptures and RS mechanism will be discussed in details. After standard RCA clean and a rapid thermal oxidation at 500 °C for 10 s in ambient O2 on p+-Si substrates, 10-nm HfO2, 10-nm HfO2/3-nm Al2O3, and 3-nm Al2O3 were deposited as the RS layers. HfO2 films were deposited by metal organic chemical vapor deposition at 500 °C using Hf(OtBu)2(mmp)2 and O2 as precursors, while Al2O3 film was deposited using Al[OCH(CH3)2]3 and O2 as precursors. Ni top electrodes with a thickness of 100 nm and a diameter of 200 μm were defined by a shadow mask process. The devices were measured using an Agilent 4156B semiconductor parameter analyzer by applying voltage on the top electrodes while the p+-silicon substrates (bottom electrodes) were grounded. The TEM image in Fig. 1 displays that as-deposited 10-nm HfO2 was partially crystallized with an interfacial layer between Si and HfO2. The Ni/HfO2/Si device exhibits nonpolar RS behavior in Fig. 2, where unipolar and bipolar RS by any polarities of SET and RESET voltage were present. The compliance current at SET determined the SET power, the filament morphology, and thus the IRESET [5], as shown in Fig. 3. IRESET was scaled linearly with the compliance current from 1 mA to 100 μA, but saturated between 100 μA and 10 μA because of the charge dissipation current from parasitic capacitors [6]. With a low compliance current of 10 μA at SET, unipolar RS with 80 μA IRESET is depicted in Fig. 4. Figure 5 and Fig. 6 display the statistical distribution of switching voltages and resistance at high/low resistance states under lowpower operation. Very reproducible unipolar RS with stable IRESET below 100 μA, non-overlapped SET/RESET voltage window, and a reasonable resistance ratio of ~ 100 was promising for future high-density 1D1R memory array. Data retention characteristics are presented in Fig. 7. Both high/low resistance states were stable at 85 ℃ for at least 12000s, even when the filament size scaled with IRESET to nanoscale [5]. Though the Ni top electrode played a critical role in stable unipolar RS of the Ni/HfO2/Si device, the RS mechanism remained unclear. X. A. Tran et al. proposed that the formation of a NiOx interfacial layer between Ni and HfO2 was responsible for the unipolar RS [7], while our group showed the formation of conical-shape Ni filaments through Ni electromigration into HfO2 [4, 5]. In this paper, various RRAM devices including bilayer and single-layer structures were compared. In Fig. 8 and Fig. 9, only bipolar RS was present in the Ni/HfO2/Al2O3/Si device and the Ni/Al2O3/Si device. The bipolar RS in Al2O3 was attributed to the migration of oxygen vacancies [8], but the model of NiOx interfacial layer failed to explain the absence of unipolar RS in the Ni/HfO2/Al2O3/Si device. On the contrary, the results show that the RS mode was governed by the oxide layer immediately next to the bottom electrode, suggesting filament connections/ruptures occurred locally near the bottom electrode as predicted by the conical-shape filament model. As illustrated in Fig. 10, during forming and SET process at positive voltages, Ni filaments were formed through electromigration in partially-crystallized HfO2 but not in Al2O3 where oxygen-deficient filaments were dominant. The suppression of Ni electromigration in Al2O3 was attributed to its amorphous phase as shown in the TEM inset of Fig. 8. A highly reproducible low-power unipolar Ni/HfO2/Si RRAM with IRESET less than 100 A, excellent cycling endurance and long retention has been proposed for the future 1D1R crossbar NVM memory applications. The absence of unipolar RS in the Ni/HfO2/Al2O3/Si device suggests that filament connections and ruptures occur locally near the bottom electrode in support of the conical-shape filament model, and the possibility to control the RS mode by engineering the interfacial layer between HfO2 and Si. References

[1] I. G. Baek, M.-S. Lee, S. Seo, M.-J. Lee, D.-H. Seo, D.-S. Suh, J.-C. Park, S.-O. Park, H.-S. Kim, I.-K. Yoo, U-In Chung and I.-T. Moon, “Highly Scalable Nonvolatile Resistive Memory using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses,” IEDM Tech. Dig., pp. 587-590, 2004. [2] R. Waser and M. AONO, “Nanoionics-based resistive switching memories” Nat. Mater., vol. 6, pp. 833-840, 2007.

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ISDRS 2011, December 7-9, 2011, College Park, MD, USA [3] M.-J. Lee, Y. Park, B.-S. Kang, S.-E. Ahn, C. Lee, K. Kim, W. Xianyu, G. Stefanovich, J.-H. Lee, S.-J. Chung, Y.-H. Kim, C.-S. Lee, J.-B. Park, I.-G. Baek and I.K. Yoo, “2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM Applications,” IEDM Tech. Dig., pp. 771774, 2007. [4] K.-L. Lin, T.-H. Hou, J. Shieh, J.-H. Lin, C.-T. Chou, and Y.-J. Lee, “Electrode Dependence of Filament Formation in HfO2 Resistive-Switching Memory,” J. Appl. Phys., vol. 109, pp. 084104, 2011. [5] T.-H. Hou, K.-L. Lin, J. Shieh, J.-H. Lin, C.-T. Chou, and Y.-J. Lee, “Evolution of RESET Current and Filament Morphology in Low-power Unipolar Ni/HfO2/Si RRAM,” Appl. Phys. Lett., vol. 98, pp. 103511, 2011. [6] K. Kinoshita, K. Tsunoda, Y. Sato, H. Noshiro, S. Yagaki, M. Aoki, and Y. Sugiyama, “Reduction in the reset current in a resistive random access memory consisting of NiOx brought about by reducing a parasitic capacitance,” Appl. Phys. Lett., vol. 93, pp. 033506, 2008. [7] X. A. Tran, H. Y. Yu, Y. C. Yeo, L. Wu, W. J. Liu, Z. R. Wang, Z. Fang, K. L. Pey, X. W. Sun, A. Y. Du, B. Y. Nguyen, and M. F. Li, “A High-Yield HfOx-Based Unipolar Resistive RAM Employing Ni Electrode Compatible With Si-Diode Selector for Crossbar Integration,” IEEE Electron Device Lett., vol. 32, pp. 396-398, 2011. [8] C.-Y. Lin, C.-Y. Wu, C.-Y. Wu, C. Hu and T.-Y. Tseng, “Bistable Resistive Switching in Al2O3 Memory Thin Films,” J. Electrochem. Soc., vol. 154, pp. G189-192, 2007.

Fig. 1 Cross-sectional TEM image of Ni/HfO2/Si stack. The interfacial layer between Si and HfO2 is indicated.

Fig. 2 Typical nonpolar RS characteristics in the Ni/HfO2/Si device.

Fig. 4 Low-power unipolar RS characteristics. Fig. 5 Statistical distribution of switching Inset shows the schematic structure of the voltages in the low-power unipolar Ni/HfO2/Si Ni/HfO2/Si device. device.

Fig. 7 Data retention at 85℃, showing no degradation up to 1.2×104 s in the low-power unipolar Ni/HfO2/Si device.

Fig. 9 DC endurance of the Ni/10nm HfO2/3nm Al2O3/Si bilayer structure under bipolar RS mode.

Fig. 3 Dependence of the RESET current on the compliance current at SET in the unipolar Ni/HfO2/Si device.

Fig. 6 DC endurance of the low-power unipolar Ni/HfO2/Si device.

Fig. 8 Typical RS curves of (a) Ni/10nm HfO2/3nm Al2O3/Si bilayer structure, and (b) Ni/3nm Al2O3/Si single-layer structure. Inset shows the cross-sectional TEM image of Ni/HfO2/Al2O3/Si stack.

Fig. 10 Schematics showing the RS mechnisms for (a) Ni/HfO2/Si, (b) Ni/HfO2/Al2O3/Si, and (c) Ni/Al2O3/Si structures. The filament composition depends on the oxide material and the connections/ruptures of filaments occur locally near the bottom Si electrode.

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