IEEE TRANSACTIONS ON MAGNETICS, VOL. 50, NO. 11, NOVEMBER 2014
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Material Stack Design With High Tolerance to Process-Induced Damage in Domain Wall Motion Device Hiroaki Honjo1, 4 , Shunsuke Fukami2 , Kunihiko Ishihara3 , Keizo Kinoshita2 , Yukihide Tsuji1 , Ayuka Morioka1 , Ryusuke Nebashi1, Keiichi Tokutome1, Noboru Sakimura1,5 , Michio Murahata2 , Sadahiko Miura1 , Tadahiko Sugibayashi1, Naoki Kasai2 , and Hideo Ohno2,4,6 1 Green
Platform Research Laboratories, NEC Corporation, Tsukuba 229-1198, Japan for Spintronics Integrated Systems, Tohoku University, Sendai 980-8577, Japan 3 Smart Energy Research Laboratories, NEC Corporation, Tsukuba 229-1198, Japan 4 Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University, Sendai 980-8577, Japan 5 Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University, Sendai 980-8577, Japan 6 WPI Advanced Institute for Materials Research, Tohoku University, Sendai 980-8577, Japan 2 Center
We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH3 /CO gas mixture plasma for the device fabrication. To avoid this process-induced damage (PID), we fabricated and optimized a new material stack, in which a thin Ta layer is inserted on top of the capping layer of the DWM layer We found that the new stack effectively prevented a decrease in DWM layer coercivity, an increase in the critical current, and a decrease in the switching probability owing to the high-etch selectivity of Ta. As a result, the switching property of the DWM cell was greatly improved by the newly developed DWM stacks with high tolerance to PID. Index Terms— Domain wall motion (DWM), embedded memory, magnetic tunnel junction (MTJ), nonvolatile memory, processinduced damage (PID), three-terminal cell.
I. I NTRODUCTION
T
HERE has been increased interest in embedding spintronics cells in stems-on-a-chip (SoC), as the resulting nonvolatility can reduce power dissipation when the device is not in use [1]. It is desirable that the spintronics cells operate with the same clock frequencies as current SoCs with the same reliability. A three-terminal domain wall motion (DWM) cell is suitable for such applications [2]. We have found that process-induced damage (PID) on the DWM materials causes a significant performance degradation by ion irradiation under conventional etching conditions with Ar/NH3 /CO gas mixture plasma for the device fabrication [3]. Eliminating the PID issue to maintain the intrinsic properties of the DWM material is important for the applications. In this paper, we first describe the cell structure and material design of a DWM cell that avoids the PID. Next, we show the magnetic properties of the new DWM cell. Then we evaluate its DWM properties for various material stacks. Finally, we demonstrate the switching property obtained for a device by using the optimized stack under the etching conditions.
II. D EVICE S TRUCTURE Fig. 1(a) shows a view of the three-terminal device structure. It consists of a perpendicularly magnetized DW-motion part (writing part) and a perpendicularly magnetized sensor Manuscript received March 6, 2014; revised May 1, 2014; accepted May 10, 2014. Date of current version November 18, 2014. Corresponding author: H. Honjo (e-mail:
[email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMAG.2014.2325019
Fig. 1.
Device structure. (a) Three-terminal device. (b) Hall device.
magnetic tunneling junction (MTJ) (reading part) [4]. The DWM wire consists of two oppositely magnetized parts by the pinning region at both ends and the free region in the center. The magnetization of the MTJ is switched by the perpendicular component of the stray magnetic field from the DWM wire. In addition to the three-terminal device, we also fabricated Hall devices that use the anomalous Hall effect to evaluate the DWM properties of the DWM wire [Fig. 1(b)] [2]. III. M ATERIAL S TACK D ESIGN Fig. 2 shows a schematic diagram of the pinning layer (PL) fabrication process. In the previous design, a Co/Ni free layer (FL), inter coupling layer (ICL), and Co/Pt PL were deposited sequentially [3]. The PL was then patterned by reactive ion etching with a hard mask process. Although the etching stopped within the ICL, etching damage occurred in the FL because of high-energy ion penetration into the FL. This leads to degradation of the DWM wire materials. The coercivity of the DWM layer (DWML) (Hc ) decreased, the
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IEEE TRANSACTIONS ON MAGNETICS, VOL. 50, NO. 11, NOVEMBER 2014
TABLE II S TACK S TRUCTURES
Fig. 3. Fig. 2. Cross-sectional schematic diagram of pinning layer fabrication process for previous (left) and new (right) design. TABLE I C ONDITIONS FOR THE P INNING L AYER E TCHING
critical current (Ic ) for the DWM increased, and the switching probability decreased after PL etching. Also in the previous design, the PL etching endpoint was detected by an optical emission from the single ICL of a Pd film. However, the single Pd film could not sufficiently protect the FL during the PL etching. Therefore, in this paper, we propose a multilayered ICL to prevent FL degradation. It consists of an end-pointdetection layer (EPDL), magnetic coupling layer (MCL), and capping layer (CL). The MCL in the newly proposed design enables high etching selectivity against the EPDL to stop etching above the CL. The CL completely remains after PL etching and protects the FL from the ion irradiation. IV. E XPERIMENT A. Magnetic Film Preparation All films were deposited by dc magnetron sputtering. The stack structures studied here were shown in Table II. B. Hall Device Fabrication 1) Hall Device Without PL Etching: We fabricated Hall devices from stack A, in which no PL was deposited or
Magnetic properties of DWML for various capping layers.
patterned. This allowed us to evaluate the cap layer dependence of DWM properties and also to use the devices as reference samples for the Hall devices with a PL etching process. The films, deposited on a 300 mm Si substrate with embedded electrodes, were patterned to cross shape using an ArF-immersion stepper and a reactive ion etching system using hard masks made of Ta and SiO2 /Si3 N4 . The FL was 120 nm in width. 2) Hall Device With PL Etching: The PL/ICL/FL (stacks B, C, and D) were deposited on a 300 mm Si substrate with embedded electrodes. Then the PL etching was carried out by Ar-diluted NH3 /CO plasma followed by in situ He/H2 plasma treatment [5]. Table I summarizes the etching conditions used in the PL etching. The remaining process was similar to the one without the PL process. The FL was 120 nm in width. DWM characteristics were evaluated by first injecting a DW into the nanowire with a local Oersted field induced by introducing a current into the embedded electrode, and then applying a current pulse or magnetic field to displace the DW. The anomalous Hall effect in the cross region was used to detect the DWM. The current pulse used to induce the DWM was 20 ns in duration. 3) Three-Terminal Cell Fabrication: We used the same fabrication process that we used for the cell that we reported in previous papers [4], [6]. The PL, EPDL, MCL, and FL (stack D) were deposited on a substrate. The DWM region was 80 nm wide and 400 nm long, and the MTJs were shaped into a 100 nm diameter circle. An RH loop was measured by the following sequence: 1) introduce a DW at the end of the free region by applying a strong positive field followed by a weak negative field (3500 to −1800 Oe); 2) apply a 20 ns long pulse current with various magnitudes to the strip; and 3) measure the MTJ resistance. If the current density of the pulse was higher than a threshold, the DW was moved, resulting in resistance switching of the MTJ.
HONJO et al.: MATERIAL STACK DESIGN WITH HIGH TOLERANCE TO PID
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Fig. 5. Critical current (Ic ) and switching probability (PSW ) of DWM cells having various capping layers without PL etching. Fig. 4.
Magnetic properties of PL/ICL/FL for various ICLs.
V. R ESULTS AND D ISCUSSION A. Magnetic Properties Fig. 3 shows FL magnetization curves for various capping layers (stack A). The saturation magnetization (Ms ) of the stacks with a Ta-CL and without a CL was less than that of those with a Pt-CL, Pd-CL, or Ru-CL. Oxidation at the Co surface of top-Co and intermixing at the interface between Ta and Co may form a dead layer for the stacks without a CL and a Ta-CL, respectively. This resulted in a decrease in the Ms . On the other hand, proximity-induced magnetization is caused at the interface between Pt or Pd and Co. This resulted in an increase in the Ms . The saturation field along the in-plane direction of the stack (Hs) with an Ru cap was smaller than that in the stacks with other caps. This variation may be because the interfacial anisotropy at the interface between Co and Ru was smaller than that at the other interfaces. Fig. 4 shows PL/ICL/FL magnetization curves. The magnetization of the PL and FL with a Pd, Pt, Ru, and Ta MCL (stack B) were switched simultaneously when the thickness of the MCLs was less than 2.0, 1.5, 1.5, and 0.3 nm, respectively. From these results, we chose Pd as the EPDL because it can combine magnetically between the PL and the CL in a thick region, was not included in the FL or the PL, and shows strong optical emission [3]. B. Switching Property Attained by Pulse Current With Hall Device 1) Hall Device Without PL Etching: Fig. 5 shows the critical current Ic and switching probability (PSW ) for the stacks with various capping layers (stack A). The DWMLs with a Pt-CL or a Pd-CL have a smaller Ic than those with an Ru-CL, a Ta-CL, or without a CL. They also have higher PSW than DWMLs with a Ta-CL or without a CL. These changes may be caused by the change in the magnetic state at the interface between the FL and the CL as mentioned above, or by structural inversion asymmetry in terms of spin–orbit interaction at the interface or inside the capping layer and under layer. Such a change caused by structural inversion asymmetry was reported in [7] and the
Fig. 6. Critical current (Ic ) and switching probability (PSW ) for DWM cell with various ICLs after PL etching. Ic without PL etching is shown as a reference.
author suggests that spin current from Pt layer through the spin Hall effect suppress the precessional DW motion. The same phenomenon may take place in our stacks. These results led us to choose Pt as the CL because a stack with Pt has excellent DWM properties, and because the EPDL and the CL must be composed of different materials to enable the etching end point to be detected precisely. 2) Hall Device With PL Etching: The atom displacement of the DWML during the pinning layer etching was calculated by Monte Carlo simulation for various Ar+ ion energy levels [8]. The atom displacement decreased as Ar+ ion energy decreased. We were able to achieve lower ion energy by decreasing the bias voltage in the etching conditions (Vpp). However, a lower Vpp resulted in lower etching rate and worse etching uniformity. In our previous study [3], when the atom displacement number of the FL was 1.25 × 10−2 /ion, the DW moved. Because the corresponding threshold Vpp was about 620 V, we used Vpp of 600 V in the etching conditions. Fig. 6 shows Ic and PSW for various structures (stacks C, D). The Ic was smaller for the stack with a Co/Ta/Co-MCL than for the one with a Co-MCL, and the switching probability of the FL with a Co-MCL was lower than for the one with a Ta-MCL. Furthermore, 100% switching probability was obtained with a Co/Ta/Co-MCL. The coercivity (Hc) of the stack with a Co-MCL decreased after the PL etching as shown in Fig. 7. Variation of the Hc for the stacks well agreed with that of the switching probability shown in Fig. 6. Such a change was reported
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IEEE TRANSACTIONS ON MAGNETICS, VOL. 50, NO. 11, NOVEMBER 2014
about 60% of that reported in our previous study [4]; this is due to the use of a new material stack with high tolerance to PID. We investigated the cell by cross-sectional TEM analysis for the etched part (right) to confirm whether there was PID relative to an unetched part (left) (Fig. 9). The etching was stopped at the Ta-MCL. We did not observe any FL lattice destruction induced by ion irradiation, as we had in our previous study [3]. This is good evidence that the excellent DWM properties we obtained in this paper were due to the Ta-MCL. VI. C ONCLUSION Fig. 7. Coercivity (Hc ) for DWM wire with various ICLs after PL etching. Ic without PL process is shown as a reference.
We have developed a new DWM material stack that is resistant to PID. We proposed a multilayered ICL comprising an EPDL, MCL, and CL and optimized it to prevent degradation of the FL. A precise etching stop was achieved through the use of an MCL formed of Ta because of the latter’s high etching selectivity against the EPDL, and the use of a Pt-CL prevents ion penetration into the FL. With low ion energy etching, the new material stack maintained intrinsic DWM properties after the PL etching. On investigating the DWM properties of a device with the new DWM stack, it was found the device’s critical current density (Jc ) was about 40% lower than we had obtained in a previous study. VII. ACKNOWLEDGMENT
Fig. 8.
R–I loop of the cell.
This work was supported by the FIRST program of JSPS and R&D for Next-Generation IT of MEXT. A part of this work was conducted at Super Clean Room Facility in Tsukuba innovation Arena (TIA-SCR). R EFERENCES
Fig. 9. Cross-sectional TEM images of cell for unetched part (left) and etched part (right).
in [9] and the destruction of the interfacial anisotropy caused by erosion between Co and nonmagnetic layer was raised as a possible explanation for it. The same phenomenon may take place in our Co/Ni samples. On the other hand, the switching probability of the stack with a Ta-MCL did not decrease. This is because an NH3 /CO gas has high etching selectivity against Ta, which is easily oxidized by oxygen-containing species in the plasma, the oxides of which have very low etching rates [10], [11]. As a result, etching stops at the Co/Ta/Co-MCL and a decrease in the Hc and switching probability is prevented. 3) Switching Property Attained by Writing Current With Three-Terminal Cell: Fig. 8 shows the R–I loop of the cell. The Ic was 0.4 mA and the corresponding critical current density (Jc ) to the FL was 5.9 × 1011 A/m2 . This value is
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