SCIENCE CHINA Information Sciences
. RESEARCH PAPER .
June 2012 Vol. 55 No. 6: 1446–1460 doi: 10.1007/s11432-012-4572-0
Memristor-based RRAM with applications DUAN ShuKai1,2 , HU XiaoFang1, WANG LiDan1 ∗ , LI ChuanDong3 & MAZUMDER Pinaki2 1School 2Department
of Electronics and Information Engineering, Southwest University, Chongqing 400715, China; of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109, USA; 3College of Computer, Chongqing University, Chongqing 400044, China Received March 26, 2011; accepted July 22, 2011; published online April 12, 2012
Abstract Recently acclaimed the fourth fundamental circuit element, the memristor was theoretically predicted by Leon Chua in 1971, although its single device electronic implementation eluded the attention of integrated circuit designers for the past three decades and was first reported in 2008 by the Hewlett-Packard (HP) Laboratory researchers while developing crossbar-based ultra high-density nonvolatile memories. Memristorbased hybrid nanoscale CMOS technology is expected not only to impact the flash memory industries profoundly, but also to revolutionize digital and neuromorphic computing. The memristor exhibits a dynamical resistance state that depends on its excitation history and which can be exploited to build transistor-less nonvolatile semiconductor memory (NVSM), commonly known as resistive RAM (RRAM). This paper addresses an implementation scheme for memristor-based resistive random access memory (MRRAM), a nano-scale binary memory that is compatible with modern computer systems. Its structure is similar to that of static random access memory (SRAM), but with the memristor replacing the underlying RS flip-flop. By improving the MRRAM, we propose a multilevel memory with greater data density, which stores multiple bit information in gray-scale form in a memory unit. Reported computer simulations and numerical analyses verify the effectiveness of the proposed scheme in storing ASCII characters and gray-scale images in binary format. Keywords
memristor, RRAM, binary information memory, multilevel memory
Citation Duan S K, Hu X F, Wang L D, et al. Memristor-based RRAM with applications. Sci China Inf Sci, 2012, 55: 1446–1460, doi: 10.1007/s11432-012-4572-0
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Introduction
The memristor was theoretically formulated and defined by Leon Chua in 1971 [1]. However, it did not attract much attention until the recent TiO2 -based crossbar memory array was developed by the HP Labs in 2008 and the crosspoint storage element was recognized as the memristor [2–4]. Since the startling existence of the memristor in a sandwiched oxide film was reported as a discovery of the missing circuit element, it immediately garnered extensive interest from numerous researchers in academia and industry. Several physical implementations have been developed by chemists, physicists, and electrical engineers as reported in the literature [5–10]. Because of the difficulty in fabricating large-scale memristor based circuits, SPICE based simulation models have also been developed and recently reported in the literature [11,12]. With unique superior properties, memristors have prospective promising applications ∗ Corresponding
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in nonvolatile memory [13–19], artificial neural networks [20,21], chaotic circuits [22,23], programmable logic devices [24–26], and signal processing and pattern recognition circuits [27,28]. Memristors are also likely to pave the way for the development of neurally inspired computers [17]. The nano-scale physical implementation of memristors leads researchers to believe that memristor technology is likely to extend Moore’s Law for several more years. Random-access memory (RAM) is an important form of computer data storage with fast access speed and high write endurance. For example, the read and write times of static RAM (SRAM) are both less than 0.3 ns, while write endurance reaches 1016 . However, the information stored in RAM is lost once the power is turned off since RAM is a volatile memory. Flash memory, as the most advanced nonvolatile memory, also has some problems such as slow access speed (105 –106 ns) and low write endurance (about 105 ). In addition, with the transistor approaching the sub 100 nm barrier, a number of important issues have started to emerge, including difficulty in fabrication and the fundamental performance defects of transistors, such as unmanageable electron motion. Transistor based traditional memory has encountered a development bottleneck. It is believed that Flash memory will approach the end of scaling down within a decade. As a result, novel devices and technology need to be developed to meet the ever increasing demands for nonvolatile, high-density, low-power, and high-speed primary and secondary storage devices. The memristor, with nano-scale memory capability, fast switching ( Vout3 Vout2 . If Vout1 − Vout4 > 0 and Vout4 − Vout2 0, then the actual read memristance Mr is in the range (Mmax , Mmin ]. This indicates that gray-scale values can be written and read accurately and proves the effectiveness of the proposed MRRAM. The computed results are shown in Figure 15, where (a) Vdiff1 = Vout1 − Vout3 , (b)Vdiff2 = Vout3 − Vout2 , (c)Vdiff3 = Vout1 − Vout4 , and (d) Vdiff4 = Vout4 − Vout2 . We found that Vdiff1 > 0, Vdiff2 0, Vdiff3 > 0, and Vdiff4 0 for all the 256 gray-scale values, thus guaranteeing the correctness of all operations.
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Conclusions and discussion
An implementation scheme for memristor-based RRAM (MRRAM) using memristors as the memory
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element was proposed in this paper. We also introduced the two kinds of memristors with continuously variable resistance characteristics and switching characteristics, respectively, employed in this scheme. The structure of MRRAM is similar to SRAM except with that the memristor replaces the basic RS flip-flop. MRRAM was improved for multilevel memory mainly by using D/A and A/D converter, while special techniques were employed to perform write and read operations. Simulations and computed analyses of the MRRAMs indicate that the memristors memorize input information as different resistances and show the effectiveness of MRRAM for data storage and image processing. MRRAM also provides a new solution for image processing, especially for gray-scale image processing. The proposed scheme indicates the feasibility of tight integration of memristors with CMOS circuitry. Memristors with a nano-scale size contribute to improving the memory density and performance of the MRRAM, especially for multilevel MRRAM. Based on the memory ability, MRRAM is nonvolatile, which provides theoretical and practical evidence for new generation nonvolatile memory technology. Considering the compatibility with current computation devices, MRRAM is expected to be developed physically once the memristor is commercially available. At present, the investigation and produce of the memristor has just begun, and the correlation technique is not mature. However, with more indepth research, the performance of the memristor will be enhanced read/write time, endurance, and so on. Memristive memory could become the most important technology for next-generation memory. Moreover, this design shows the possibility of large-scale implementations of artificial neural networks with a multilevel memristor as the synaptic weight, since synaptic multiplication can be performed by Ohm’s Law V = IR in the memristor in a straight forward way. Acknowledgements This work was supported by National Natural Science Foundation of China (Grant Nos. 60972155, 61101233, 60974020), Fundamental Research Funds for the Central Universities (Grant Nos. XDJK2012A007, XDJK2010C023), University Excellent Talents Supporting Foundations of Chongqing (Grant No. 2011-65), University Key Teacher Supporting Foundations of Chongqing (Grant No. 2011-65), National Science Foundation for Postdoctoral Scientists of China (Grant No. CPSF20100470116), Teaching Reform Studying Foundation of Higher Education of Chongqing (Grant No. 09-2-011) and Teaching Reform Studying Foundation of Higher Education of the Southwest University (Grant Nos. 2009JY053, 2010JY070).
References 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Chua L O. Memristor—the missing circuit element. IEEE Trans Circ Theor, 1971, 18: 507–519 Tour J M, Tao H. Electronics: The fourth element. Nature, 2008, 453: 42–43 Strukov D B, Snider G S, Stewart D R, et al. The missing memristor found. Nature, 2008, 453: 80–83 Williams R S. How we found the missing Memristor. IEEE Spectrum, 2008, 45: 28–35 Chen Y, Wang X. Compact modeling and corner analysis of spintronic Memristor. In: IEEE/ACM International Symposium on Nanoscale Architectures, New York, 2009. 7–12 Pershin Y V, Ventra M D. Spin memristive systems: spin memory effects in semiconductor spintronic. Phys Rev B, 2008, 78: 3309–3312 Gergel-Hackett N, Hamadani B, Dunlap B, et al. A flexible solution-processed memristor. IEEE Electron Device Lett, 2009, 30: 706–708 Brzezinski A, Lee J T, Slinker J D, et al. A light-emitting memristor. Organic Electron, 2008, 11: 150–153 Driscoll T, Kim H T, Chae B G, et al. Phase-transition driven memristive system. Appl Phys Lett, 2009, 95: 043 503/1–3 Huai Y. Spin-transfer torque MRAM (STT-MRAM): challenges and prospects. AAPPS Bull, 2008, 18: 33–40 Biolek Z, Biolek D, Biolkov´ a V. SPICE model of memristor with nonlinear dopant drift. Radioengineering, 2009, 18: 210–214 Zhang X L, Huang Z C, Yu J B. Memristor model for SPICE. IEICE Trans Electron, 2010, E93C: 355–360 Robinett W, Pickett M, Borghetti J, et al. A memristor-based nonvolatile latch circuit. Nanotechnology, 2010, 21: 235203 Vontobel P O, Robinett W, Kuekes P J, et al. Writing to and reading from a nano-scale crossbar memory based on memristors. Nanotechnology, 2009, 20: 425204
1460
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Sci China Inf Sci
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15 laiho M, Lehtonen E. Arithmetic operations within memristor-based analog memory. In: Proceedings of the 12th International Workshop on Cellular Nanoscale Networks and Their Applications, Berkeley, 2010. 1–4 16 Manem H, Rose G S, He X, et al. Design considerations for variation tolerant multilevel CMOS/nano memristor memory. In: Great Lakes Symposium on VLSI, Rhode Island, 2010. 287–292 17 Eshraghian K, Cho K R, Kavehei O, et al. Memristor MOS content addressable memory (MCAM): hybrid architecture for future high performance search engines. IEEE Trans VLSI Syst, 2010, 99: 1–11 18 Kim H, Sah M P, Yang C, et al. Memristor-based multilevel memory. In: Proceedings of the 12th International Workshop on Cellular Nanoscale Networks and Their Applications, Berkeley, 2010. 1–6 19 Medeiros-Ribeiro G, Williams R S. Memristor-CMOS hybrid integrated circuits for reconfigurable logic. Nano Lett, 2009, 9: 3640–3645 20 Jo S H, Chang T, Ebong I, et al. Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett, 2010, 10: 1297–1301 21 Afifi A, Ayatollahi A, Raissi F, et al. Efficient hybrid CMOS-nano circuit design for spiking neurons and memristive synapses with STDP. IEICE Trans Fund, 2010, E93-A: 1670–1677 22 Muthuswamy B. Memristor based chaotic circuits. IETE Tech Rev, 2009, 26: 417–429 23 Zhong Q S, Yu Y B, Yu J B. Fuzzy modeling and impulsive control of a memristor-based chaotic system. Chin Phys Lett, 2010, 27: 020501 1–020501 3 24 Jo S H, Kim K H, Lu W. Programmable resistance switching in nanoscale two-terminal devices. Nano Lett, 2009, 9: 496–500 25 Shin S, Kim K, Kang S M. Memristor-based fine resolution programmable resistance and its applications. In: Proceedings of International Conference on Communications, Circuits and Systems, Milpitas, 2009. 948–951 26 Raja T, Mourad S. Digital logic implementation in memristor-based crossbars. In: Proceedings of International Conference on Communications, Circuits and Systems, Milpitas, 2009. 939–943 27 Programmable Electronics using Memristor Crossbars. http://knol.google.com/k/anonymous/programmable-elec- tronicsusing/23zgknsxnl-chu/2, 2009 28 Hu X F, Duan S K, Wang L D, et al. Memristive crossbar array with applications in image processing. Sci China Inf Sci, 2012, 55: 461-472 29 Yang J J, Zhang M X, Strachan J P, et al. High switching endurance in TaOx memristive devices. Appl Phys Lett, 2010, 97: 232102 1–232102 3
