METAPROGRAMMING TECHNIQUES FOR DESIGNING EMBEDDED COMPONENTS FOR AMBIENT INTELLIGENCE
VYTAUTAS ŠTUIKYS, ROBERTAS DAMAŠEVICIUS Kaunas University of Technology, Software Engineering Department, Studentu 50, 3031-Kaunas, Lithuania,
[email protected];
[email protected]
Abstract:
The design for ambient intelligence (AmI) requires the development and adoption of the novel domain analysis methods and design methodologies. Our approach is based on the domain and application-specific analysis methods adopted from the SW engineering domain, the generic embedded component (EC) model and the metaprogramming (MPG) techniques. The novelty of our approach is that we apply MPG systematically in order to deal with a vast quantity, diversity and heterogeneity of the ECs, raise the level of abstraction in embedded system design, and achieve higher flexibility, reusability and customisability for AmI-oriented design. We provide three case studies and discuss the application of the heterogeneous MPG techniques for designing ECs for AmI.
Key words:
ambient intelligence, domain analysis, generic embedded component, embedded software, metaprogramming, software generation.
1.
INTRODUCTION
Ambient Intelligence (AmI) is usually defined as a combination of ubiquitous computing, ubiquitous communications and intelligent interfaces [1]. Ubiquitous computing anticipates a great quantity, diversity and heterogeneity of the collaborating embedded systems (ES) in a distributed environment. Ubiquitous communications anticipate a communication
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VYTAUTAS ŠTUIKYS, ROBERTAS DAMAŠEVICIUS
infrastructure that is flexible, reliable and omnipresent. Intelligent interfaces require the self-adaptability and mobility of the advanced user interfaces, which enable the interaction of the nomadic users with the environment in a natural and personalised way. The design for AmI involves the convergence and integration of software (SW) and hardware (HW) design methodologies, embedded and distributed design, and consumer and microelectronics technology. AmI may become the next paradigm for the ES design. Currently, ES are applied as subsystems in a wide variety of the so called smart products: mobile phones, MP3 and DVD players, TV sets and video game consoles, kitchen appliances, etc. These ES implement a large diversity of functions, however, they are composed of a limited number of common SW/HW components such as DSP, MPEG, codecs, etc. These basic blocks of the ES design can be called embedded components (ECs). The AmI paradigm raises the stakes in ES design. The smart products, additionally to their basic functionality, must be able to communicate and co-operate with other smart products in the common AmI-oriented environment. Therefore, every ES must be designed as an EC for a larger context of an application. This requires the reconsideration of the existing ES design methodologies and the development of the new ones. Already, ECs must be developed on an industrial scale to match a huge customer demand and varying requirements, at the same time maintaining the quality-of-service and shortening time-to-market. One of the solutions, which can be used for achieving these aims, is a concept of product lines [2]. The concept considers SW systems in the same way as traditional industrial products and aims at achieving greater configurability, variability and adaptability to the particular user requirements. The adoption of this concept for the AmI-oriented ES design could be particularly useful. ES Design Roadmap [3] has outlined the major opportunities for action in ES design as follows. (1) The promotion, development and facilitation of IP (Intellectual Property) reuse on a broad scale, as an important enabler to increase design productivity. (2) The development of the methods and tools which capture ideas in the high-level models and close the gap between requirements and specification. (3) The design space exploration with the purpose of obtaining high-quality solutions. Our contribution is based on (1) analysis of the requirements and usage of modern domain analysis (DA) methods for designing the middle-grained ECs for AmI application, (2) generic EC model for designing generic ECs, which encapsulate families of EC instances, and (3) metaprogramming (MPG) paradigm for describing generic ECs. We propose to use the metaprogramming (MPG) techniques for (a) dealing with a diversity and heterogeneity of ECs, (b) raising the level of abstraction in ES design, and (c) achieving higher flexibility, reusability and
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customisability in the context of AmI. This paper continues our previous research on soft IP design using the MPG techniques [4]. The structure of the paper is as follows. In Section 2, we review the related works. In Section 3, we analyse the requirements for designing ECs. In Section 4, we analyse the DA methods to express the application-specific content for ES. In Section 5, we describe the EC design framework based on MPG paradigm, the heterogeneous MPG techniques, and formulate the contribution of the MPG techniques for AmI-oriented EC design. In Section 6, we deliver three case studies, which cover components from the HW, embedded SW and intelligent interface domains. In Section 7, we evaluate the proposed EC design methodology. Finally, in Section 8, we conclude.
2.
RELATED WORKS
Embedded system (ES) design is a very wide topic. We, however, are mostly interested with research, which covers generalisation, customisation and specialisation of ES and their components. For example, Edwards et al. [5] outline the design process for ES and argue that higher-level models are necessary to specify ES architectures and implement the underlying models of computation. Lee [6] underscores the importance of frameworks (abstract models of computation) for embedded SW design and examines the problem how to adapt the existing SW design techniques to meet the challenges of the physical world. Paulin et al. [7] survey trends in the usage of embedded SW and processors and their application as follows: extreme diversity of requirements, architectures and applications, rapid growth of complexity of design, emergence of new standards for ES subsystems. Goossens et al. [8] survey design approaches and compilation techniques in embedded SW design, and underline the importance of system-level algorithmic optimisations and high-quality code generation. Ernst [9] surveys the typical ES architectures and discusses the problem of specialization of ES: adaptation of architectures to a given domain application. Rau and Schlansker [10] discuss the specialization and customisation of ES, which involves tailoring of the reusable-but-not-efficient general-purpose ES to the application domain. The automation of this process allows speeding up ES design using the parameterised component libraries and design frameworks. Several authors have suggested designing product lines of ES. DiazHerrera and Madisetti [11] describe a product line methodology for designing ES, which focuses on controlling variability within a product line and designing commonality across product lines. Männistö et al. [12] investigate embedded SW as a configurable product family that may include
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VYTAUTAS ŠTUIKYS, ROBERTAS DAMAŠEVICIUS
millions of variants from which individual products are configured to meet particular customer needs. A variety in SW families can be implemented using (1) customisation, (2) pre-processing and (3) modularization. In these cases a ‘universal’ SW product is adapted to behave as any specific variant, to optionally include pieces of source code or the variants are produced by selecting appropriate components from the reuse library, respectively. One of the major challenges for designing a product line, is how variability is identified, implemented and managed. Several authors have proposed different approaches, which can be summarised as metaprogramming (MPG). For example, Czarnecki and Eisenecker [13] propose Generative Programming approach, which uses the built-in MPG features of programming languages to implement generic components and configuration generators for developing embedded SW. Beuche et al. [14] described the techniques based on Aspect-Oriented Programming (AOP) for customisation of embedded SW. The AOP methodology is based on the separation of aspects and their integration using the generative techniques. Cross and Schmidt [15] use the MPG techniques to provide the distributed real-time ES with open interfaces through which they can be configured in order to optimise their performance and resource consumption. AmI only shortly has emerged as a vision for consumer electronics, therefore, there is still very little research in the area. Aarts [16] introduced the concepts and technologies for AmI. Riva et al. [17] present an extensive overview of the AmI paradigms, and formulate the technological requirements, challenges and capabilities that an AmI environment should provide. Lindwer et al. [18] examine the challenges to AmI vision, acknowledge the existence of a gap between AmI systems and components that are needed to implement those systems, and call for the development of design methodologies and tools based on new paradigms that take the AmI vision into account. Basten et al. [19] explore scalability of various AmI enabling technologies. The authors acknowledge that one of the most challenging and least understood issues about AmI systems is how to design them, and advocate for the development of new programming models and the usage of the generative techniques. The related works can be summarised as follows. The authors emphasise the role of generalisation, customisation and specialisation in ES design, and acknowledge the need for the higher-level design abstractions (models, frameworks) to deal with complexity and diversity of IPs. The emerging AmI paradigm further raises the requirements for ES design and underscores the importance of new domain analysis methods, design methodologies and techniques such as product lines and metaprogramming. In the next section, we analyse the requirements for designing ECs for the AmI-oriented ES (we reference to it as AmI in the rest part of the paper).
Metaprogramming Techniques for Designing Embedded Components for Ambient Intelligence
3.
5
ANALYSIS OF THE REQUIREMENTS FOR DESIGNING EMBEDDED COMPONENTS
Currently the design of ES faces the technological and market challenges as follows. (1) Wide diversity and increasing complexity of applications. (2) Increasing number of non-functional constraints. (3) Increasing degree of integration and networking. (4) Increasing diversity of products and services. (5) Growing importance of flexibility and SW. (6) Shrinking time-to-market. Any ES architecture must balance the technological, product, and market requirements. (1) Technological requirements: Moore's law and "design productivity gap" [20]. (2) Product requirements: smart products demand various combinations of high performance, low cost, and low power. (3) Market requirements: time-to-market and the need to support a sharp increase in the number and complexity of ES designs. Requirements for the EC design from the designer's viewpoint can be summarised as follows. (1) Easier reuse of heterogeneous HW/SW modules. (2) Design space exploration taking non-functional constraints (e. g. memory size, power usage) into account. These constraints are usually known before actual design process starts. (3) Transformation techniques for obtaining minimum power or maximum speed from available specifications. We expect the following requirements to predominate for the future AmI. (a) Higher complexity. AmI will require billions of tiny devices packed into millions of systems handling any number of tasks. Such systems will have to serve many masters at the same time, straining the existing design methodologies. Increasing heterogeneity and networking of ES further complicates the ES design. (b) Specialization. Developers design general-purpose ES for reuse in numerous smart products. Because their specific applications are unknown, these designs must incorporate both generality and completeness. Specialization involves departures from both characteristics with respect to structure and functionality. The more ECs a system has, the larger the design space for optimisation and specialization is. Therefore, there is a need for tailoring every aspect of ES to meet specific demands. (c) Diversity of ECs. The specialization of ECs leads to a vast diversity of ECs available for ES design. Already, there is a great diversity of ECs with the same functionality but different characteristics (high performance, low power, etc.). In the AmI environment, diversity of ECs will only grow. AmI will require subsystems that span 9 orders of magnitude in bandwidth or computational load, and 6 orders of magnitude in terms of allowable power dissipation [21]. The realm of embedded processors already ranges from simple 4-bit controllers to 64-bit desktop processors.
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(d) Heterogeneity. The assembly of ES from ECs, which were designed using the orthogonal requirements, leads to the heterogeneity of the designed systems. Furthermore, ECs are often designed using different design styles, methodologies and interface standards, and are very hard to integrate. (e) More complicated component selection and design space exploration (DSE). A prerequisite for the successful ES design is selection of a component. The problem is how to select ECs, which match the requirements of ES. Thus component selection requires successful DSE. The growing complexity requires performing DSE in a structured and (semi-) automatic way. (f) Further raising the level of abstraction. In HW design, it has proved necessary to introduce a new level of abstraction every 8 years in order to allow designers to cope with the growing complexity [3]. With the emergence of the AmI paradigm, it is a high time to introduce a new level of abstraction, which also must be suitable for embedded SW design as to allow using it before partitioning. (g) Increased quality, productivity and reuse content. The complexity of modern ES design requires designers to reuse HW and SW IPs. Reuse of IP blocks is essential for the development of ES. The reuse amount of existing IPs is expected to increase from current 20% to 80% in 2011 [3]. To make the IP blocks more reusable requires the introduction of the high-level component models and the standardisation of the IP properties such as area and power dissipation. Automatic IP customisation, wrapping and interface synthesis should increase the productivity and reusability in ES design. (h) Standardisation. There is an urgent need of new standards for EC design, verification and integration into ES. (i) Time-to-market. The principal requirement to ES design is shortening the time-to-market. Major hurdles are IP qualification, exchange, and seamless integration of the IP blocks into the designed ES. Solving these problems requires more research on formal verification methods, collaboration-based design, program transformation and optimisation techniques, and design automation. (j) Fault-tolerance. The ECs designed for AmI should be more faulttolerant. Various architectures and redundancy schemes should be explored. (k) Intelligence. The AmI-oriented environment requires designing more intelligent ES that are personalised, pro-active and user-oriented. Designers have to focus on designing more and higher-quality ECs for speech, face and gesture recognition for user-friendly communication with smart products. We focus on mapping the stated requirements onto the design framework described by a triple of the interrelated basic concepts as follows: the domain and application-specific analysis methods, the MPG techniques, and the generic embedded component model (GECM). We detail these below.
Metaprogramming Techniques for Designing Embedded Components for Ambient Intelligence
4.
7
DOMAIN ANALYSIS FOR EC DESIGN
Although a wide variety of the domain analysis (DA) methods exist, we focus on two kinds of the methods: the general and application-specific ones. We apply them for the well-understood domains in which the well-defined models exist (e.g., triple redundancy model for fault-tolerant design). We consider Multi-Dimensional Separation of Concerns (MDSC) [22] as a general DA method. The related methods are Feature-Oriented Domain Analysis (FODA) [23], which deals with the analysis and documentation of product features, Feature-Oriented Reuse Method (FORM) [24], which is an extension of FODA for product lines, and Family-oriented Abstraction, Specification and Translation (FAST) [25] for SW families. MDSC [22] is based on the idea that design concerns (data, behaviour, structure, etc.) should be firstly represented independently. Then, a designer develops domain programs by composing the separated concerns according to the systematic rules. Different concerns can be understood in terms of an n-dimensional design space, called a hyperspace. Each dimension is associated with a set of similar concerns, such as a set of component instances; different values along a dimension are different instances. A hyperslice is a set of instances that pertain to a concern. A hypermodule is a set of hyperslices and integration relationships that dictate how the units of hyperslices are integrated in a program. MDSC is especially useful where a great variety of requirements exist at different levels of abstraction such as in ES design. The suitability of MDSC for ES design was demonstrated in [26]. FODA [23] focuses at the identification of distinctive features of SW systems. These features are user-visible characteristics of the domain, which define both common aspects of the domain as well as differences between related domain systems. The underlying concepts of FODA are as follows: (1) Aggregation and decomposition. Aggregation means composition of separated concerns into a generic component. Decomposition means abstracting and isolating domain commonalties and variations. (2) Parameterization. Parameterization means that components are adapted by substituting the values of component parameters, which are defined to uniquely specify the application-specific concern. (3) Generalisation and specialization. Generalisation means capturing the domain commonalties, while expressing the variations at a higher level of abstraction. Specialization means tailoring a generic component into a specific component, which incorporates the application-specific details. The applicability of FODA for ES design was demonstrated by [27] for developing the family of embedded OS.
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FORM [24] starts with feature modeling to discover, understand, and capture commonalties and variabilities of a product line in terms of product features, and organises them into a model, which serves for deriving reusable and adaptable artefacts (e.g. components). FORM suggests the following guidelines for developing components for a product line: (1) Separation of common features from product specific features. A product line includes components implementing the common features of the product line and those that implement the product-specific features. (2) Encapsulation of product specific features. Features specific to each product are separated from the components implementing the core features and encapsulated in separate components with appropriate interfaces. (3) Separation of additive features. The product line components must be reusable and composite, and accommodate the variability among products through different composition configurations. FORM has been applied to several industrial application domains, including PBX and elevator control systems [24]. FAST [25] focuses on grouping similar entities or concepts into families. A family is a collection of system parts that are treated together because they are more alike than different. The grouping is based on the commonalties, which fall along many dimensions (structure, algorithm, etc.). Commonality defines the shared context that is invariant across abstractions of the application. The individual family members (instances) are distinguished by their differences, called variabilities. Variability captures the properties that distinguish abstractions in a domain. The aim of FAST is to uncover variability and provide means for its implementation. Some actions performed during DA can be automated. We consider parsing of IPs as an application-specific DA method, which is concerned with the automatic analysis of the abstract representations of the domain source code. Parsing have been used for a long time in SW compilers. It allows better understanding the domain and extracting the applicationspecific information for further customisation of the existing ECs. Our initial assumption is that the content of the analysed domain contains the variant and invariant parts. These represent variability and commonality in the domain, respectively. The primary goal of using the DA methods is to recognise the parts, and express them in a suitable form for further refinement. At a higher level, we use domain concerns along with domain-oriented abstractions to describe the variant and invariant parts more precisely. Finally, we formulate the issues of DA either explicitly or implicitly. The explicit artefacts are: taxonomy of objects and their features (requirements, parameters), methods, processes and models for ES and AmI domains. The implicit artefacts are domain knowledge in the form of a conceptual model for the further refinement of the obtained artefacts and models.
Metaprogramming Techniques for Designing Embedded Components for Ambient Intelligence
5.
EC DESIGN BASED ON METAPROGRAMMING
5.1
Metaprogramming (MPG) paradigm
9
We consider MPG paradigm as a bridge for combining the DA methods, Generic EC Model (GECM), and generative techniques for developing generic ECs. We describe the MPG paradigm as follows. (a) Definition and objectives. MPG is a higher-level programming technique, which provides means for manipulating (generating, customising, etc.) domain programs. The main aim of MPG is to develop a metaspecification (MS) - a program generator for a narrow domain of application. Such MS describes commonalties and variations in a particular application domain. Commonalties reflect the shared context that is invariant across a set of similar components, whereas the variations, which capture the distinguishing properties of the components, are specified at a higher level of abstraction and represented via the generic parameters. (b) Structure of MS. MS consists of a family of the related program instances encapsulated with a generation algorithm, which describes the generation of a particular instance depending upon the values of the generic parameters. The generation algorithms range from the simple metaconstructs such as meta-if (conditional generation) and meta-for (repetitive generation) to the sophisticated application-specific meta-patterns, which are composed of the nested combinations of the simpler meta-constructs. (c) Development of MS. (1) The domain (usually represented by one or more available instances and the requirements for generation) is analysed, and the modification concerns are identified and separated. These concerns represent the variable aspects in a domain, which are dependable upon the generic parameters. (2) The separated concerns are expressed through the generic parameters, implemented using the parameterization-based MPG techniques, and then integrated back with the fixed aspects of a domain, which are orthogonal with respect to the generic parameters. (d) Dimensions. The MPG abstractions can be categorised into two large groups as follows: the homogeneous and heterogeneous ones. MPG dimensions differ in how the concerns are separated. At the core of the homogeneous MPG is the implicit separation of concerns. At the core of the heterogeneous MPG is the explicit separation of concerns. In this paper, the emphasis is given to heterogeneous MPG, which is based on the usage of two languages (the meta- and domain ones) in the same specification. (d) Roles of languages. The heterogeneous MPG implies the usage of two different languages. The lower-level language (domain language, DL) is
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VYTAUTAS ŠTUIKYS, ROBERTAS DAMAŠEVICIUS
used for expressing basic domain functionality. The higher-level language (meta-language, ML) is used for expressing generalisation and describing domain code modification. Using a ML, designer develops a MS, which is then used as a set of instructions for ML processor to generate the specific DL code instances. (e) Usage of the MPG techniques. The MPG techniques can be used for a variety of tasks. We focus on (1) developing generic components, which encapsulate multiple domain component instances, (2) optimising (specialising) components with respect to the user requirements, (3) customising components for a particular context of application, and (4) developing SW generators for generating domain code.
5.2
Generic embedded component model
Here we present the generic embedded component model (GECM) (see Figure 1), which is based on the use of the MPG paradigm.
Heterogeneous MPG ML Interface
MS Generation of instances
Homogeneous MPG Package/Library
Generic Interface Functionality
SW or HW IP Interface Architecture Requirements for generalization
From application domain
Figure 1. The structure of GECM
The GECM is common for HW/SW domains. We describe it as follows. (a) Objectives. The GECM enables the development of the generic ECs, each instance of which encapsulates a single aspect of a design. (b) Role of MS. The MS, that is an abstract description of the GECM, serves for (1) concise representation of the qualified instances with the related functionality, and (2) selection and generation of the instances. (c) Abstractions. Generic EC is described using the generic abstractions of a standard programming language (homogeneous MPG) or an external ML (heterogeneous MPG). (c) Parameterization. GECM employs the parameterization-based mechanisms to encapsulate a family of the related component instances into a MS. Generic ECs may be parameterised in terms of their functionality,
Metaprogramming Techniques for Designing Embedded Components for Ambient Intelligence
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architecture (different implementations), size (data path width, address width, etc.), control type, performance characteristics (power, area, delay), synthesis tools and domain technology. (d) Instantiation/generation. The MS, which describes a generic EC, is used as a set of instructions for a ML processor (heterogeneous MPG) or DL compiler (homogeneous MPG) to generate/instantiate the DL code. (e) Independence. The model is independent upon the application domain: it might represent either pure HW (soft IP) or SW components for ES design. This independence is achieved by separating a DL, which implements basic domain functionality, from a ML, which is used for generalisation and domain code generation.
5.3
Contribution of the MPG techniques for AmI
Design for AmI requires a great deal of common ECs with slightly different characteristics. The MPG techniques allow describing the generic ECs at a higher level of abstraction, parameterising them with respect to the variety of user requirements, and generating the customised ready-to-use instances for a narrow and well-understood domain of application. MPG allows both representing the generic architectures and generating the specialised architectures for ES design. Thus the higher quality and productivity (the great promises of reuse) can be achieved. The areas of application of the MPG techniques for ES design can be stated as follows: (1) Specialisation of EC functionality for a particular context of application: (a) data path specialization such as adaptation of word length, e.g. 8 bit & 16 bit-wide ALU for MCU, 16 bit ALU for DSP, 32 bit ALU for processor cores. (b) Instruction set specialisation, e.g., different ALU instruction sets for different applications. (c) Memory specialization such as a selection of a memory size, word length and access mode. (2) Wrapping of ECs with additional functionality ("wrapper"): (a) wrapping for fault-tolerance with various voting schemes; (b) communications interface synthesis using various data protocols and communication schemes, e.g. handshake, FIFO. (3) Generalisation of ECs with similar functionality: (a) packaging of different ECs for convenient component selection from a design library, e.g., different implementations of ALU; (b) generalisation of the specialised EC instances such as DSP algorithms into a single generic EC. (4) Generation of domain programs, e.g., data look-up tables, instances of parameterised domain objects such as gates, etc.
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6.
CASE STUDIES
To demonstrate the application of the MPG techniques for EC design, we deliver three case studies, i.e. the generation of (1) fault-tolerant (F-T) IPs; of (2) specialised Discrete Cosine Transforms for embedded SW; and (3) intelligent interfaces between PC and Pocket PC.
6.1
Generation of fault-tolerant ES
(a) Motivation. For critical applications such as airbag or brake control, the reliability of ES is essential. The embedded HW should be able to handle every possible system state under normal and exceptional conditions. The demand for such systems is quickly growing. In this case study, we demonstrate how to generate the F-T IPs using the MPG techniques. (b) Analysis. The F-T applications usually rely on redundancy [28], i.e., the addition of resources, time, or information beyond that is needed for normal system operations as follows (see Figure 2). (1) Space redundancy – the addition of extra HW, e.g., in Triple Modular Redundancy, we have three instances of the same IP and their outputs are voted using a majority voter. (2) Data redundancy – the addition of redundant data (e.g., auxiliary data path, error-correcting codes) to ensure reliability during a transfer of data via system interconnections. (3) Time redundancy – the usage of additional time to perform system functions, thus achieving soft error tolerance. a) X
F-T IP IP
c) Y
voter
F-T IP
Y
IP X
IP fail
voter
clk rst
IP
Y counter
Y’’
voter b)
F-T IP
voter
FSM
Y’
X
Y
Y IP
voter
X
fail
X
voter
fail
Figure 2. Simplified architectures for the triple-redundant F-T: a) space, b) data, and c) time
As we see in Figure 2, there is a great deal of similarities in the domain of F-T architectures. We can treat the IP, the reliability of which we increase, as a black-box component. This IP is wrapped with a fairly trivial circuitry, which compares the redundant signals in search of a possible error.
Metaprogramming Techniques for Designing Embedded Components for Ambient Intelligence
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(c) Implementation. We wrap the soft IP for F-T applications as follows. (1) We analyse IP source code described in VHDL to extract the values of the parameters for wrapping. These parameters basically represent the IP interface signals. (2) Extracted values are used to instantiate the generic ECs, which implement the F-T architecture models. The generic GCs are metaspecifications implemented using the heterogeneous MPG techniques (Open PROMOL [29] as a ML, and VHDL as a DL). Each generic EC encapsulates a generic domain object (counter, majority voter, FSM, etc.). Specific instances of generic ECs are generated according to the values of the generic parameters. (3) The generation process is controlled via the top-level PROMOL meta-specification, whose interface is presented in Figure 3. This interface describes the set of generic parameters, which are used to select the IP and specify the concrete implementation of the F-T architecture. $
[c [c [c [c
= = = =
1] 1] 1] 3]
"Select a component: 1 - dragonfly core 2 - i8051 microcontroller 3 - Free6502 core" "Enter address bus width for the dragonfly programm memory" "Enter address bus width for the dragonfly data memory" "Enter address bus width for the dragonfly io" "Generate Free6502 core version for: 1 - synthesis 2 - debugging" "Select the type of redundancy: 1 - space 2 - data 3 - time" "Enter the order of redundancy"
{1,2,3} {8,16} {4,8} {4,8}
c:=1; prgm_bs:=16; dm_bs:=8; io_bs:=8;
{1,2}
g:=1;
{1,2,3} type:=3; {3,5} order:=3;
$
Figure 3. Interface of metaspecification in PROMOL for generating the F-T architectures
(d) Results. For the F-T applications, we have customised the freely available third-party soft (HW) IPs. (1) Free-6502 core [30] is a CPU core compatible with 8-bit 6502 microprocessor. (2) DRAGONFLY core [31] is a controller that can be used for serial communication management, FLASH and SDRAM control, etc. (3) i8051 microcontroller [32] is compatible with 8-bit microprocessor designed by Intel. Synthesis results of the original and generated cores (we use Synopsys tools; CMOS 0.35 um technology) are presented in Table 1. Table 1. Synthesis results for case study 1 Area, Area, IP Area Area, cells (IP) cells cells (space (data (time F-T IP) F-T IP) F-T IP)
Power, uW (IP)
Power, uW (space F-T IP)
Power, uW (data F-T IP)
Power, uW (time F-T IP)
Free-6502 Dragonfly i8051
8.2693 19.9421 50.5518
25.8447 58.2476 100.2620
11.1202 23.6390 63.9123
12.2117 21.7217 56.5174
4670 5883 24258
14688 18347 72774
5006 6907 24345
6696 9856 28578
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VYTAUTAS ŠTUIKYS, ROBERTAS DAMAŠEVICIUS
The synthesis results show a slight increase in chip area and estimated power usage for the generated F-T components with respect to the original IPs. Note that space redundancy means that there are 3 instances of the IP.
6.2
Generation of the specialised DCT algorithms
(a) Motivation. One can not overestimate the importance of the DSP algorithms such as Discrete Cosine Transform (DCT) in ES design. Many smart products use DCT as an EC for various applications such as image and speech processing, face recognition, etc. The overall performance of ES design depends upon embedded SW quality. Different applications usually require different performance/memory trade-offs. For this reason, optimisation of embedded SW is one of the most important issues in ES design. In this case study, we demonstrate how to significantly speedup the DSP applications at the cost of the larger data memory size. (b) Analysis. The most performance-costly part of DCT is the calculation of the cosine function. According to Amdahl's law, the most effective way to improve the performance of a program is to speed-up the most timeconsuming part of it. To achieve better performance, we apply the data specialization [33] approach: beforehand known cosine values are stored in a generated look-up table. The trade-off here is that accuracy of the result may depend upon the size of the table. However, in many applications such as JPEG, the results of DCT are rounded-off to the integer values anyway. (c) Implementation. We perform the specialization of the given DSP algorithms as follows: (1) We analyse application source code to identify references to the trigonometric library-based C functions (cos, in this case). (2) We generate a look-up table for the cosine function using heterogeneous MPG: we use C++ as a ML to generate C code (Figure 4). Homogeneous MPG (C++ templates) is used to generalise a C++ MS for generating lookup tables of any 1-argument C function. (3) Then, all references to the cosine function are replaced by the reference to the cosine look-up table. #include
(a)
template void gen_table(T_RET func_ptr(T_PARAM), T_PARAM start, T_PARAM finish, int num, char *name) { cout
