Modeling of Power Distribution Networks with Retardation Using the 'kmsmission Matrix Method Takayuki Watanabe', Krishna Srinivasan", Hideki Asai"', and Madhavan Swminathao" 'School ofAdministration and Informatics, University of Shizuoka, 52-1 Yada. Shizuoka, 422-8526. Japan (TEL/FM: +81-54-264-S444, E-mail:
[email protected]~p) "School of Electrical and Computer Engineering, Georgia Institute of Technolagy, 85 Fifih St. NU', Atlanta, CA 30308. USA (TEL: 404-894-3340 /FAX: 404-894-9959, E-mail:
[email protected]) tttDept. ofSystems Engineering, Faculty of Engineering, Shizuoka University, 3-5-1 Johoh, Hamamam, 432-8561, Japan (TEL/FAX. +81-53-278-1237, E-mail:
[email protected])
Abstract: Thirpaper describes the analysis of multilayeredpower distribution network that include signal lines and vias. The signal lines are modeled as transmirsion lines, and vias are represented as not only sepand mutual inductances but also include retardation currents. The strucrurer have been analyzed using !he Trammission Matrix Method (TMW in the fiquency domain. Analysis wing the TMMprovida conrideroble savings in memory compared lo Spice.
1. Introduction For the design of high-speed digital circuits, it is important to model the power distribution networks (PDN) in order to estimate and analyze unwanted effects, such as ground bounce, delta-I noise, and simultaneous switching noise (SSN). In the gigahertz (GHz) packages and boards, the PDN is designed using multilayered powerlground plane pairs. Due to the transient switching current of the CMOS transistors, voltage fluctuations are generated by the parasitic inductancedcapacitances of the planes and the power plane resonance degrading the performance of the system [ 11. Detailed analysis of the PDN using Full-wave Electromagnetic (EM) simulators provides more accurate results. However it takes enormous CPU time and huge memory capacity. Instead of Full-wave simulators, it is more convenient that the power plane is modeled by using lumped circuit elements, such as the cavity resonator model [2] and the unit cell model [3]. Considering the modeling of power planes having irregular shape, the unit cell model is useful because it is based on the finite deference approximation. However, in the event of modeling electrical-large multilayered planes in detail, the number of necessary unit cells increases, and CPU time and required memory capacity for solving the system of equations also increase. To overcome this problem, an efficient method based on the Transmission Matrix Method (TMM) has been proposed in 141. The novelty of this method is that the memory and time required for analyzing multilayered power planes connected by vias is the same as the cost of analyzing a single power/ground plane pair. In this paper, new feahres have been added to the method of [4]. First, the coupling effects between vias are modeled by using not only mutual inductances but also retardation currents. Using this new model, the importance of retardation as a function of via separation has been studied in this paper. In addition, signal lines have been modeled as transmission lines. and have been integrated in the Transmission Matrix Method. Through this modification, SSN generated when signal lines are referenced to the power/ground plane have been analyzed using TMM.
2. Formulation of the PowerlGround Plane Pair In this section, the modeling of the power delivery system as illustrated in Fig. 1 is described. As is well known, each P/G plane pair can be discretized spatially into ( M -1) x (N- I ) unit cells as shown in Fig. 2. Each RLGC parameter ofthe equivalent circuit of the unit cell is derived by dimensions and medium coefficients of the unit cell [3][4]. In [4], using the notation of Fig. 2(b), the transmission matrix ofthe single rectangular PIG plane pair can be represented as
,:[=I:[
33
(1)
where V,, I,, V,,, and I,,, are input voltage vector, input current vector, output voltage vector, and output current vector, respectively. In Eq. (I), I E R"""is the identity matrix, and Y, E C?*'can be constructed by stamping the admittance between nodes: Y, = 2/(R + j d ) , (2) and the admittance between the node and the ground Y, = (G+ jwC)/4. (3) Next, if decoupling capacitors are added between powedground planes, their admittance values: ,Y = I/(R- + +l / j d q ) (4) are stamped into the corresponding diagonal elements of the matrix Yp, where Rcq and L , are the equivalent series resistance (ESR) and the equivalent series inductance (ESL), respectively.
0-7803-667-1/04/$20.00 0 2004 IEEE
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Fig.2: Unit cell and equivalent circuit.
Fig. 1: Typical 8 layer PCB Stack-up.
3. Formulation of t h e Via Interactions The multilayered power delivery system can be represented as P/Gplane pairs connected by many vias as illustrated in Fig. 3. Also there are thousands of signal vias through the P/Gplane pairs in realistic boards and packages. In the past, several kinds of
via model have been proposed [SI. Basically, vias can be modeled as partial self/mutual inductances and capacitances to planes. To simplify the problem, only partial self/mutual inductances of vias have been included in this paper. In the case of Fig. 4, a relation of induced voltage v , and current is iven by
",(I)= L, I+ di (1) M , , di-(1) 1+ M,, 1 di (1) + M -+ di,(i) M dis(if, dl dl m " dl " m
(5)
In 141, each power/ground via pair is represented as loop inductance as shown in Fig. 3. For example, assume that LI and L,, and also L, and h are via pairs. The relation between the induced voltage and currents can be rewritten as di (1) di ( 1 ) di,(i) v,(1)= C L +M:,I + M;,-, di
di
di
-
(7) I,'=& +I., -2M,,,q,= M,,+ M2,- MI, - M,,, M;,= M , , M, . In this paper, Eq. (6) has been modified to include retardation effects of currents between via pain. Since the coupling between circuit elements is not instantaneous, but is limited by the velocity of EM-waves [6], the interaction between separated vias has to be modeled by using not only mutual inductances but also retardation effects. Therefore, Eq. (6) C M be rewritten as v, ( 1 ) = M b 4 (1 - r13)+ M ; 4 (I (8)
di,o
+
di
di
dl
where 7 is the delay between vias, and is given by r/vc, where r is the center to center distance between vias, and v, is the velocity in the medium. In the case of the via pair, the center location is chosen as the midpoint between two vias. In the frequency-domain, Eq. (8) is transformed into (9) V,(jo)=ju&!,'f,t joM:,I, ex& jwr,,)+/#M:JIJexp(- jor,,). Therefore, the transmission matrix of the entire via network between power planes can be represented as
j#M2(MBN)e-i"3(" "1 .__
where R. (n = 1.2, ..., M x N ) is the real loss term of the via conductor.
4. Formulation of t h e Signal Lines
In this paper, the model of signal lines has been included as shown in Fig. 3. Signal lines can be represented as single and coupled transmission lines. From the telegrapher's equation, the relation of voltages and currents between the near-end and the farend in the Laplace domain is given by
where R, L, G and C are per-unit-length transmission line parameters, s is jo, and d is the length of the transmission line. In the case of the single line, the admittance parameter of transmission lines can be obtained as
1, zo=m.
~=J(R+IXG+~CJ.
234
(12)
Fig. 5: An example board. Fig. 4: Side view of the via interactions. Fig. 3: The lumped model of Fig. 1. In the case of the coupled lines, the matrix Y,r can be obtained by the Taylor expansion of the matrix exponential term [7]. Therefore, the transmission matrix of the signal layer can be represented as
[:I=[:,
:I;:]*
(13)
where Y, E C?" is constructed by stamping the admittance parameters Y,, of each signal lines. Next, the signal via is modeled by via inductance as has been mentioned in Sect. 3. On the other hand, the return current for the signal is flowing through plane pairs. These currents cause voltage fluctuations between planes. Finally, reference voltages of the signal line may swing. To model this effect, CCCS (Current Controlled Current Source) and VCVS (Voltage Controlled Voltage Source) are used in the lumped model as shown in Fig. 3. These controlled sources are easily incorporated in the transmission matrix.
5. Impedance Computation The transmission matrix for the overall PDN can be obtained by multiplying the individual matrices (I), (IO) and (16). Therefore, the size of transmission matrix of multilayered power planes connected by vias is still 2( Mx N )x 2( Mx N ) which is equal to !he size of transmission matrix of a single powerlground plane pair. Making full use of this characteristic the method described in [4] can be used in calculating the impedance matrix efficiently. In the proposed method, the procedure to calculate the impedance matrix is similar to [4], though the transmission line model and retardation effects have been added.
6. Numerical Results 6.1 Validity of the lumped model I
IV
M
PI
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--
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--
0
0
4.01
2
lime
["sec]
2
lime \-,
Fig. 6: Transient responses calculated by Spice and FDTD simulator. (a) Current waveforms w/o T-line. (b) Voltage waveforms at PI with T-line. (c) Voltage waveforms at the near- and the far- end of T-Line. An irregular shaped board shown in Fig. 5 was analyzed. First, in order to verify the validity of the lumped model in Fig. 3, we compared the uansient responses calculated using Spice (modified version of Berkeley Spice 3 6 ) and FDTD (Finite Difference Time Domain) simulator. In the Spice simulation, each plane pair was modeled by the unit cells without frequency dependent effects, such as the skin effect, and via inductance values were calculated by the FastHenry program [SI.In the FDTD simulation, nonuniform cells and the PML absorb boundary condition were used. As a first case, PI (25mm, 75mm) was excited with a Gaussian pulse, and the signal line was ignored. The current flowing in !he left hand side via in Fig. 5 is plo!ted in Fig. 6 (a). As shown in Fig. 6(a), there is a good correlation between Spice and FDTD results. As a second case, the transmission line was excited with a Gaussian pulse. The transmission line was modeled as a T-element in Spice, terminated with a 25Q load resistor. Fig 6(b) shows the voltage waveforms at port PI which is a voltage fluctuation due to the current of signal via. The voltage waveforms at the terminals of signal line are shown in Fig. 6 (c). From these results, the lumped model including vias and signal lines is effective to verify not only the power integrity but also the signal integrity.
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6.2 Impedance calculation using TMM ,the .... imnnrtance of mutual inductances and retardation effects between vias, the self impedance at PI was calcuIn nrdpr IO verifv .._. ._ lated by TMM with changing the distance of via pairs, where we counted out the signal line and the signal via in Fig. 5. Fig. 7 ~~~~~
~
~
~~~~~
~
shows self impedance characteristics where the distance of two differential via pairs is 10". For comparison, we also simulated this example by using the Spice AC analysis. Taken into account mutual inductances as well as retardation effects between vias from Fig. 7, there is not all that much difference between the results. As is well known, the differential via pair is one of electrically-good structures, and has much lower mutual inductance than self inductance (0.788nH). We plotted the phase of the retardation function exp(-,or) with changing the distance of via pairs in Fig. 8. In general, retardation effects become important when the distance becomes more than one-tenth of the signal wavelength [7], which denotes d5 phase shift. From Fig. 8, when the vias have much longer distance, retardation effects become important in much lower frequency. However, when the vias are far apart, mutual inductance is very small as shown in Fig. 9. Because the total coupling coefficient in Eq. (IO) is the product of the retardation function and the value of mutual inductance, it is more important when two vias are in close proximity and higher-frequency currents flow in these vias. However, since the effect of via self inductance becomes prominent at high frequency, it is clear from Fig. 7 that high frequency current does not flow through vias. In this case, retardation effects are not imporlant even for the case of the short distance in high frequency on the assumption of differential currents. Next, we simulated the example with a signal line. A transfer impedance from a terminal of the upper signal line to the port PI are plotted in Fig. IO. While TMM can handle frequency dependent parameters, in our simulation, the RLGC parameters of the unit cell and the transmission line are assumed as frequency independent in order to compare with Spice.
I&
' ' '
'
0.S
"
' '
'
'
" " " "
Fteqiency
1.5
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Fig. 1 0 Transfer impedance spectra between the near-end ofT-Line and the port PI
I. Conclusions In this paper, a method has been presented for the analysis of the power distribution network including transmission lines using the Transmission Matrix Method. In this method, all plane pairs and transmission lines are connected by vias, which are modeled as self and mutual inductors after including retardation effects. Using this new model, the importance of retardation effects between vias and return currents on planes have been studied. References ..~~~~~ L. Polka, S. Chiekamcnahalli, C.Y. Chung. D.G. Figucroa, Y.L. Li, K. Merley, D. Wood and L. Zu,"Package-Level lnt~rconnect&sign for Optimum Elecmeal Performance,^ Inlel TechnologV Journal Q 3 . 2 0 0 . N. Na, 1. Choi. S. Chun, M. Swaminatha and I. Srinivaran, "Modeling and transient simulation of plans in eleeuomagnctic pacltager," IEEE Trans. Comp., Packoz., Monufocl. techno/.B,voi. 21, pp. 157-163. May. 1998. L. Smith, R. Raymond, and T. Roy, '"Powerplans FP~ECmodels and rimvlatcd psdormanco for materials and geometries. " IEEE T r m s A h . P a h g . vol. 24, pp. 271-287. Aug. 2001. J.H. Kim, and M. Swaminathan, "Modeling ofMultilayered Power Distribution Plancs Using Transmission Matrix Method," IEEE Tram. Ad". Packog. vol. 25, pp. 1 8 W 9 9 , May. 2002. K.S. Oh, I.E. Schun-Aim, R Miltm, and B. Wang, "Computation of the cquivalmt capacitance of a via in a multilayered board using the closed-form Greens function,"lEEE Troonr. Microwme Theory Tech, vol. 44, pp. 347-349. Fcb. 1996. P.1. Restlc, A.E. Ruehli, S.G. Walker, and G. Papadopodor, "Full-Wave PEEC Time-Domain Mcthcd for the Modeling of On-Chip I~~CTCOM~CU," IEEE Trans Gmpuler-AidedDesign, vol.20, pp.877-887. July 2001. R. Achar, M.S. Nakhla. "Simulation ofhigh-speed interconnects, " Proceedinzs ofthe IEEE, vol. 89, No. 5, pp.693-728, May 2001. M. Kamon, M.J. Tsuk, and I. white, '"Fashmry:A multipoic-accclcrated 3-d inductance cxmclion program," IEEE Trmsocliom on Microwave Theory ondTechniques, vol. 42, pp. 175&1758, Sept. 1994.
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