We show that the linear model, suitable for inclusion in circuit simulators, can assist in the design of an integrated recording system capable of artifact removal.
Proceedings of the 26th Annual International Conference of the IEEE EMBS San Francisco, CA, USA • September 1-5, 2004
Models of Stimulation Artifacts Applied to Integrated Circuit Design Richard A. Blum, James D. Ross, Samir K. Das, Edgar A. Brown, Stephen P. DeWeerth Laboratory for Neuroengineering Georgia Institute of Technology Atlanta, GA 30332
Abstract— The goal of this research is to develop a monolithic stimulation and recording system capable of simultaneous, multichannel stimulation and recording. Monolithic systems are advantageous for large numbers of recording sites because they scale better than systems composed of discrete amplifiers. A major problem in recording systems is the stimulation artifact, a transient distortion present after stimulation. In order to improve recording systems, we analyze models of the stimulation artifact. Comparisons between model predictions and physical measurements verify the models. We show that the linear model, suitable for inclusion in circuit simulators, can assist in the design of an integrated recording system capable of artifact removal. The proposed design occupies 18, 000 µ2 and is suitable for monolithic integration. Index Terms— electrode, electrode models, multielectrode arrrays, MEA, extracellular recording, stimulation artifact.
I. A BOUT THE S TIMULATION A RTIFACT In vitro studies of neural cultures show promise of revealing how neurons form connections. Unfortunately, there are many technical difficulties that interfere with experiments. One common difficulty is the presence of the stimulation artifact. Large signal losses are associated with extracellular recordings. The extracellular electrodes do not measure membrane potentials directly; rather, they record the electric field induced by ionic channel currents. This electric field decreases with distance from the cell, so the voltages present at the electrode are in the microvolt range, even though membrane potentials are in the millivolt range. Signal loss also takes place in the reverse path, so that extracellular stimulation requires voltages at the electrode that are many orders of magnitude larger than those due to cellular electrical activity [1]. The stimulation voltages overwhelm the sensitive recording system, creating an effect known as the stimulation artifact. During the duration of the stimulation artifact, recording cellular activity becomes impossible. Literature presents many attempts to remove the stimulus artifact. Most methods rely on applying signal processing techniques to the recorded data. Examples include curve fitting [2] and filtering [3]. These have an obvious drawback: they rely on the recording amplifiers operating in their linear range. Unfortunately, the large artifact voltages saturate the recording amplifiers, and post-processing cannot extract useful information from a saturated amplifier. The difficulty of recording from saturated amplifiers raises the need to physically reduce the artifact itself. A common
0-7803-8439-3/04/$20.00©2004 IEEE
approach is to employ biphasic voltage stimulation, in the hope that the symmetric nature of the stimulation will eliminate the artifact; however, biphasic stimulation alone is not sufficient to remove it. Dedicated physical circuitry may be necessary to suppress the artifact. An example system that actively suppresses the artifact connects a discharge path to the electrode to eliminate the artifact [4]. The rational behind the system is that stimulation charges the electrode, and the charge remains on the electrode after stimulation, creating the artifact. II. M ICROELECTRONIC I NTERFACES TO M ULTIELECTRODE A RRAYS Although discrete amplifiers offer the performance necessary for a single electrode, systems composed of discrete components do not scale well with large numbers of electrodes. Because of the small size of neurons, multielectrode arrays (MEAs)—which offer high spatial resolutions—are a common tool for neuroscience studies. Proposed MEAs will have 3-dimensional structures, providing thousands of electrodes. MEAs require precision electronics to amplify and store the extracellular signals. Integrated circuits, which offer a correspondingly high density of electronics, are a natural partner to MEAs [5][6][7]. Existing integrated designs do not incorporate artifact suppression. We aim to develop new designs that incorporate the functionality of discrete systems, but in a small size that will scale to large systems. As a design aid, we require models of the stimulation artifact that are simple enough to include in SPICE. III. A RTIFACT M ODELING In order to verify that trapped charge causes the artifacts, we study model stimulation systems. We use two different models of the electrode. The first model uses nonlinear equations that mimic the underlying physics of the system. The second model uses linear components. In both these systems, the model stimulation source is an ideal voltage source in series with a time dependent resistance that models the stimulation switch. We also present a physical system that will generate real artifacts. The physical system serves as the reference that the model systems attempt to reproduce. The models demonstrate behavior qualitatively similar to observed artifacts, thus providing a tool for development of integrated circuits for stimulation and recording.
4075
CI (V)
Medium
+
100X
ADC
−
R(t)
DAC
RS
DAC
DAC
Computer with DSP Board
−
Vstim
+
Electrode
It (V)
Fig. 1. Physical system for generating stimulation artifacts. A computer with real-time DSP hardware generates the stimulation pulse and records the artifact.
Fig. 3. The nonlinear model of the electrode and stimulation voltage. The electrode model consists of a nonlinear interface capacitance, CI (V ), a nonlinear charge transfer, It (V ), and a linear spreading resistance, RS . The model of the stimulation switch is a time dependent resistor, R(t).
Measured Stimulus Artifact
Simulated Stimulus Artifact 0.08
0.06
0.06 0.04
0.04 0.02
Voltage (V)
Voltage (V)
0.02 0 −0.02
−0.02
−0.04
−0.04
−0.06
−1
0
−0.06 −0.5
0
0.5
1 1.5 Time (s)
2
2.5
−0.08
3
0.009
−3
x 10
0.0095
0.01
0.0105 0.011 Time (s)
0.0115
0.012
Fig. 2. Artifact generated by the physical system. This serves as the reference to evaluate the proposed models.
Fig. 4. Predicted artifact from the nonlinear model. The qualitative behavior is very similar to the measured artifact (Fig. 2).
A. Physical Test System
Helmholtz plane to the electrode, and Ut is the thermal voltage; (1 − β) zηt −βzηt − exp (2) It = AJ0 exp Ut Ut
We construct the physical reference by connecting an MEA to a computer running dSPACE, a commercial real-time DSP hardware system. Fig. 1 shows the complete system. The recording amplifier is an INA116PA instrumentation amplifiers from Texas Instruments, the stimulation amplifier is a LMC6482AIN from National Semiconductor, and the switch is a MAX326CPE from Maxim Semiconductor. Fig. 2 shows the artifact that the physical system produces. This measured artifact is the reference against which we evaluate our models. B. Nonlinear Model System The most detailed model we study considers the detailed nonlinearities of the electrode [8]. We use a SIMULINK model that considers the electrode as an interface capacitance, CI (V ), charge transfer current source, It (V ), and spreading resistance, RS , as shown in Fig. 3. The nonlinear components follow the formulas: zV r 0 r o CI = A + cosh (1) dOHP LD 2Ut where A is the area of the electrode, r o is the permittivity of the electrolyte, LD is the Debeye length, z is the valence of the ions in solution, dOHP is the distance from the outer
where J0 is the exchange current density of the electrode, β is a symmetry factor reflecting the energy barrier differences between oxidation and reduction, and ηt is the difference between the applied voltage and the equilibrium voltage; and ρ ln 4 wl (3) RS = πl where ρ is the resistivity of the electrolyte, w is the width of the electrode, and l is the length of the electrode. Generation of a model artifact is as follows: First, the variable resistor, R(t), assumes a low value, simulating connecting the stimulation voltage. Next, the stimulation voltage source creates a biphasic pulse. Finally, the variable resistor assumes a high value, so that the only discharge path for charge is through the electrode itself. Fig. 4 shows the generated artifact, which is very similar to the measured artifact of Fig. 2. C. Linear Model System The linear model uses a simple RC circuit for the electrode. To complete the model system, we include the time-dependent
4076
−9
Vswitch
1 ΜΩ
1.5
3.3 nF
Vstim RS 100 kΩ
Stimulation Electrode
10 kΩ
33 nF Ground Electrode
Stimulation Voltage (V)
Fig. 5. Linear circuit model of the electrode. The electrodes are represented as parallel RC circuits. A time dependent resistor models the stimulation switch.
Switch Voltage (V)
Charge Stored on the Stimulation Electrode
0.5
0
−0.5
−1 0
Effects of Discharge Period on Stimulation Artifact
0.002
0.002
0.004
0.006
0.008
0.008
0.01
0.01
1 µs Discharge 101 µs Discharge 1 ms Discharge
4 2 0.002
0.004
0.006
0.5
0.008
IV. I NTEGRATED C IRCUITS FOR A RTIFACT R EMOVAL We have shown that a linear model is capable of generating stimulation artifacts qualitatively similar to measured artifacts. By design, the linear model is suitable for incorporation into circuit simulation software. We add the linear model to SPICE simulations of proposed integrated circuits, and demonstrate reduction of the artifact.
0.01
1 µs Discharge 101 µs Discharge 1 ms Discharge
0
−0.5 0
0.006
Fig. 7. Charge stored on the stimulation electrode in the linear circuit model. This graph demonstrates that charge storage on the stimulation electrode contributes significantly to the artifact.
0
0 0
0.004 Time (s)
0.5
−0.5 0
Electrode Voltage (V)
x 10
1
Charge (C)
R switch closed: 100 Ω open: 100 ΜΩ
0.002
0.004
0.006
0.008
0.01
Time (s)
A. Recording System Topology
Fig. 6. Simulation results of linear model. The top axis shows the 100 µs biphasic stimulation pulse. The middle axis shows the voltage controlling the discharge switch. The bottom axis shows the resulting artifacts for varying discharge periods. There is no significant artifact for the 1 ms discharge period.
switch resistance, Rswitch , a stimulation electrode, ground electrode, and spreading resistance (see Fig. 5). The Vstim source is a biphasic pulse, with a duration of 100 µs. After the stimulation, Vstim is at the ground potential, so the stimulation source doubles as the discharge path when the switch resistance remains low after stimulation. Simulations consider three different discharge periods: 1 µs, 101 µs, and 1 ms. The simulation results, Fig. 6, show that artifact removal occurs for a discharge period of 1 ms. Although significant quantitative differences exist between the linear and nonlinear simulations, the qualitative behavior is similar. The linear model provides the simplest tool for exploring the cause of the artifact. Computing the charge stored in the electrode-electrolyte interface (the capacitor of the stimulation electrode) verifies that stimulation does indeed charge the interface (Fig. 7). The charge remains on the electrode for tens of milliseconds after stimulation, resulting in the stimulation artifact. Although the stimulation pulse itself is symmetric, the voltage across the capacitor changes during the positive phase of stimulation, leading to asymmetric charging and discharging of the capacitor during stimulation.
The proposed system consists of three transconductance amplifiers [9].The main amplifier, Gm1 , is a wide range transconductance amplifier specifically designed for low noise [10]. Because real electrodes exhibit large dc offsets, the amplifier should reject low frequencies. Traditional RC filters can reject dc, but the size of the required components prohibits integration. The solution is to add a second amplifier, Gm2 , that supplies current directly to the inverting input of Gm1 . This current slowly nulls the main amplifier, provides a highpass pole for dc rejection. This method is similar to that found in [11]. Under normal recording conditions, Gm1 and Gm2 combine to give a transfer function of C
2 s Gm2 Vo C1 =− T 2 Vi C2 s2 GCL C + s GCm2 +1 m1 Gm2
(4)
Assuming widely spaced poles, the pole locations are p1 = −
Gm1 C2 CL C1 + C2
p2 = − GCm2 2
(5)
Both poles are real and negative, indicative of a stable system. The third amplifier, Gm3 , discharges the stimulation artifact and is powered down for normal recording. When active, it drives the electrode voltage to whatever voltage is necessary to have the output at ground. During the discharge phase, the input capacitor (C1 ) functions as a sample-and-hold element that stores the offset voltage of the electrode. This effect accounts for dc potentials at the electrode.
4077
occupies 18, 000 µ2 of die area in 0.35 µ technology. This small size allows for production of a single die with 256 recording units.
− +
Gm2 C2
C1 −
R switch V
switch
Vstim
V. C ONCLUSION
Gm1
CL
+
CE
Stimulation Electrode
+ −
RS
Ground Electrode
+ −
Gm3
Fig. 8. Schematic of the proposed recording system with stimulation artifact 1 removal. The main amplifier, Gm1 , provides a gain of − C . Amplifier Gm2 C 2
introduces a high-pass pole at − GCm2 . The third amplifier, Gm3 , discharges 2 the stimulation artifact when switched on. Simulated Artifact Reduction Circuit 0.035
Voltage (V)
0.03
0.025
We have compared two models, linear and nonlinear, of the electrode stimulation system. Both models generate artifacts that are qualitatively similar to those measured from a physical system, demonstrating that the models are sufficient to understand the dynamics of the stimulation artifact. The primary cause of the artifact is trapped charge at the electrode-electrolyte interface. During stimulation, the low impedance source charges the interface. After stimulation, the only discharge path available is through the electrode and medium. Because this path is high impedance, the charge generates a long lasting transient signal during discharge. Addition of a low impedance discharge path immediately after stimulation reduces the size and duration of the artifact. We have designed and simulated an integrated circuit that provides the necessary discharge path. The circuit has demonstrated linear operation after a short discharge period. Additional filters may be able to remove the remaining artifact. Although other circuits have been presented that reject artifacts, we designed this circuit to scale to MEAs with hundreds of electrodes.
0.02
ACKNOWLEDGMENT The National Institutes of Health support this research through a Bioengineering Research Partnership grant (1 R01 EB00786-01). Additionally, the National Science Foundation supports J. Ross through a graduate fellowship.
0.015
0.01 0
0.002
0.004
0.006 Time (s)
0.008
0.01
0.012
R EFERENCES
Fig. 9. Simulated operation of the artifact suppression circuitry. A discharge period after stimulation reduces the artifact. Although the artifact is still noticeable, the amplifier operates in its linear region after the discharge.
During stimulation, the entire system behaves as a two stage op amp with unity-gain feedback. The first stage is Gm3 and the second stage is the Gm1 –Gm2 combination. Assuming a large electrode capacitance, CE , the pole associated with the first stage is Gm3 (6) p3 = − CE Stability requires that |p1 | |p3 |. The easiest way to accomplish this is to reduce the size of the load capacitor, CL . Because this will raise the low-pass cutoff frequency of the recording system, an additional low-pass filter should follow this stage to filter out noise above biologically revelant frequencies. Fig. 9 shows the simulated result of the artifact suppression system. After the stimulation and discharge, the recording system does not saturate. Although an artifact is still present, operation in the linear region implies that post-processing of the recorded signal can filter out the remaining artifact. The entire recording system, including all three amplifiers,
[1] J. Pine, “Recording action potentials from cultured neurons with extracellular microcircuit electrodes,” J. Neurosci. Meth., vol. 2, no. 1, pp. 19–31, Feb. 1980. [2] D. A. Wagenaar and S. M. Potter, “Real-time multi-channel stimulus artifact suppression by local curve fitting,” J. Neurosci. Meth., vol. 120, no. 2, pp. 17–24, Oct. 2002. [3] J. W. Gnadt, S. D. Echols, A. Yildirim, H. Zhang, and K. Paul, “Spectral cancellation of microstimulation artifact for simultaneuos neural recording In Situ,” IEEE Trans. Biomed. Eng., vol. 50, no. 10, pp. 1129–1135, Oct. 2003. [4] Y. Jimbo, N. Kasai, K. Torimitsu, T. Tateno, and H. Robinson, “A system for MEA-based multisite stimulation,” IEEE Trans. Biomed. Eng., vol. 50, no. 2, pp. 241–248, Feb. 2003. [5] J. Ji and K. D. Wise, “An implantable CMOS circuit interface for multiplexed microelectrode recording arrays,” IEEE J. Solid-State Circuits, vol. 27, no. 3, pp. 433–443, Mar. 1992. [6] K. Najafi and K. D. Wise, “An implantable multielectrode array with on-chip signal processing,” IEEE J. Solid-State Circuits, vol. 21, no. 6, pp. 1035–1044, Dec. 1986. [7] I. Obeid, M. A. L. Nicolelis, and P. D. Wolf, “A multichannel telemetry system for single unit neural recordings,” J. Neurosci. Meth., vol. 133, no. 1–2, pp. 33–38, Feb. 2004. [8] D. A. Borkholder, “Cell based sensors using microelectrodes,” Ph.D. dissertation, Stanford University, Nov. 1998. [9] C. Mead, Analog VLSI and Neural Systems. Addison-Wesley, 1989. [10] R. R. Harrison and C. Charles, “A low-power, low-noise CMOS amplifier for neural recording applications,” IEEE J. Solid-State Circuits, vol. 38, no. 6, June 2003. [11] P. Hasler, M. Kucic, and B. A. Minch, “A transistor-only model of the autozeroing floating-gate amplifier,” in Proc. of the Midwest Symposium on Circuits and Systems, vol. 1, 1999, pp. 157–160.
4078
