Advanced microprocessor and Peripherals - A.K.Ray and K.M.Bhurchandi, TMH,
2000. T2. Micro Controllers – Deshmukh, Tata McGraw Hill Edition. R3.
Department of Computer Science & Engineering Faculty Name :Ch. Satish Kumar Reddy Name of the Subject: MP&I Branch: III CSE I Semester Lecture Duration : 45 Min Lesson Plan Suggested Topics as per JNTU syllabus Teaching L.No. Topics to be covered Page No Book Methods Unit I L1 Architecture of 8085, Registers R4 2.2 BB L2 Pin diagram, Interrupts, Addressing Modes R4 2.2 BB Instruction sets L3 An overview of 8085 R4 2.25 BB L4 Architecture of 8086 T1 4 BB L5 Architecture of 8086 Microprocessor Memory segmentation, Flag register T1 6 BB Special functions of General Purpose General data registers, segment registers, L6 T1 2 BB registers Pointers 8086 Flag register and function of L7 T1 7 BB 8086 flags Index registers ,Description of Each flag bits Immediate, Direct, Register, Register Indirect, L8 T1 41 BB Indexed, Register Relative Based Indexed Relative based Indexed Addressing modes of 8086 Data coy/transfer Instructions, Arithmetic and L9 T1 46 BB Logical Instructions, Branch Instructions, machine Control L10 T1 69 BB Instructions, Flag Manipulation Instructions Instruction set of 8086, Assembler Shift and Rotate Instructions and string L11 T1 66, 74 BB Directives instructions, Defining each with example L12 Sample programs T1 103 BB Techniques to pass input data to procedures, L13 Sample programs, procedures and R4 4.59 BB Defining a MACRO,Passing parameter to a Macros MACRO Unit II L14 ALP for logical instructions T1, R4 103, 4.87 BB L15 Examples T1, R4 103, 4.87 BB Assembly language programs L16 ALP for Branch and Call instructions T1, R4 103, 4.87 BB L17 involving logical, Branch & Call Examples T1, R4 103, 4.87 BB instructions, sorting, evaluation of L18 arithmetic expressions, string ALP for sorting and arithmetic instructions T1, R4 103, 4.87 BB L19 manipulation Examples T1, R4 103, 4.87 BB L20 ALP for String Instructions T1, R4 103, 4.87 BB L21 Examples T1, R4 103, 4.87 BB Unit III Signal Descriptions of 8086,Minimum Mode L22 Pin diagram of 8086-Minimum mode T1 8,21,23 BB 8086 system and timings and maximum mode of operation, Maximum Mode 8086 system and timings, L23 Timing diagram T1 25 BB HOLD response sequence. Memory interfacing to 8086 (Static L24 Static RAM Interfacing T1, R4 158, 4.80 BB RAM & EPROM) L25 Dynamic RAM Interfacing T1, R4 167, 4.80 BB Internal Architecture of 8257, Register L26 T1 294 BB Organization Need for DMA. DMA data transfer L27 Method, Interfacing with 8237/8257 Signal descriptions, DMA transfer operations T1 298 BB L28 Interfacing 8257 with 8086 T1 303 BB Unit IV L29 Internal Architecture,Pin Diagram, T1 184 BB 8255 PPI – various modes of operation and interfacing to 8086
8255 PPI – various modes of operation Modes of Operation of 8255, Interfacing 8255 L30 and interfacing to 8086 ports with 8086 L31 Interfacing Keyboard, Interfacing with 8086 L32 Displays flow chart for ALP L33 8279 Stepper Motor and actuators Interfacing with 8086 L34 Interfacing ADC0808/0809 D/A and A/D converter interfacing L35 Interfacing DAC0800 Unit V Interrupt structure of 8086,Vector L36 Interrupt Cycle of 8086/8088 interrupt table,Interrupt service Non Maskable Interrupt and Maskable Interrupt L37 routines Introduction to DOS and BIOS L38 Overview interrupts L39 Architecture and signal descriptions of 8259 8259 PIC Architecture and interfacing Interrupt sequence and Command words of 8259 L40 cascading of interrupt controller and L41 its importance operation modes of 8259 L42 Interfacing and programming 8259 Unit VI Serial data transfers,Asynchronous and L42 Methods of Data Communication Synchronous data transfer schemes L43 8251 USART architecture and Architecture and Signal Descriptions of 8251 L44 interfacing 8251 Operation modes L45 TTL to RS 232C and RS232C to TTL Interfacing 8251 with 8086 conversion,Sample program of serial Example Programme L46 data transfer L47 IEEE 488 GPIB Unit VII L48 Architecture Overview of 8051 Micro Controller L49 I/O Ports,Memory Organization
T1
187
BB
T1 T1 T1 T1 T1
190, 196 193 228 212 224
BB BB BB BB BB
T2 T2
138 141
BB BB
T2
249
BB
T2 T2 T2 T2
249 252 256 259
BB BB BB BB
T1
278
BB
T1 T1 T1 T1
278 282 287 287
BB BB BB BB BB
T2 T2
16 28
BB BB
L50 Adressing modes
Register ,Direct and Indirect Addressing modes
T2
36
BB
L51 Instruction set of 8051,
Byte level logical operations,Bit leval logical operations,Rotate and Swap Operations,Arithmetic Operations
T2
153
BB
T2
169
BB
Timer/Counter modes
T2
70
BB
Serial Communication,Multiprocessor Communication
T2
77
L52 Simple Programs Unit VIII L53 Timer/Counter operation in 8051 L54 Serial Communication control in 8051
BB BB
L55
Interrupt structure of 8051
Interrupts,Interrupt Priorities
T2
66
BB
Memory and I/O interfacing of 8051 L56 Memory Addressing T2 32 BB T2 215 L57 Memory and I/O interfacing of 8051 External I/O Interfacing BB TEXT BOOKS T1. Advanced microprocessor and Peripherals - A.K.Ray and K.M.Bhurchandi, TMH, 2000 T2. Micro Controllers – Deshmukh, Tata McGraw Hill Edition. REFERENCES R1. Micro Processors & Interfacing – Douglas U. Hall, 2007. R2. The 8088 and 8086 Micro Processors – PHI, 4th Edition, 2003. R3. Micro Computer System 8086/8088 Family Architecture, Programming and Design - By Liu and GA Gibson, PHI, 2nd Ed. R4. 8085, 8086 Microprocessors and 8051 Microcontrollers Hardware, Applications and Interfacing - R.Latha, S. Sakthivel ( Note:’ P’ indicates Page Number)
