Multirate Digital Redesign of Continuous Time Controllers Based on Closed-loop Performance Yuping Gu and Masayoshi Tomizuka
Department of Mechanical Engineering, University of California at Berkeley, Berkeley, CA 94720-1740
[email protected] [email protected]
Abstract This paper presents a multirate H1 optimal digital redesign of continuous time controllers. It focuses on the performance of the closed loop system under digital control. The resulting approximation criterion is a measure for stability of the control system. The discrete time controller is obtained through minimization of this criterion, which can be performed with standard software used for H1 controller design. A hard disk drive servo example is given to show the proposed digital redesign method. keyword: digital redesign, multirate control, digital control, H1 control
1 Introduction Digital redesign is to obtain a digital controller by discretizing a predesigned analog controller. One of the important advantages of this approach is the wealth of continuous time design methods. Moreover, the sampling period can be selected after the analog control system is designed and, thus, the continuous time closed-loop bandwidth is known. There are many methods available for discretizing continuous time controllers. Standard methods such as bilinear transformation, hold input approximation, and signal invariant transformations, are open loop methods and do not take the closed loop use of the controller into account. Therefore, they do not guarantee stability nor performance. Standard digital redesign methods are simple in terms of calculation, but the redesigned controller may not perform well unless the sampling time is small. Performance may not be acceptable if the sampling time is large for any reason. Problems of the standard digital redesign methods when used for controller design with relatively large sampling time were reported by Katz [1]. Digital redesign of continuous time controllers by utilizing multirate sampling and high order holds [2], [3] and [4] can deal with large sampling periods, but these are also open loop methods.
Early works on redesign based on closed loop considerations include Rattan and Yeh [5] and Rattan [6], but they did not address closed loop stability after controller redesign. Kennedy and Evans [7] proposed a controller redesign method based on pole-zero matching of the complementary sensitivity function. Another digital redesign method is proposed by Keller and Anderson [8] [9] and [10] . The resulting hybrid control system with continuous time plant and discrete time controller is stable, and performance including the intersampling behavior of the system can be optimized by approximating some chosen reference transfer functions of the continuous time control system. In order to obtain a tractable problem, the continuous time part of the hybrid system and the reference transfer function are approximated by a discrete time system with arbitrary fast sampling. After lifting the resulting periodic system, the approximation problem can be formulated as a standard H1 problem which is solved using standard software for H1 controller design. The discrete time approximation is easy to calculate with respect to a relatively small sampling time. In this paper, we extend works in [8] and [3], and investigate multirate H1 optimal digital redesign of continuous time controllers when the measurement sampling time is relatively large. It focuses on the peformance of the closed loop system under digital control.The problem is stated in Section 2 along with all necessary equations for design and analysis. In Section 3, a hard disk drive example is given to show the utilization of the proposed multirate H1 controller based on closed loop performance, and the closed loop characteristics of the discrete time system are examined. Coclusion remarks are given in section 4.
2 Multirate H1 Optimal Controller 2.1 Problem Formulation
Let Gp (s) denote the plant transfer function, Gc (s) the known continuous time controller, and T (s) = Gp Gc (I + Gp Gc )?1 the continuous time closed loop transfer function which is stable. We consider a digital control system
as con gured in the lower portion of Fig. 1. Assume that the measurement sampling period Ty has been speci ed and it is relatively large. The input and output of the multirate controller Gcd(z ) are updated every Ty and Tu = TNy , respectively. N is a positive integer. Fa (s) is an anti-aliasing lter. HTu (s) and HTy (s) are zero order holds which hold discrete time sequences over Tu and Ty respectively. W (s) is a rational, stable and strictly proper transfer function shaping the reference signal.
Figure 1: Representation of JT w(t) is the reference input and e(t) represents the approximation error of the continuous time closed loop response by the digital control system. Ideally, we would like the approximation error e to be zero no matter what w is, but that is not possible. Thus, we would like e to be as small as possible by proper choice of Gcd (z ). With a stabilizing discrete time compensator, this model reference structure from w to e, is de ning an operator JT that maps L2 signals to L2 signals. It is a bounded operator, depends on Gcd(z ), and it is periodically time variant. The norm of JT measures the quality of digital redesign of Gc (s) by Gcd (z ), and we want to minimize the norm of JT to get the best possible approximation.
2.2 Approximation of JT and Transformation into an H1 Problem
The problem to evaluate the norm of JT is identical in mathematical structure to a sampled data H1 problem [11] [12] [13] [8].
Figure 2: Representation of JTd Similar to [8], we convert a mixed continuous discrete problem to a multirate problem rst. Figure 2 shows the main idea. A hold and sampler are introduced at the input and output of JT with sampling period Tf = Tu , where L is an integer. When L is suciently large, L not surprisingly JT and JTd will have the same gain, or virtually the same gain. Then if we want to minimize the norm of JT , we may as well minimize the norm of JTd . JTd is a multirate system, thus we replace the
mixed continuous discrete time problem by a multirate problem.
Figure 3: Redrawing of JTd Redrawing Fig. 2, the input/output diagram is shown in Fig. 3. In Fig. 3, the zero order holds and samplers with a sampling period Tf correspond to the fastest sampling period in the present problem formulation. We use the ff ff ff ff symbols xff k , wk , uk , ek , yk to denote the sequences in the fastest system. We use the letters A, B1 , B2 and etc to reperent the state space matrices, i.e. the fastest discrete time LTI system has a realization 2
3
2 3 2 ff 3 xff xk A B B 1 2 k +1 6 ff 7 ff 5 = 4 C1 D11 D12 5 4 wk 5 4 ek ff ff C2 D21 D22 uk yk
(1)
Assume that the control loop is to be implemented at the same rate as the measurement sampling rate Ty . Ty is related to Tu and Tf by Ty = N T u = N L T f where N and L are integers. h and m are indexes for di erent sequences, and are related to the continuous time by hTy and mTu , respecff , uf = uff , and tively. Therefore, yhs = yNLh m Lm ff s yNLh+j = yh for j = 0; 1; :::; NL ? 1 f uff Lm+p = um for p = 0; 1; :::; L ? 1 The system shown in Fig. 3 is multirate, which makes it dicult to apply standard discrete time controller algorithms. Group the fast signals appropriately into slow signals, and de ne 2 6
whs = 664
ff wNLh ff wNLh+1
.. .
ff wNLh +NL?1
3 7 7 7 5
eff NLh
2
3
eff NLh+1
6
esh = 664
.. .
eff NLh+NL?1 ufLh ufLh+1
2 6
ush = 664
Note that the solutions of the slow system retain all of the fast input and error information, while restricting the measurement and control input to occur at a slow rate. In the lifted slow rate system, everything is known except Gcd(z ). Determination of Gcd (z ) to minimize the gain kJTd k1 is a standard H1 problem. The order of the digital controller depends on that of the systems in Eqs.(1) and (2), which correspond to the blocked system shown in Fig. 3. The order of Gcd (z ) in Fig. 3 is signi cantly higher than that of Gc (s), and model reduction must be performed to reduce the order of the digital controller for implementation.
.. .
7 7 7 5
3
ufLh+L?1
7 7 7 5
3 Design Example
Using the state description of the fastest system, derive a realization for the slow system, which maps ws and us into es and ys at the slow rate. 2 4
3
3 2
2
3
xsh+1 xsh As Bs1 Bs2 esh 5 = 4 Cs1 Ds11 Ds12 5 4 whs 5 yhs ush Cs2 Ds21 Ds22
(2)
where
3.1 Description of Hard Disk Drive Servo System
The Hard Disk Drive (HDD) servo system is modeled to a reasonable degree of accuracy as a double integrator with structural resonances. The actuator with time delay, Td, and resonance mode has a continuous time description as follows:
As = ANL
Bs1 = ANL?1B1 ANL?2 B1 B1 Bs2 =
2 wres Gp (s) = Ksact w 2 s2 + res s + w2 Fd (s) Qres
hP
i=N ANL?i B Pi=N AN ?i B 2 2 i=1 i=1 2
Cs1 =
6 6 6 4
2
.. .
C1 ANL?1
7 7 7 5
;
Cs2 = C2
D11 .. .
...
C1 ANL?2B1 C1 ANL?3 B1 D11
Ds12 =
6 6 6 4
Pi=N
i=1
X=
iX =N i=1
7 7 7 5
.. .
. . . .. .
C1 ANL?i?1 B2 X
Ds21 = D21 0 0 ; Ds22 = D22 0 0
Design process of LQG/LTR through output recovery involves two basic steps: 1)generate a target feedback loop, TFL, with a proper selection of an estimator; 2) recover the TFL through a feedback gain matrix. Let [A,B,C] be a state space representation of the plant. The ctitious Kalman lter formulation is used to obtain a suitable target feedback loop (TFL) GKF (s): where
7 7 7 5
H = 1 MC T
AM + MAT ? 1 MC T CM + BB T = 0
C1 AN ?i?1 B2 + D12
where Kact = 1:507 104track=(s2 Amp), Qres = 5, wres = 2(3400)rad=sec, and Fd (s) is the pade approximation of the time delay term with Td = 40s for our simulated hard disk drive servo system model.
GKF (s) = C (sI ? A)?1 H
3
D12 C1 B2 + D12
(3)
3.2 LQG/LTR Optimization in Continuous Time Domain 3
.. .
2
3
D11 C1 B1
6
Ds11 = 664
C1 C1 A
i
res
(4) (5) (6)
is chosen to place the TFL cross-over frequency; smaller corresponds to higher cross-over frequency. The loop transfer recovery (LTR) is achieved through a cheap LQ formulation, such that the product of an LQG based compensator Gc (s) and the plant Gp (s) will
approach (recover) the TFL, GKF (s), as ! 0. Gc (s) is given by
Gc (s) = K (sI ? A + HC + BK )?1 H
3.3 Simulation Results
Using the simulated HDD servo system described in section 3.1, we design a continuous time controller Gc (s) by LQG/LTR method. in Eq.(5) is set 4 10?7 and in Eq.(7) 8 10?13. Gc (s) can be described by 5 104) Gc (s) = (s +(s 5+:2931 104 ) 2 258 103s + 4:5652 108) ((ss2 ++14::9226 104s + 1:1822 109) (s + 1:153 103) (s2 + 5:7126 104s + 12:3237 108)
Assume that the measurement sampling time is T = 134:4s, we tune the design parameters such that the single rate system, where the discrete time controller is obtained by bilinear transformation, meets the design speci cations. The order of the Tustin digital controller is 7 for our model. Choosing W (s) = s+20::3115 104 and L = 4, we redesign the same continuous time controller by H1 optimal method proposed in [8] and multirate H1 optimal method described in section 2 for multirate ratio N = 2. The order of the digital controllers obtained by these methods is 17 for our model, model reduction will have to be performed to make the controller implementable. The order of digital controllers for HDDs is typically ve to six. Table 1 shows the Gain Margin (GM), Phase Margin (PM) and Gain Crossover Frequency (GCF) of the continuous time system, single and multirate systems. From Table 1, we can see that H1 and multirate control are useful for improving phase and gain margins and recovering the performance of the original continuous time system. Figure 4 shows the open loop frequency response of original continuous time system, single and multirate control systems. From Fig. 4, we can see that multirate H1 controller introduces less phase shifts than the
PM
13.65 3.59 8.79 9.73
46.39 36.68 63.49 66.51
GCF
404.55 405.58 408.19 408.19
GM:db, PM:degree, GCF:Hz
(8)
Open Loop 60 40
Gain [dB]
In practice, full recovery is not necessary or warranted. Partial recovery above the open loop cross-over frequency is sucient and the LQG compensator will provide further roll o at high frequencies, which is advantageous in the presence of measurement noise.
GM
Table 1: Open loop Margins and Gain Crossover Frequency
20 0 -20 -40 -60 1 10
10 2
10
3
4
10
Frequency [Hz] 0
Phase [deg]
AT N + NA ? 1 NBB T N + C T C = 0
(7)
-100 -200 -300 CT
-400
DT(Tustin) DT(H
-500 -600 10
∞)
Multirate H
N=2
∞
1
10
3
2
10
4
10
Frequency [Hz]
Figure 4: Open Loop Frequency Response Tustin discrete time controller, even though the Tustin discrete time controller approaches the continuous time controller closely. Closed Loop 10 0
Gain [dB]
K = 1 B T N
-10 -20 -30 -40 -50 -60 1 10
10
2
10
3
4
10
Frequency [Hz] 100
Phase [deg]
where
Controller CT DT (N = 1) DT (H1 ) Multirate H1 (N = 2)
0 -100 -200 -300 -400 -500 1 10
CT DT(Tustin) DT(H
∞
) Multirate H
N=2
∞
10
2
10
3
4
10
Frequency [Hz]
Figure 5: Closed Loop Frequency Response Figure 5 is the closed loop frequency response of the continuous time system, the single and multirate control systems. From Fig. 5, we can see that the closed loop gain and phase of the multirate H1 optimal controller exhibit larger gains and smaller phase shifts than those of the Tustin controller, especially at high frequencies. Figure 6 is the sensitivity function for the continuous time system, the single and multirate control systems.
A hard disk drive example showed that H1 and multirate control improve the phase and gain margins. Step responses showed that the step response under multirate H1 control with N = 2 had no overshoot and small settling time.
Sensitivity Function 10
Gain [dB]
0 -10 -20 -30 -40 -50 -60 1 10
10
2
10
4
3
10
References
Frequency [Hz] 200
Phase [deg]
150 100 50 CT
0
DT(Tustin) DT(H
-50 -100 10
∞
)
Multirate H
∞
1
10
N=2 3
2
10
10
4
Frequency [Hz]
Figure 6: Sensitivity Function From Fig. 6, we can see that multirate H1 controller has larger gain and phase shift than that of Tustin controller at low frequencies, but it has smaller gain and phase shift than that of Tustin controller at high frequencies. 1.8
1.6
step response
1.4
1.2
1
0.8
0.6 CT
0.4
DT(Tustin) DT(H
0.2
0
0
∞)
Multirate H
0.005
0.01
0.015
0.02
0.025
0.03
N=2
∞
0.035
0.04
time(sec)
Figure 7: Step Response Figures 7 is the step response of the HDD servo system with contiuous time controller, single rate controller obtained by bilinear transformation, single and multirate H1 controllers. From Fig. 7, we can see that the single rate system with Tustin controller exhibits a larger overshoot than that of the continuous time system, and oscillates before converging to the steady state value. Single rate system with H1 controller is free from overshoot, but the settling time becomes long. Under multirate H1 control with N = 2, the response is fast with no overshoot and small settling time.
4 Conclusion In this paper, we studied the multirate H1 optimal digital redesign of the continuous time controller based on closed loop performance. The discrete time controller is obtained through minimization of H1 norm of the lifted system. The stability of the hybrid system is guaranted.
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