Neurons in Polymer: Hardware Neural Units Based on ... - IEEE Xplore

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 61, NO. 10, OCTOBER 2014

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Neurons in Polymer: Hardware Neural Units Based on Polymer Memristive Devices and Polymer Transistors Robert A. Nawrocki, Member, IEEE, Richard M. Voyles, Senior Member, IEEE, and Sean E. Shaheen, Member, IEEE

Abstract— We present here incremental steps toward realizing a tangible polymer neuromorphic architecture in the form of McCulloch–Pitts (nonspiking) neurons made from polymer electronics components, namely, memristive read-only-memory devices, transistors, and resistors. In the implementation, the polymer memristive devices perform the equivalent of synaptic weighting, while a polymer resistor subcircuit performs the equivalent of somatic summing. The sum is sent to a single transistor to apply the activation function. The complete circuit approximates the function of a single neural unit, which would form the basis for a hardware artificial neural network. It is shown here that a single, two-input unit, fit with three memristive devices per input, can perform continuous value classification applied to an active tether application, with a maximum error of 5%. Index Terms— Artificial synapse, hardware neural network, memristive device, neuromorphic engineering, polymer electronics.

I. I NTRODUCTION

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EUROMORPHIC engineering, a phrase termed by Carver Mead in 1990 [1], aims to apply biologically inspired principles to develop neural systems with applications, such as machine learning, machine perception, and autonomous robotics. Neuromorphic architecture aims to mimic biological information processing by utilizing distributed processing, adaptive learning, and neural functioning of individual computation units. From a practical standpoint, the motivations to pursue such biologically inspired parallel architectures include reduced power consumption per computation and inherent fault-tolerant operation [2]. However, the loftier goal of true hardware-based, generic, bottom-up artificial intelligence provides broader inspiration [3].

Manuscript received February 25, 2014; accepted August 6, 2014. Date of publication August 29, 2014; date of current version September 18, 2014. This work was supported in part by the National Science Foundation (NSF) under Grant DMR-1006930, Grant OISE-1053249, and Grant IIS-0923518, in part by the NSF Safety, Security, Rescue Research Center, and in part by the National Nanotechnology Infrastructure Network under Grant ECS-0335765. The review of this paper was arranged by Editor I. Kymissis. R. A. Nawrocki and S. E. Shaheen are with the Department of Electrical, Computer, and Energy Engineering, University of Colorado at Boulder, Boulder, CO 80309 USA (e-mail: [email protected]; [email protected]). R. M. Voyles is with the College of Technology, Purdue University, West Lafayette, IN 47907 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2014.2346700

Much of the current research in neuromorphic circuitry aims at increasingly realistic approximations of spiking biological neuron behavior. The primary goal of these spiking neuron investigations, typically implemented with silicon transistors, is to more accurately model and understand large-scale biological networks as well as brain–machine interfaces [4], [5]. As a result, these implementations typically require a minimum of a few tens of transistors to realize the somatic functionality, with additional components needed for synaptic approximation [5]. By contrast, this paper aimed at more generic computation, which is inherently robust and readily embedded in miniature systems. Hence, the focus on the nonspiking McCulloch–Pitts model of biological neural networks [6]. Despite the simplicity of this model, such neurons are capable of realizing a wide variety of complex functionality, including Boolean logic, provided an appropriate nonlinear activation function is used. In addition, this simplicity allows the use of a single transistor for somatic function and therefore, lends itself favorably to large-scale hardware implementations with a multitude of applications. A recently proposed approach to neuromorphic circuitry employs memristive devices to compactly produce the linear input-weighting behavior of McCulloch–Pitts neurons. The memristor is a two-terminal, passive device considered to be the fourth fundamental electrical element alongside the resistor, capacitor, and inductor [7], [8]. Theoretically, the memristor relates flux to charge, but practically it behaves like a variable resistor with a nonvolatile memory that retains its last value. For the sake of nomenclature, we note that there is some disagreement in the literature on what properly constitutes a memristor [9], [10]. Most two-terminal devices fabricated to-date, both from inorganic and organic materials, are bistable resistors rather than continuously variable devices. For clarity, we refer to these bistable devices, including our own, as memristive devices [11] rather than memristors. Likharev et al. [12] were one of the first to recognize the value of the memristor to neuromorphic circuitry and incorporated it into what they termed CMOL architecture. This paper presented here was inspired by CMOL, a neuromorphic CMOS/nanowire/molecular-nanodevice model that attempted to combine the advantages of current low-power, high-density CMOS technology with the potentially high area-density of two-terminal memory nanodevices [13]. This ambitious hybrid

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architecture is yet to be realized due to the fabrication challenges presented by such a multimaterial, multitechnology approach [14], [15]. Other proposed memristive neuromorphic architectures only concentrate on a single aspect of neural functionality, such as a synapse [16]. The circuit realized here extends and simplifies the CMOL proposal by focusing on the unified fabrication realm of organic electronics. The focus on organic electronics is a key aspect of the approach taken here. Essentially all of the proposed or implemented neuromorphic circuits to date have relied on conventional, inorganic electronic components [5], [17], [18]. Manufacturing of inorganic electronics requires clean environments and vacuum deposition processes that lead to highproduction costs. In contrast, and as a key motivation for this paper, organic (polymer) electronics can be manufactured using low cost, roll-to-roll atmospheric processing methods, such as inkjet printing, blade-coating, and lamination [19]. Furthermore, their low process temperatures make them amenable to fabrication on a wide range of materials, including physically flexible substrates. With the motivation of developing neuromorphic circuitry that takes advantage of the attractive features of organic electronic materials, we have proposed a low complexity, static (i.e., no learning) neuromorphic architecture, inspired by the McCulloch–Pitts model of an artificial neuron. It is based on a novel, single organic field-effect transistor (OFET) neuronal circuit that uses an organic memristive device to realize the programmable weighting (multiplicative) property of a synapse [20]. Having previously demonstrated the feasibility of this circuit model via simulation and emulation, this paper demonstrates a significant step toward full hardware realization of a tangible polymer McCulloch–Pitts neuron created with polymer memristive devices, polymer resistors, and a single polymer transistor. It is shown that the activation function of the neuron approximates that of the sigmoidal function commonly used in multilayer perceptrons. Even though the behavior of the neuron deviates from a standard neuron, namely in that the saturating output is proportional to the number of inputs and synaptic states, it is demonstrated that a single neuron is capable of performing elementary analog classification. The neuron was formed from individual organic electronics elements fabricated on separate substrates, which were subsequently connected together via external wiring according to the neural circuit design. II. D ESIGN OF A P OLYMER N EURON We have developed a simple, single-transistor, singlememristive-device-per-input circuit, shown in Fig. 1, which produces a suitable approximation to neural synapses and the soma [20], while exhibiting significant immunity to low yield during device fabrication. The circuit nominally produces a linear behavior, but it is shown later that a nonlinear behavior can be achieved, as well. The McCulloch–Pitts neuron capabilities, we are trying to capture are codified in the algorithmic expression (1) V wi VOUT = ϕ INi

Fig. 1. Schematic view of a single neuron with two inputs, denoted by VIN1 and VIN2 , and one output, marked VOUT . Organic memristive devices, RMEM1 and RMEM2 , provide the synaptic weights, while an OFET provides the sigmoidal activation.

where ϕ is the activation function. It has been shown that linear activation functions have limited usefulness [6], hence nonlinear activation is the ultimate goal. A. Synapse In biological neurons, the synapse provides both the multiplicative weighting capability and ability to store programmable weights, wi . The circuit in Fig. 1 achieves multiplicative weighting with voltage dividers formed by RMEMi and RBASE , and achieves programmable weights by instantiating RMEMi with bistable memristive devices. In Fig. 1, RMEMi corresponds to wi in (1). In its most basic form, a bistable memristive device can be thought of as a two-terminal memory element modeled with two resistors (high and low) and a switch [21]. Initially, it is in the OFF-state represented by the high resistance, ROFF . The switch is flipped into the ON-state by applying a high-positive voltage to the device in excess of the positive threshold (the positive programming voltage). Likewise, the switch is flipped back into the OFF-state by applying a negative voltage in excess of the negative threshold (the negative programming voltage). The use of memristive device affords the synaptic functionality at much lower cost and occupied space compared with other proposed designs that typically requite tens of transistors [5]. A bistable memristive device that exhibits the ability to repeatedly switch between ON- and OFF-states is analogous to a random access memory (RAM) and will be referred to here as memristive RAM (M-RAM). One of the novelties of this paper is in the fabrication of memristive devices realized from organic materials, which are referred to as organic memristiveRAM (OM-RAM), to function as organic synapses. There also exists a subset of OM devices, where the change of state is irreversible. As such, this device is analogous to a programmable read-only memory (PROM), and will be referred to it as an organic memristive-PROM (OM-PROM) device. Fig. 2 shows the I –V relationship of an OM-PROM device created in our laboratory. It can be seen that the device is in an OFF-state, with a near-linear resistance, until a threshold voltage is reached (in this case ∼9.75 V). Once the device turns ON, the state is permanently retained. The value of the

NAWROCKI et al.: NEURONS IN POLYMER

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Fig. 3. Family of I –V characteristics curves of a p-channel OFET. Inset: architecture of the top-gate and bottom-contact architecture. Fig. 2. I –V characteristics of an OM-PROM, with device architecture shown in the inset. Shaded area indicates device operating region.

threshold voltage, of either OM-RAM or OM-PROM, dictates the boundary between the operating region and programming region. During programming, the applied voltage needs to exceed the appropriate threshold voltage to affect the storage of a desired value. Likewise, during operation, the applied inputs must not exceed the synaptic threshold voltages, otherwise synapse weights will unpredictably change. The relatively low-threshold voltage of OM-RAM devices, and a much higher threshold of OM-PROM devices, coupled with the fact that the static circuit does not require dynamically changing synapses (except for initial weight setting, Section II-D learning versus programming), OM-PROM was chosen to utilize synapses. For the OM-PROM devices fabricated, typical values for RON and ROFF are 50 and 1.2 k, respectively. Coupled with an RBASE of 25 , the binary synaptic weights can be either 0.33 or 0.02. An OM-PROMs value, or state, can be electrically programmed (analogous to modifying the value of connection weight during the neural network training) with minimal additional circuitry. Only a programming voltage beyond the threshold voltage is needed and the ability to route it appropriately. It is this input weighting capability and electrical programmability that make such a memristive device a natural choice to realize the functionality of a polymer synapse. However, it should also be noted that biological synapses can be either excitatory (analogous to positive connection weights) or inhibitory (negative connection weights). The use of a memristive device as an artificial synapse only allows for positive connection weights.

in the figure) according to the formula VINi RMEMi RBASE VX = RBASE 1+ RMEMi

(2)

where RMEMi is the programmed resistance value setting the synaptic weight, wi , on the i th input, VINi . Intuitively, setting a programmed resistance RMEMi to a maximum value of infinity (equivalent to connection weight set to zero), results in minimal effect of input voltage VINi . Setting RMEMi to a minimal value of a few Ohms (connection weight set to 1) allows for most of the current to pass through. Replacing 1/RMEM with conductance G MEM , and with the condition RBASE RMEM , reveals (2) to have the same form as (1) in the ideal case. Equation (2) ignores the impedance of the OFET in Fig. 1, assuming it is large compared with RBASE . The activation function that maps V X to VOUT requires deeper consideration and will be addressed in Section II-C. It is well-known that a nonlinear activation function is necessary for complex, nonlinear classification in a multilayer perceptron [6]. A sigmoidal activation function is a popular choice, and we manipulate the characteristic I –V curve of the OFET, shown in Fig. 3, to approximate such a function. Fig. 3 portrays the I –V relationship of a p-channel OFET that forms the basis of the somatic functionality for various values of VG . Careful selection of both the OFET device fabrication parameters and VG provides tantalizingly close approximations of sigmoidal behavior of the artificial neuron with a very simple circuit. The simplicity and robustness of the circuit is important to achieve large-scale (multineuron) networks with meaningful behavior despite the relatively low yields that may typify organic electronics at this time.

B. Soma

C. Single Neuron Operation and Activation

The biological soma performs two functions: 1) summation of the arbitrary number of inputs and 2) mapping of the summed-input signal to the bounded output signal through the activation function. The circuit in Fig. 1 sums the N scaled input values at the intermediate point labeled V X (with N = 2

While Fig. 3 holds the key to the output behavior of the neuronal circuit, it does not tell the entire story. The circuit of Fig. 1 is essentially a linear amplifier configuration, but by balancing the linear and saturation regions of the OFET, a valuable approximation to the sigmoid can be achieved.

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D. Learning Versus Programming At present the circuit does not incorporate any training functionalities. Instead, determining the desired configuration of weights is conducted off-line, in software, where the activation function and quantization level of the connection weights are customized to reflect the electrical characteristics of the elements used. For this paper, emergent neural network simulation system [22] and MATLAB neural network [23] were used as the training software. The connection weights were then manually exported by selective programming (turning to an ON-state) the appropriate memristive synapses. Such a procedure is only capable of performing a static (single-trained) classification. Fig. 4. Activation function of a two-input (VIN1 and VIN2 in Fig. 1) polymer neuron, with each input assigned binary weighting.

Fig. 3 suggests that to achieve sigmoidal behavior in the artificial soma, large negative values of VG are beneficial. However, for very large values of VG , within relatively lowinput value (V X ), the OFET only operates in the linear regime, and the circuit acts like a linear amplifier with no sensitivity to individual OFET parameters. Indeed, this has been verified experimentally: at large VG , increasing the number of neuronal inputs only increases the near-linear slope of the function. When VG is small, the OFET reaches saturation regime for much lower input values (V X ), and the circuit achieves the flattening or saturating effect, which is the basis of the sigmoidal behavior of the neural circuit. This trend is shown in Fig. 4. It demonstrates the activation (transfer) function of a single polymer neuron, constructed with two inputs with binary connection weights (a single memristive device per input), and a single output, connected according to Fig. 1. The inputs were tied together to demonstrate the summing effect of the neuron.1 The neuron was made with all organic electronic components described in Section II-D. Ideally, the transfer function of a neuron with a synapse in OFF-state (equivalent to being equal to 0) would be zero. However, it can be seen that the output of the polymer neuron is small, but nonzero. This is due to the fact that the OFF synapse RMEMi has a noninfinite resistance, resulting in a small, but nonzero current. In addition, it is important to note that in a standard perceptron the activation function boundary is fixed (usually between ±1) and the synaptic states only affect the slope of the function. In the neuron presented here the output’s leveling OFF is proportional to the number of inputs used as well as the synaptic states. For instance in Fig. 4 the output levels off at ∼−0.7 and 1.0 V, when only one synapse is in ON-state, but flattens ∼−1.0 and 1.5 V with both synapses turned ON. As such, the activation function of the polymer neuron presented here is not truly sigmoidal, but rather more akin to a nonlinear amplifier. However, as illustrated in Section II-D, the neuron is nonetheless able to perform useful function approximation in real-life applications. 1 Due to irreversibility of memristive switching of the OM-PROM, a set of identical devices was used when measuring the transfer curve shown in Fig. 4.

III. D EVICE FABRICATION This section describes the fabricating processes of individual devices required to create the polymer neuron presented here. A. Polymer Memristive Device as a Synapse The OM-PROM used in this paper was created according to the following fabrication procedure [24]. The bottom electrode was formed from a thin film of indium tin oxide (ITO). A holeblocking layer of zinc oxide (ZnO) film was deposited on top of ITO to force the electrons to only flow in one direction, from the bottom electrode to the top electrode. The memristive switching of the OM-PROM occurs in a film of conductive poly(3, 4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) 4083 that undergoes a chemical change when a voltage bias of a sufficient value is applied. To separate the highly acidic PEDOT:PSS from ZnO, an ultrathin film of poly(methyl methacrylate) was inserted. The top electrode was formed from thermally evaporated silver, through a shadow mask, to form a cross bar with the bottom electrode. The inset of Fig. 2 shows the OM-PROM device architecture. We attribute the fundamental memristive switching behavior of this OM-PROM device to the changes of the doping level of the PEDOT:PSS layer, as described as the underlying mechanism for electrical switching in [25] and [26]. B. Polymer Transistor as Soma The choice of the OFET architecture was based on simplicity and ease of processing. Fig. 3 shows the I –V characteristics of the top-gate, bottom-electrode OFETs, inspired by [27], with the architecture outlined in the inset of the figure. The drain and source electrodes, obtained from thermally evaporated gold on glass substrate, were patterned using a conventional photolithographic technique to achieve a channel length of 5 μm. The choice for the semiconductor was poly(3, 3-dialkyl-quaterthiophene) (PQT-12), while poly(4-vinyl phenol) was used as the dielectric material. Both of the polymeric layers were deposited via either spin or blade coating that allows for extremely thin and uniform layers of ∼30 and 400 nm, respectively. The gate electrode was formed from a thin film of silver that was thermally evaporated through a shadow mask.


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TABLE I S INGLE P OLYMER N EURON T RAINED TO P ERFORM THE B INARY C LASSIFICATION A SSOCIATED W ITH A CTIVE T ETHER E XPERIMENT

Fig. 5. Pictorial representation of two shapes (shape b and d in Table I) used for active tether classification.

C. Polymer Resistor A polymer resistor was created utilizing the electrical properties of PEDOT:PSS. Polymer resistors (RBASE and ROUT in Fig. 1) were created by depositing a thin film of high connectivity PEDOT:PSS PH500, via spin coating method, between two silver metal electrodes. The resistance of such a device can be modified by varying the separation of the electrodes, as well as the width and thickness of the conductive strip. IV. S INGLE N EURON FOR PATTERN R ECOGNITION To elucidate the effectiveness of the polymer neuron to perform pattern classification, a simple real world example was chosen, where the shape of an active tether dictates the direction of a propulsive impulse imparted to a robot or other device [28]. It was previously demonstrated, via simulation and emulation, that a network of such neurons (four input neurons, four hidden neurons, and one output neuron) is capable of accurately correlating the input/output relationship [29]. In this paper, it is demonstrated that a single polymer neuron is capable of such a classification. The active tether experiment was repeated, but with only a single neuron performing the classification. The neuron was fit with two inputs, whereas each synapse contained three (n) OM-PROMs, each with different resistances, allowing for eight (2n ) possible synaptic states. While the previously demonstrated simulated and emulated networks consisted of a larger number of input and output neuron, as well as a larger number of classified shapes, the single neuron was used to classify a small subset of shapes. Table I shows measured output voltages of a single polymer neuron performing the same classification, with two representative shapes shown in Fig. 5. The θactual is the observed tether output, while θpolymer represent the tangible polymer neuron output. The full-scale error was computed assuming the maximum output value of ±50°. The maximum error of the polymer neuron was recorded as 5% with the average error computed as 2.6%. V. D ISCUSSION

the maximum output in the range of −1.0 to +1.5 V, which would prohibit cascading the neurons to form a neural network. When constructing a network of such neurons, the impedance mismatch and the lack of cascading ability would require introduction of a voltage follower between adjacent neurons. As a secondary approach to improving the performance of the OFET, we are currently concentrating efforts on increasing the resistance of the OM-PROMs to a level compatible with the transistor. This method, already verified in simulation, should enable alleviating the present impedance mismatch. A fall-back strategy has been investigated (via simulation) to change the architecture in the event of not being able to produce components with comparable impedances. The improved electrical characteristics of individual elements, would allow introduction of only a single polymer transistor, between two adjacent neurons, providing satisfactory signal amplification. This would have the effect of altering the single-transistor polymer neuron, to a two-transistor polymer neuron. B. Device Yield In digital logic circuits a single faulty transistor can result in catastrophic failure of the entire logic operation. Furthermore, all of the transistors need to have nearly the same electrical characteristics [30]. Organic electronics can suffer from variability between nominally identically prepared devices, especially when fabricated at small, laboratory-scale [31], [32]. One of the strengths of neuromorphic circuitry stems from its resilience against such variability; misfiring or removal of a group of neurons will not result in catastrophic failure but only in performance degradation [33], [34]. Here, over four hundred OM-PROMs were fabricated. Their yield was >95%, while the variability in the device ON-current was ∼8%. The yield of roughly two hundred fabricated and characterized OFETs was >98%, while the variability in carrier mobility was ∼23%. This would have the effect of altering the desired output. However, industrial scale fabrication with much better control over material purity, process parameters, and particulate levels can be expected to greatly diminish device-to-device variability.

A. Polymer Neuron Parameters We note that at present there is a technical limitation with this approach, with the characteristics of the utilized elements, there is a significant input/output impedance mismatch. In addition, the input/output transfer function allows

VI. C ONCLUSION We have demonstrated the functionality of a single McCulloch–Pitts polymer neuron made from all polymer components, namely, a polymer memristive device, polymer

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transistor, and polymer resistors. It is shown that the activation function of the neuron resembles that of a sigmoidal function commonly used with artificial neural networks. The utility of the neuron is demonstrated by showing that it is capable of performing linear classifications of a real world problem. Several aspects of the neural circuit necessitate future improvement. At present, it does not incorporate dynamic learning, and the connection weights have to be imported manually. Implementing some form of learning would require redesign of the circuit to enable error backpropagation with the application of training data. As a technical issue, the impedance mismatch of the devices used prohibits cascading multiple neurons into a network. However, we note recent progress in the fabrication of polymer transistors has been made, both in our group and others [31], resulting in significantly improving their characteristics toward the required output voltage. Finally, all of the devices in the circuit were made on separate substrates that were then connected together. Process development to integrate these devices onto a monolithic substrate is underway. We believe that, albeit elementary, this is the first demonstration of neuromorphic pattern recognition based entirely on noninorganic hardware components that utilize polymer memristive devices for synaptic weighting functionality. The field of neuromorphic, being still in its infancy, offers many advantages, such as low-power-per-computation, distributed computing, inherent fault-tolerant operation, and generic artificial intelligence. The use of organic materials can accomplish this in technologically-accessible ways that allow low cost, rapid prototyping, and production. The use of organic elements also allows for the possibility of creating physically flexible neuromorphic systems, using inexpensive manufacturing, such as printing or laminating, as well as a future integration with soft materials or bio-integrated applications. ACKNOWLEDGMENT The authors would like to thank E. M. Galiger, J. Huff, Y. Cui, X. Yang, T. Nava, A. Hajjam, R. Whitman, G. Edelstein, and J. Buckley at University of Denver, Denver, CO, USA; Z. Marks, T.-M. Oo, J. V. Zeghbroeck, J. Friedlein, and R. R. McLeod at the University of Colorado at Boulder, Boulder, CO, USA; A. M. Nardes at the National Renewable Energy Laboratory, Golden, CO, USA; M. Chabinyc at the University of California at Santa Barbara, Santa Barbara, CA, USA; and H.-W. Tung and G. Indiveri at Institute of Neuroinformatics, University of Zurich and ETH Zurich, Switzerland. R EFERENCES [1] C. Mead, “Neuromorphic electronic systems,” Proc. IEEE, vol. 78, no. 10, pp. 1629–1636, Oct. 1990. [2] P. A. Merolla et al., “A million spiking-neuron integrated circuit with a scalable communication network and interface,” Science, vol. 345, no. 6197, pp. 668–673, 2014. [3] D. Fox, Brain-Like Chip May Solve Computers’ Big Problem: Energy, Discover Magazine, Waukesha, WI, USA, Oct. 2009. [Online]. Available: http://discovermagazine.com/2009/oct/06-brain-like-chipmay-solve-computers-big-problem-energy [4] D. Kuzum, R. G. D. Jeyasingh, S. Yu, and H.-S. P. Wong, “Low-energy robust neuromorphic computation using synaptic devices,” IEEE Trans. Electron Devices, vol. 59, no. 12, pp. 3489–3494, Dec. 2012.

[5] G. Indiveri et al., “Neuromorphic silicon neuron circuits,” Frontiers Neurosci., vol. 5, p. 73, May 2011. [6] S. Haykin, Neural Networks: A Comprehensive Foundation. Upper Saddle River, NJ, USA: Pearson Education, 1998. [7] L. O. Chua, “Memristor-the missing circuit element,” IEEE Trans. Circuit Theory, vol. 18, no. 5, pp. 507–519, Sep. 1971. [8] D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, “The missing memristor found,” Nature, vol. 453, no. 7191, pp. 80–83, May 2008. [9] P. Marks, (2012) Online Spat Over Who Joins Memristor Club. [Online]. Available: http://www.newscientist.com/article/mg21328535.200-onlinespat-over-who-joins-memristor-club.html [10] P. Meuffels and R. Soni, (2012) Fundamental Issues and Problems in the Realization of Memristors. [Online]. Available: http://arxiv.org/abs/1207.7319 [11] A. Mehonic et al., “Resistive switching in silicon suboxide films,” J. Appl. Phys., vol. 111, no. 7, pp. 074507-1–074507-9, 2012. [12] K. Likharev, A. Mayr, I. Muckra, and O. Türel, “CrossNets: Highperformance neuromorphic architectures for CMOL circuits,” Ann. New York Acad. Sci., vol. 1006, pp. 146–163, Dec. 2003. [13] X. Ma, D. B. Strukov, J. H. Lee, and K. K. Likharev, “Afterlife for silicon: CMOL circuit architectures,” in Proc. 5th IEEE Conf. Nanotechnol., vol. 1. Jul. 2005, pp. 175–178. [14] W. Hui, H. Li, and R. E. Pino, “Memristor-based synapse design and training scheme for neuromorphic computing architecture,” in Proc. Int. Joint Conf. Neural Netw. (IJCNN), Jun. 2012, pp. 1–5. [15] T. Serrano-Gotarredona, T. Masquelier, T. Prodromakis, G. Indiveri, and B. Linares-Barranco, “STDP and STDP variations with memristors for spiking neuromorphic learning systems,” Frontiers Neurosci., vol. 7, no. 2, Feb. 2013 [16] V. Erokhin, G. D. Howard, and A. Adamatzky, “Organic memristor devices for logic elements with memory,” Int. J. Bifurcation Chaos, vol. 22, no. 11, p. 1250283, Nov. 2012. [17] J. V. Arthur and K. Boahen, “Silicon-neuron design: A dynamical systems approach,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 58, no. 5, pp. 1034–1043, May 2011. [18] T. Sharp, F. Galluppi, A. Rast, and S. Furber, “Power-efficient simulation of detailed cortical microcircuits on SpiNNaker,” J. Neurosci. Methods, vol. 210, no. 1, pp. 110–118, Sep. 2012. [19] F. So, Organic Electronics: Materials, Processing, Devices and Applications. Boca Raton, FL, USA: CRC Press, 2010. [20] R. A. Nawrocki, S. E. Shaheen, and R. M. Voyles, “A neuromorphic architecture from single transistor neurons with organic bistable devices for weights,” in Proc. Int. Joint Conf. Neural Netw. (IJCNN), Jul./Aug. 2011, pp. 450–456. [21] R. A. Nawrocki, R. M. Voyles, and S. E. Shaheen, “Polymer and nanoparticle-composite bistable devices: Physics of operation and initial applications,” in Advances in Neuromorphic Memristor Science and Applications, vol. 4, R. Kozma, R. E. Pino, and G. E. Pazienza, Eds. Amsterdam, The Netherlands: Springer-Verlag, 2012, pp. 291–314. [22] B. Aisa, B. Mingus, and R. O’Reilly, “The emergent neural modeling system,” Neural Netw., vol. 21, no. 8, pp. 1146–1152, Oct. 2008. [23] Mathworks. (2013). Neural Network Toolbox. [Online]. Available: http://www.mathworks.com/help/nnet/index.html [24] R. A. Nawrocki et al., “An inverted, organic WORM device based on PEDOT:PSS with very low turn-on voltage,” Organic Electron., vol. 15, no. 8, pp. 1791–1798, Aug. 2014. [25] S. Moller, C. Perlov, W. Jackson, C. Taussig, and S. R. Forrest, “A polymer/semiconductor write-once read-many-times memory,” Nature, vol. 426, no. 6963, pp. 166–169, Nov. 2003. [26] J. Wang, X. Cheng, M. Caironi, F. Gao, X. Yang, and N. C. Greenham, “Entirely solution-processed write-once-read-manytimes memory devices and their operation mechanism,” Organic Electron., vol. 12, no. 7, pp. 1271–1274, 2011. [27] K. J. Baeg et al., “Polymer dielectrics and orthogonal solvent effects for high-performance inkjet-printed top-gated p-channel polymer field-effect transistors,” ETRI J., vol. 33, no. 6, pp. 887–896, Dec. 2011. [28] D. P. Perrin, A. Kwon, and R. D. Howe, “A novel actuated tether design for rescue robots using hydraulic transients,” in Proc. IEEE Int. Conf. Robot. Autom. (ICRA), vol. 4. Apr./May 2004, pp. 3482–3487. [29] R. A. Nawrocki, X. Yang, S. E. Shaheen, and R. M. Voyles, “Structured computational polymers for a soft robot: Actuation and cognition,” in Proc. IEEE Int. Conf. Robot. Autom. (ICRA), May 2011, pp. 5115–5122. [30] J. Calamia, (2011) The Plastic Processor. IEEE Spectrum(11), 1. [Online]. Available: http://spectrum.ieee.org/semiconductors/processors/ the-plastic-processor


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[31] Y. Yuan et al., “Ultra-high mobility transparent organic thin film transistors grown by an off-centre spin-coating method,” Nature Commun., vol. 5, Jan. 2014, Art. ID 3005. [32] K. Datta, P. Ghosh, A. Mulchandani, S.-H. Han, P. Koinkar, and M. D. Shirsat, “Organic field-effect transistors: Predictive control on performance parameters,” J. Phys. D, Appl. Phys., vol. 46, no. 49, p. 495110, 2013. [33] R. A. Nawrocki and R. M. Voyles, “Artificial neural network performance degradation under network damage: Stuck-at faults,” in Proc. Int. Joint Conf. Neural Netw. (IJCNN), Jul./Aug. 2011, pp. 442–449. [34] D. S. Phatak and I. Koren, “Complete and partial fault tolerance of feedforward neural nets,” IEEE Trans. Neural Netw., vol. 6, no. 2, pp. 446–456, Mar. 1995.

Richard M. Voyles (M’76-SM’81-F’87) is an Associate Dean for Research and Professor of the Electrical and Computer Engineering Technology in the College of Technology at the Purdue University.

Robert A. Nawrocki (M’98) received his PhD from the University of Denver. The main goal of his research was development of Polymer Neuromorphic Circuitry, a solution-processable, parallel processing system based on polymer components and biologically inspired architecture. He is currently working as a postdoctoral research associate in the Department of Electrical, Computer, and Energy Engineering at the University of Colorado, Boulder.

Sean E. Shaheen (M’14) is an Associate Professor in the Department of Electrical, Computer, and Energy Engineering at the University of Colorado, Boulder.