Nonvolatile three-terminal operation based on oxygen vacancy drift in ...

Downloaded 03 Sep 2013 to 134.130.39.87. This article is copyrighted as indicated in the abstract. Reuse of AIP content is subject to the terms at: http://apl.aip.org/about/rights_and_permissions

APPLIED PHYSICS LETTERS 102, 233508 (2013)

Nonvolatile three-terminal operation based on oxygen vacancy drift in a Pt/Ta2O52x/Pt, Pt structure Qi Wang,1,2,a) Yaomi Itoh,1,2 Tsuyoshi Hasegawa,1,2 Tohru Tsuruoka,1,2 Shu Yamaguchi,3 Satoshi Watanabe,3 Toshiro Hiramoto,4 and Masakazu Aono1

1 WPI Center for Materials Nanoarchitectonics, National Institute for Materials Science, 1-1 Namiki, Tsukuba, Ibaraki 305-0044, Japan 2 Japan Science and Technology Agency, CREST, Chiyoda, Tokyo 102-0075, Japan 3 Department of Materials Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan 4 Institute of Industrial Science, The University of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan

(Received 13 February 2013; accepted 26 May 2013; published online 13 June 2013) Nonvolatile three-terminal operation is demonstrated using a Pt/Ta2O5!x/Pt, Pt structure, by controlling oxygen vacancy drift to make/annihilate a conductive channel between a source and a drain. The as-fabricated device is in an off-state. Application of a positive gate bias moves oxygen vacancies in a Ta2O5!x layer towards a channel region, making the channel region conductive. The conductive channel remains even after unloading the gate bias. Application of a negative gate bias, which moves the oxygen vacancies back towards the gate electrode, is required to turn off the C 2013 AIP Publishing LLC. device. The device shows a high ON/OFF ratio of up to 106. V [http://dx.doi.org/10.1063/1.4811122]

Non-volatility is one of the important characteristics required in developing next generation computing systems. Various two-terminal nonvolatile devices have been proposed and investigated as emerging memory devices. Nanoionic devices are some of the most promising candidates for next generation memory devices due to their characteristics, such as small size, low power consumption in addition to the non-volatility.1–7 They have achieved good performance in areas such as reliability,8 and will be commercialized as nonvolatile memory devices within a few years. Resistance switching in two-terminal nano-ionic devices is caused by ionic diffusion in ionic conductive/transfer materials such as metal oxides9–12 and metal sulfides.13–15 Nano-ionic devices are categorized into the three types, depending on the origin of conductivity in their on-state: Valence Change RAM,9–12 Atomic Switch,13–18 and thermochemical RAM.12 Of the three types, Valence Change RAM using metal oxide as its ionic transfer material has achieved excellent performance in areas such as switching speed and endurance.19,20 Three-terminal nano-ionic devices have also been developed based on metal filament formation and annihilation, as is achieved in atomic switches. For instance, metal filament formation and annihilation between a source and a drain was controlled by a gate bias, both in an electrolyte21–23 and in a solid-electrolyte.24,25 Development of types of programmable devices has been carried out26 using the low resistance of the metal filament formed in their on-states. Oxygen vacancy drift has also been used to achieve three-terminal memristive operations using TiO2.27 In the demonstration, ON/OFF ratio up to three orders of magnitude was achieved. One of the major characteristics of the two-terminal and the three-terminal nano-ionic devices mentioned above is a)

Author to whom correspondence should be addressed. Electronic mail: [email protected].

0003-6951/2013/102(23)/233508/5/$30.00

that the state variable of the devices is a combination of time and a bias, resulting, for instance, in their switching times becoming exponentially shorter with increases in bias. This characteristic makes the use of three-terminal nano-ionic devices as logic devices difficult, because the state variable of a logic device should be a bias. In order to overcome this difficulty, a type of three-terminal nano-ionic device, the “atom transistor,” has recently been developed,28 in which a super-saturation induced conductive channel formation is used to make its state variable a bias. However, while the previously mentioned problem has been solved, a issue has arisen in the difficulty of developing nonvolatile logic systems, which must require both n-type and p-type threeterminal devices, such as required in volatile logic systems using Complementary Metal Oxide Semiconductor (CMOS). Here we report another type of three-terminal nano-ionic device that works based on valence change in metal oxides, and which has the potential to achieve both n-type and p-type operations by increasing and decreasing oxygen vacancies, respectively. Fig. 1(a) shows the operating concept of the threeterminal nano-ionic device based on valence change. We used tantalum oxide (Ta2O5!x) as the ionic transfer material because valance change RAM using this material shows superior memory performance in areas such as switching speed and endurance.19,20 A source and a drain are formed on one side of a tantalum oxide layer and a gate is formed on the other side, as schematically shown in Fig. 1(a). Similar to the valance change RAM, the as-prepared device is in an off-state. Application of a positive gate bias moves oxygen vacancies (Voþþ) towards the source and the drain. If the gap between the source and the drain is sufficiently narrow, oxygen vacancies are also brought to the gap region, resulting in the formation of a conductive channel between the source and the drain. During the application of a gate bias, the concentration of oxygen vacancies in the tantalum oxide

102, 233508-1

C 2013 AIP Publishing LLC V


233508-2

Wang et al.

Appl. Phys. Lett. 102, 233508 (2013)

Pt (20 nm)/Ti (1.2 nm) using electron beam deposition, where the gap size between the source and the drain was determined by the angle and height of the source electrode, as schematically shown in Fig. 1(b). The gap size of the device used in this study was about 20 nm. The 3.5 nm-thick Ta2O5!x layer prevents any leakage of current between the source and the drain caused by any accidental connections created in the fabrication process. Fig. 2(a) shows the current-voltage (I-V) loops of the asfabricated device taken by sweeping a gate bias (VG). In the measurement, current compliance, set at 2 lA, was used for the drain current (ID) and the source current (IS). This was

FIG. 1. (a) Oxygen vacancy drift transistors in turning-off and turning-on operations. The oxygen vacancy forms a conductive path between the source and the drain. (b) Cross-sectional schematic of the fabricated device. (c) Scanning electron microscope images of the fabricated device.

layer is largest along the interfaces between the source and the drain (channel region), suggesting that there should be an operating condition when the concentration of oxygen vacancies only at the channel region reaches a certain value that makes the region conductive. In other words, a conductive channel is not formed between a gate and other electrodes. Analogous to the operation of Valence Change RAM, it is expected that the three-terminal operation is non-volatile, and application of a negative gate bias, which brings away oxygen vacancies from the channel region, is needed to turn the device off. We found that the concentration of oxygen vacancies at the channel region is a function of a gate bias, making the gate bias a state variable of the operation. A cross-sectional schematic of the device is shown in Fig. 1(b) and scanning electron microscope images of a fabricated device are shown in Fig. 1(c). In the first part of the fabrication, a gate electrode of Pt (13 nm)/Ti (2 nm) was formed by DC sputtering with photolithography patterning using a double-layer photoresist and a lift-off method. Then, Ta2O5!x (25 nm) was deposited as an ionic conductive layer by reactive sputtering using a Ta metal target in an oxygen and argon gas mixture. On the Ta2O5!x surface, a source electrode of Pt (29 nm)/Ti (1 nm) was fabricated using electron beam deposition and the photolithographic technique, which was followed by the oblique angle deposition of 3.5 nm-thick Ta2O5!x by RF sputtering using a Ta2O5 target. Finally, a drain electrode was formed by angle deposition of

FIG. 2. (a) Changes in drain current (ID), source current (IS) and gate current (IG) during a gate bias sweeping. 1 mV of VSD was applied between the source and the drain for measuring ID and IS. (b) Schematics of the distributions of oxygen vacancies in each condition. (c) The source current in semilog coordinate. (d) ISD vs. VSD measured in the on-state and the off-state. Temperature dependence of the resistance between the source and the drain measured for the on-state (e) and for the intermediate state (f).


233508-3

Wang et al.

set to 4 lA for the gate current (IG). At first, application of a positive gate bias caused an increase in IG and IS at VG ¼ 5 V, suggesting the formation of a conductive channel between the source and the gate. Following this, ID also started to increase at VG ¼ 12 V and reached the compliance current (2 lA) at VG ¼ 13 V. The simultaneous increase in IG with ID indicates that a conductive channel was also formed between the drain and the gate. The observed increases in current seems to suggest that a nonvolatile turning-on process, based on Valence Change RAM operation, occurred independently both between the source and the gate and between the drain and the gate. However, IG returned to zero at VG ¼ 5 V when VG was swept back to zero, indicating that the two conductive channels disappeared. Interestingly, both ID and IS remained at 6400 nA, although they also decreased from 2 lA with the decrease in IG, when 1 mV was applied between the source and the drain during the measurement. It is held that conductive channel formation between a gate and a source and between a gate and a drain is volatile, and that between a source and a drain is nonvolatile. This phenomena can be understood as follows. Application of a positive gate bias VG moved the oxygen vacancies in a Ta2O5!x layer towards the interface between the source/drain electrodes, resulting in the formation of the two conductive channels. However, the conductive channels disappeared due to an incomplete concentration of oxygen vacancies at the gate side. In other words, a sufficient number of oxygen vacancies remained only between the source and the drain region in unloading VG, resulting in the conductive channel remaining only between the source and the drain, as schematically shown in Fig. 2(b). The conductive channel between the source and the drain disappeared at about VG ¼ !6 V by applying a negative gate bias, which brought back oxygen vacancies, even in the channel region, towards the gate, as shown in Fig. 2(b) (left). IS shown as an absolute value with a semi-log scaling (Fig. 2(c)) clearly shows a sharp increase at VG ¼ 5 V, which is close to the critical voltage, causing a soft breakdown in TaOx29,30 as well as in other amorphous oxide films.31,32 It is known that a soft breakdown makes the movement of oxygen vacancies easier, which ensures that sufficient oxygen vacancies move to the gap region between the source and drain electrodes, which enables the formation of a conductive path. Meanwhile, a small compliance current value prevents a hard breakdown, which may be caused by too many oxygen vacancies between the gate and the source/drain electrodes. As a result, the conductive channels connecting the gate were not stable, i.e., they disappeared with the unloading of the gate bias. The I/V characteristics between the source and the drain, measured both at the on-state and the off-state, are shown in Fig. 2(d). The ON/OFF ratio in the operation was larger than six orders of magnitude. In the off-state, leakage current between the source and the drain was sufficiently small because of the Schottky barrier between the Pt (source and drain) electrode and Ta2O5!x layer. In the on-state, the ohmic I/V between the source and the drain suggests that Ta2O5!x at the interface locally turned into TaO2!y due to movement of the oxygen vacancies. Here, we denote a

Appl. Phys. Lett. 102, 233508 (2013)

highly oxygen deficient tantalum oxide as TaO2!y, with an on-resistance of about 2.4 kX. The transition from Ta2O5!x to TaO2!y is expressed as follows, where Voþþ is an oxygen vacancy, Ta2 O5!x þ Vo þþ ! 2 $ TaO2!y :

(1)

Application of a negative gate bias brings oxygen vacancies away from the channel region, resulting in the opposite reaction at the channel region, 2 $ TaO2!y ! Vo þþ ! Ta2 O5!x :

(2)

In order to investigate the origin of the I/V characteristics, we measured the temperature dependence of the resistance in the on-state. On-resistance decreased with decreasing temperature, as shown in Fig. 2(e), suggesting that the conductive path shows metallic behavior. This is consistent with the fact that a nanoscale filament, consisting of an amorphous Ta(O) solid solution, was observed by transmission electron microscopy in the on-state two-terminal TaOx switch.33 For comparison, we also measured the temperature dependence of the resistance in an intermediate-state, which had a resistance of about several hundred kX. The resistance in the intermediate-state decreased with increasing temperature, as shown in Fig. 2(f), suggesting that the conductive path was composed of an oxide semiconductor. The difference between the on-state and the intermediate-state can be understood from the degree of oxygen vacancy concentration. Namely, the oxygen concentration in the channel region increased with movement from the intermediate-state to the on-state, which caused the transition from the semiconductor I/V characteristic to the ohmic characteristic. In order to reduce the IG (gate leakage current) in the operation, we reduced the gap size between the source and the drain using a sidewall gate-type structure. Fig. 3(a) shows the fabricated device, in which the reduced gap size (the thickness of the SiO2 layer between the source and the drain) was 10 nm. The structure is similar to that which we used for a cation-based three-terminal device.26 Although the structure was different from the structure shown in Fig. 2, in both cases the same fabrication conditions were used for film deposition, such as for Ta2O5!x. The operating result is shown in Fig. 3(b). Although IG increased to a certain amount value in the operation, it was much smaller than that in Fig. 2. A nonvolatile electrical connection was formed between the source and the drain at around VG ¼ 8 V, and disappeared at around VG ¼ !38 V. The gate voltages required for the switching, especially for turning-off, are high in this sidewall gate-type structure. We guess that contaminant SiO2 particles may be deposited on the sidewall in the device fabrication using FIB, and the SiO2 particles are the cause of the high gate voltages, although which is under investigation. The electrical connection between the source and the drain showed an ohmic character, as shown in Fig. 3(c). When we used a gap size larger than 25 nm with the device structure shown in Fig. 2, a hard breakdown occurred between the gate and the source or between the gate and the drain before a conductive channel was formed between the


233508-4

Wang et al.

Appl. Phys. Lett. 102, 233508 (2013)

of an n-type transistor. The power consumption of the prototype devices is smaller than that of two-terminal metal oxide switches. A further reduction in power consumption will be achieved by reducing the gap size between the source and the drain and by reducing the interfacial area size of the electrodes. While this is work for the future, the performance of the device, in areas such as repeatability, is also expected to be improved with the downsizing of the gap and interfacial area. The project was financially supported by the Japan Science and Technology Agency (JST)/CREST “Atom Transistor Project.” 1

FIG. 3. (a) Scanning electron microscope image of the fabricated device and a cross-sectional schematic of the device. (b) Changes in drain current (ID), source current (IS), and gate current (IG) during a gate bias sweeping. 1 mV of VSD was applied between the source and the drain for measuring ID and IS. (c) ISD vs. VSD measured in the on-state.

source and the drain. In addition to the gap size, there is another major difference between the devices shown in Figs. 2 and 3, which was the size of the interfacial area where the source, drain, and gate face the Ta2O5!x layer. The area size of the device shown in Fig. 2 was three orders of magnitude larger than that of the device shown in Fig. 3, which should also be one of the reasons for the large gate leakage current in Fig. 2. Therefore, reducing the gap size between the source and the drain as well as reducing the area of the electrodes facing the Ta2O5!x layer will be effective in reducing gate leakage current in future development. In conclusion, we have conceptually demonstrated nano-ionic three-terminal device operations based on oxygen vacancy movement, where a conductive channel can be formed only between a source and a drain, i.e., the gate is kept isolated. The conductive channel is formed by the application of a positive gate bias and it disappears with the application of a negative gate bias, corresponding to the operation

International Technology Roadmap for Semiconductors (ITRS), Emerging Research Devices (ERD), 2011 edition (2012). 2 J. Hutchby and M. Garner, in International Technology Roadmap for Semiconductors, Assessment of Potential & Maturity of Selected Emerging Research Memory Technologies Workshop & ERD/ERM Working Group Meeting, 2010. 3 R. Waser and M. Aono, Nat. Mater. 6, 833 (2007). 4 T. Hasegawa, K. Terabe, T. Sakamoto, and M. Aono, MRS Bull. 34, 929 (2009). 5 R. Waser, R. Dittmann, G. Staikov, and K. Szot, Adv. Mater. 21, 2632 (2009). 6 J. J. Yang, D. B. Strukov, and D. R. Stewart, Nat. Nanotechnol. 8, 13 (2013). 7 W. Lu, R. D. S. Jeong, M. Kozicki, and R. Waser, MRS Bull. 37, 124 (2012). 8 M. Tada, T. Sakamoto, Y. Tsuji, N. Banno, Y. Saito, Y. Yabe, S. Ishida, M. Terai, S. Kotsuji, N. Iguchi et al., in Technical Digest-International Electron Devices Meeting (IEEE, Baltimore, 2009), pp. 1–4. 9 D. C. Kim, S. Seo, S. E. Ahn, D.-S. Suh, M. J. Lee, B.-H. Park, I. K. Yoo, I. G. Baek, H.-J. Kim, E. K. Yim et al., Appl. Phys. Lett. 88, 202102 (2006). 10 J. J. Yang, M. D. Pickett, X. Li, A. A. OhlbergDouglas, D. R. Stewart, and R. S. Williams, Nat. Nanotechnol. 3, 429 (2008). 11 H. Akinaga and H. Shima, Proc. IEEE 98, 2237 (2010). 12 J. J. Yang, M. X. Zhang, J. P. Strachan, F. Miao, M. D. Pickett, R. D. Kelley, G. Medeiros-Ribeiro, and R. S. Williams, Appl. Phys. Lett. 97, 232102 (2010). 13 T. Sakamoto, H. Sunamura, H. Kawaura, T. Hasegawa, T. Nakayama, and M. Aono, Appl. Phys. Lett. 82, 3032 (2003). 14 K. Terabe, T. Hasegawa, T. Nakayama, and M. Aono, Nature 433, 47 (2005). 15 T. Hasegawa, K. Terabe, T. Tsuruoka, and M. Aono, Adv. Mater. 24, 252 (2012). 16 E. Linn, R. Rosezin, C. Kuegeler, and R. Waser, Nat. Mater. 9, 403 (2010). 17 T. Sakamoto, K. Lister, N. Banno, T. Hasegawa, K. Terabe, and M. Aono, Appl. Phys. Lett. 91, 092110 (2007). 18 T. Tsuruoka, K. Terabe, T. Hasegawa, and M. Aono, Nanotechnology 21, 425205 (2010). 19 M. J. Lee, C. B. Lee, D. Lee, S. R. Lee, M. Chang, J. H. Hur, Y. B. Kim, C. J. Kim, D. H. Seo, S. Seo et al., Nat. Mater. 10, 625 (2011). 20 A. C. Torrezan, J. P. Strachan, G. M. Ribeiro, and R. S. Williams, Nanotechnology 22, 485203 (2011). 21 F.-Q. Xie, L. Nittler, C. Obermair, and T. Schimmel, Phys. Rev. Lett. 93, 128303 (2004). 22 F.-Q. Xie, R. Maul, C. Obermair, W. Wenzel, G. Schon, and T. Schimmel, Adv. Mater. 22, 2033 (2010). 23 R. Maul, F.-Q. Xie, Ch. Obermair, G. Scho€ un, Th. Schimmel, and W. Wenzel, Appl. Phys. Lett. 100, 203511 (2012). 24 N. Banno, T. Sakamoto, N. Iguchi, H. Kawaura, S. Kaeriyama, M. Mizuno, K. Terabe, T. Hasegawa, and M. Aono, IEICE Trans. Electron. E89-C, 1492 (2006). 25 T. Sakamoto, N. Iguchi, and M. Aono, Appl. Phys. Lett. 96, 252104 (2010). 26 S. Kaeriyama, T. Sakamoto, H. Sunamura, M. Mizuno, H. Kawaura, T. Hasegawa, K. Terabe, T. Nakayama, and M. Aono, IEEE J. Solid-State Circuits 40, 168 (2005).


233508-5 27

Wang et al.

Q. F. Xia, M. D. Pickett, J. J. Yang, X. M. Li, W. Wu, G. MedeirosRibeiro, and R. S. Williams, Adv. Funct. Mater. 21, 2660 (2011). 28 T. Hasegawa, Y. Itoh, H. Tanaka, T. Hino, T. Tsuruoka, K. Terabe, H. Miyazaki, K. Tsukagoshi, T. Ogawa, S. Yamaguchi et al., Appl. Phys. Express 4, 015204 (2011). 29 Z. Wei, Y. Kanzawa, K. Arita, Y. Katoh, K. Kawai, S. Muraoka, S. Mitani, S. Fujii, K. Katayama, M. Iijima et al., in Technical DigestInternational Electron Devices Meeting (IEEE, San Francisco, 2008), pp. 293–296.

Appl. Phys. Lett. 102, 233508 (2013) 30

C. Chen, C. Song, J. Yang, F. Zeng, and F. Pan, Appl. Phys. Lett. 100, 253509 (2012). H. Shima, F. Takano, H. Muramatsu, H. Akinaga, Y. Tamai, I. H. Inque, and H. Takagi, Appl.Phys. Lett. 93, 113504 (2008). 32 J. J. Yang, F. Miao, M. D. Pickett, D. A. A. Ohlberg, D. R. Stewart, C. N. Lau, and R. S. Williams, Nanotechnology 20, 215201 (2009). 33 F. Miao, J. P. Strachan, J. J. Yang, M. X. Zhang, I. Goldfarb, A. C. Torrezan, P. Eschbach, R. D. Kelley, G. Medeiros-Ribeiro, and R. S. Williams, Adv. Mater. 23, 5633 (2011). 31
