Novel VCO Architecture Using Series Above-IC FBAR ... - IEEE Xplore

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 10, OCTOBER 2006

Novel VCO Architecture Using Series Above-IC FBAR and Parallel LC Resonance Kim B. Östman, Sami T. Sipilä, Student Member, IEEE, Ivan S. Uzunov, Member, IEEE, and Nikolay T. Tchamov

Abstract—A quasi-monolithic voltage-tunable film bulk acoustic resonator (FBAR) enhanced oscillator for 2.1 GHz in 0.25- m SiGe BiCMOS technology is designed, fabricated, and evaluated. The narrow-band FBAR was built above the SiGe circuit through later Si post-processing steps. The oscillator is based on a two-transistor loop structure and uses two resonators, namely a parallel LC tank and an above-IC FBAR in its series-resonant mode. The improvement in phase noise performance is significant compared to a similar reference LC voltage-controlled oscillator (VCO), with the best phase noise being 144.1 dBc/Hz at an offset of 1 MHz and 149.6 dBc/Hz at 3 MHz. The architecture offers advantages in overcoming frequency tuning difficulties usually present when using high- resonators. Although the width of the tuning range comes at some cost on phase noise, the measured performance satisfies contemporary wireless standards such as GPS. Index Terms—Film bulk acoustic resonator (FBAR) voltage-controlled oscillator (VCO), integrated circuits, phase noise, piezoelectric resonator oscillators, tuning range.

I. INTRODUCTION

T

HE frequency stability of integrated oscillators has become an increasingly important issue. Especially in communications, designers face challenges when seeking to implement on-chip voltage-controlled oscillators (VCOs) with low phase noise. The VCO circuits suffer mainly from the low quality factor of on-chip inductors, whereas frequency tuning range is usually not a big problem. Crystals and various surface-acoustic wave (SAW) and bulkacoustic wave (BAW) devices may be used when implementing resonators in oscillators, and they enable very good phase noise performance. The film bulk-acoustic resonator (FBAR) is one relatively recent development in the family of BAW devices. The problem with the FBAR (and BAW devices in general) is that it is costly and not automatically compatible with IC processes, and due to its mechanical construction, the frequency tunability of FBAR oscillators becomes very difficult. Nevertheless, efforts to create FBAR-based oscillators have been under way for some time. The Pierce structure has been used successfully to create low-noise oscillators that capitalize on the power-saving possibilities offered by the FBAR, with reported power consumption in the range of 80–300 W. No inductors are used in the designs, thus giving considerable space savings [1], [2]. The Colpitts is another structure that has Manuscript received November 7, 2005; revised May 6, 2006. This work was supported by the European Union within the fifth framework research project MARTINA (IST-2001-37362). The authors are with the Institute of Communications Engineering, Tampere University of Technology, FIN-33101, Tampere, Finland (e-mail: nikolay@cs. tut.fi). Digital Object Identifier 10.1109/JSSC.2006.881567

been used to create an FBAR oscillator [3]. The disadvantage of this structure is the use of an inductor that increases the area. Common-base [4], [5] and common-collector [6] configurations creating negative resistance have also been used in FBAR oscillators. They use the high- resonator as a series feedback element. The largest frequency tuning range of all FBAR oscillators is very small (0.13%) and has been reported in [6]. Recent research has sought to utilize FBAR devices by attaching them above silicon chips. The FBAR may in these cases save chip real estate by replacing monolithic inductors and/or LC tanks. This approach has been combined with RF integrated circuit design and used in filtering low-noise amplifiers (LNAs) [7], [8] and an experimental RF front-end [9] to realize a bandpass filter, with the above-IC FBARs replacing the traditional off-chip crystals. It has also been used to implement stand-alone filters [10]. Although general problems related to extra processing step costs, yield, and tolerances remain, it has become clear that the obstacle of combining FBAR technology with standard IC processes has been overcome. This paper presents a new version of a two-transistor oscillator topology that utilizes an above-IC FBAR as its series resonance circuit and a traditional LC tank as a parallel resonator. A solution is here found for overcoming some of the restrictions related to frequency tuning. The performance of the single-ended and differential-output versions of this new circuit is compared to a nearly identical LC oscillator fabricated in the same process as a point of reference. II. FBAR BEHAVIOR AND CIRCUIT SELECTION A. FBAR Device Behavior and Model The FBAR consists of a thin piezoelectric film sandwiched between two metal electrodes. In the above-IC case, mechanical isolation between the FBAR and other circuitry is realized by creating an air gap between the bottom electrode and the IC. The two electrodes connect to the rest of the circuitry through the highest metal layer of the IC. In the present work, the piezoelectric material is aluminum nitride (AlN), with the top and bottom electrode materials being platinum (Pt) and aluminum (Al), respectively [11]. A simplified cross section of the resulting structure is shown in Fig. 1. FBAR devices exhibit behavior similar to quartz crystals and have two resonances, one series and one parallel. One main difference between FBARs and crystals is that FBARs have lower -factors, although still much higher than those of monolithic inductors. Typical values range from a few hundred to above one thousand, depending on properties such as the electrode material and the thickness, area, surface roughness, stress, and orientation of the piezoelectric material [11], [12]. Another difference

0018-9200/$20.00 © 2006 IEEE

ÖSTMAN et al.: NOVEL VCO ARCHITECTURE USING SERIES ABOVE-IC FBAR AND PARALLEL LC RESONANCE

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Fig. 1. A simplified principle-level cross section of the above-IC FBAR.

TABLE I SOME RECENTLY REPORTED FBAR DEVICES

Fig. 3. Impedance magnitude of the FBAR lumped-element model with the and shown. effect of independently varying

R

Fig. 2. MBVD model of an FBAR. The component values correspond to those is not part of the FBAR of the FBAR model used in the present oscillator. but can be added to tune the parallel resonance -factor.

Q

R

is that the distance between the series and parallel resonance frequencies is larger than the corresponding distance in quartz crystals. However, the frequencies are still very close to each other, with typical distances between and being 2 to 3 percent of . FBAR devices have been manufactured already for many years, and clear advances have been made in quality factor and yield. Table I shows a brief comparison of the characteristics of some recently published FBARs. The electrical characteristics of the FBAR can be modeled by using the Butterworth–Van Dyke (BVD) equivalent circuit usually employed when modelling quartz crystals. The impedance locus of the FBAR deviates somewhat from that produced by this model, and therefore a more accurate model version has been proposed by Larson et al. in [17]. The difference between this new Modified Butterworth–Van Dyke (MBVD) model of the FBAR and the traditional BVD model is the addition of rein series with plate capacitance (see Fig. 2). The sistor and the electrode resistance are the motional resistance main factors degrading the intrinsic or unloaded quality factor of the FBAR. B. FBAR Frequency Tuning and VCO Circuit Selection The major problem with implementing frequency tuning in circuits utilizing FBAR devices is that the resonator itself cannot be changed. Similarly to quartz crystals, it is possible to change the FBAR’s parallel resonance frequency by connecting a capacitor in parallel, or to change its series resonance frequency

R

by connecting a capacitor in series with the FBAR. In both cases, the changed resonance frequency moves closer to the other resonance frequency. This limits the tuning possibilities to a small section of the initial distance between the series and parallel resonance frequencies. The guidelines for another way of realizing frequency tuning may be arrived at by considering the FBAR as a filtering component, with the -factor of the FBAR determining the bandwidth of the filter. The bandwidths of the series and parallel resonances can be controlled by connecting additional resistors and and , respectively. In this way thus changing the values of the of the two resonances can be independently controlled. The magnitude of the FBAR’s impedance versus frequency is plotted in Fig. 3. Except for the nominal values of the equivalent and k ) circuit in Fig. 2 (the curve for and the magnitude of the impedance is plotted when are independently varied. When is changed, is kept at 100 k , which is approximately equivalent to an open circuit; is varied, is kept at the nominal value of 0.8 . when has noticeable effect only around the series The variation of affects the response only resonance, whereas the variation of around the parallel resonance. From the above considerations, it follows that we are able to tune the -factor at series or parallel resonance by adding an appropriate resistor. From a practical point of view, it is easier to operate with series resonance, because in this case we need a resistor of only a few ohms. In contrast, if we use parallel resonance the needed resistor is very large. The reduction of must of course be moderate in order to preserve the good phase noise performance expected of an FBAR oscillator. A major factor guiding the choice of oscillator architecture is thus that the oscillator should utilize the resonator in the series resonance mode. In this case the FBAR must be connected in a low-impedance part of the circuit, so that the surrounding impedances are low enough not to degrade the series resonance of the FBAR too much. A good candidate for the architecture is a Butler-type oscillator, the block diagram of which is shown

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Fig. 4. Block diagram of the series-resonance FBAR VCO core.

Fig. 5. Circuit diagram of the series-resonance FBAR VCO core with a singleended output buffer.

in Fig. 4. The FBAR is represented as a series-resonance circuit and is connected between the output of a common-collector (CC) amplifier and the input of a common-base (CB) amplifier. The oscillator is implementable with both MOS and bipolar transistors. We have used bipolar junction transistors (BJTs), which have lower flicker noise than MOS devices at the same drive currents and effective areas [18]. The schematic diagram of the oscillator and a single-ended output buffer is shown in Fig. 5. From the schematic it can be seen that we are able to change the loaded series-resonance of the FBAR by varying the quiescent point of the CB stage. In Fig. 5, the FBAR together with the input resistance of the CB stage form a circuit that acts as a bandpass filter around the series resonance frequency of the FBAR. We propose that it will be easier to satisfy the oscillation conditions in a wider frequency range, and thus to realize a larger VCO frequency tuning range, by extending and varying the bandwidth of this filter.

most critical factor guiding the design of the oscillator, the many benefits obtained by using the parallel resonance circuit instead of a collector bias resistor outweigh the cost of increased layout size. If we assume that the parallel LC tank resonates at approximately the frequency of oscillation, then the exact value of the oscillation frequency is defined by the series-resonance frequency of the FBAR. At this frequency, the FBAR connects the output of the CC amplifier with the input of the CB amplifier, and the circuit oscillates. Outside this frequency, the impedance of the FBAR increases rapidly and breaks the feedback loop. This is a simple explanation of the operation of the circuit, and it will be refined further in Section IV. The oscillator’s output can be placed at the output of the CB amplifier or at the output of the CC amplifier. At the output of the CB stage, the spectral purity is better than at the output of the CC is stage. Moreover, the signal amplitude at the emitter of lower than at its base. This is due to the CC stage being loaded by the low input impedance of the CB stage at the series-resonance frequency of the FBAR. Therefore, we prefer to use the output of the CB stage as shown in Fig. 5. Since the output impedance at this point is high, an output buffer is needed in order to ensure good power transfer. The buffer also improves the pulling figure. There are two different buffering approaches. In the singleended version, a CC output buffer takes the signal out from the oscillator core and drives the single-ended 50- load impedance. This CC buffer is a replica of the CC stage in the oscillator core. A second type of buffering is used to obtain differential output. The CC output buffer is replaced with a differential amplifier having one input AC-grounded. Its two outputs are connected to CC output buffers driving the differential load impedance. This complication of the circuit increases the current consumption and degrades the phase noise somewhat. By taking a retrospective look, it may be seen that many transistorized circuit variations have been proposed based on the classic Butler oscillator topology [19]. These feature properties such as amplitude regulation [20] or limiting [21], crystal strain reduction [22], and digital frequency control [23]. More recently, an IC implementation of the two-transistor architecture using an LC resonator was proposed in [24] and [25] and further investigated in [26]. The present oscillator is a further development of the last-mentioned IC implementations. IV. HIGH-

III. CIRCUIT DESCRIPTION In Fig. 5, the CB amplifier serves as the main amplifying stage, while the CC amplifier is used to match the high output impedance and the low input impedance of the CB amplifier to each other. This core loop provides positive feedback and together with the resonators causes the circuit to oscillate. The insertion of the parallel-resonance LC circuit between the power supply and the collector of the CB transistor increases the spectral purity of the oscillator. In addition, it eliminates the voltage drop and noise that would be caused by the bias resistor in its stead. It is, of course, possible to implement the oscillator without this parallel resonator. However, unless chip area is the

RESONATOR AND VCO TUNING MECHANISMS

A. Phase Noise and Quality Factor Earlier IC implementations [24], [26] of the above-described series resonance oscillator have used an LC tank as the series resonance circuit in the feedback. The best inductor -factors currently achieved in SiGe processes are only around 20, and thus the inductor is usually the component that limits the of the resonator. In [27], the following formula is given for the relationship between and phase noise:

(1)


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Fig. 7. Circuit for loop magnitude and phase response simulation.

Fig. 6. Simulated FBAR VCO tuning curve.

In other words, oscillator phase noise is inversely proportional to the quality factor of the resonator. Since the present oscillator adopts a high- above-IC FBAR as the series resonance circuit, it is expected to provide considerable advantages in phase noise performance compared to oscillators that utilize monolithic LC resonators. B. Frequency Tuning Solution As was mentioned above, the main challenge with using BAW, SAW, and quartz crystal high- resonators in tunable oscillators is usually the drastic reduction of available frequency tuning range. The largest frequency tuning previously reported for an FBAR oscillator is 0.13% [6]. This is too small for beneficial use of the VCO in multi-channel applications, and the small tuning range can mainly be exploited in fine tuning. Thus, it becomes of primary importance to look for ways in which this limitation can be overcome. The frequency tuning in the present VCO is realized by altering the bias point of the CB amplifier. This is done by conto the base of through renecting control voltage (see Fig. 5). The tuning curve received through sistor simulation of the complete oscillator including a single-ended buffer is shown in Fig. 6. In this as well as in all other electrical simulations, the FBAR is included as the MBVD lumped-element model shown in Fig. 2. From the results it follows that we can expect a widened frequency tuning range. When the control voltage changes from 1.7 to 3 V, the frequency changes from 2.172 to 2.115 GHz, which is equivalent to a relative tuning range of 2.6%. C. Frequency Tuning Mechanism To explain the extension of the tuning range, it is necessary to consider the mechanisms of oscillation in the circuit in greater detail. It is well known that the frequency of oscillation is determined from the point at which the phase of the loop gain is 0 or a multiple of . The simplest model of the oscillator neglects the interaction between the stages, assumes that the parallel tank in the CB stage is in resonance, and tries to explain the oscillation of the circuit with the series resonance of the FBAR only.

Fig. 8. (a) Magnitude response and (b) phase response of the oscillator’s core 0.8, 1.2, 1.6, and 2.4 V. loop with V

=

Obviously, this model cannot clarify the tuning of the oscillator, since the series resonance of the FBAR does not depend on the voltage at the emitter of the CB stage. To consider the loop gain in more detail we need to break the loop. We choose the output of the CC stage as an appropriate place to do so. In order to preserve the conditions at this output after breaking the loop, the CC stage is loaded with the FBAR in series with the input resistance of the CB stage . The relevant portion of the oscillator is shown in Fig. 7. This approach is not fully precise, but it helps to understand the circuit better. The simulated magnitude and phase responses at four different control voltages are shown in Fig. 8. From the phase response in Fig. 8(b) we see that a second minimum appears as the control voltage increases. A significant effect of this second

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minimum is that it moves the zero-phase point of the loop to a lower frequency, thus extending the tuning range. The explanation of the curves in Fig. 8(b) requires more accurate analysis of the loop gain in the frequency region around the series resonance of the FBAR. The circuit in Fig. 7 can be and the divided into three stages: 1) between the input input of the CB stage (point 1 in Fig. 7); 2) the CB stage (between points 1 and 2); and 3) the CC stage (between point 2 and ). For their analysis, we must first determine their load admittances (or impedances). The load impedance of the CC stage is , where can be calculated from Fig. 2. When is small, is relatively large ( [28, if ) pp. 183–186], in our circuit . If and reduces the influence of the variation of is large, decreases to the same range as the loss resistors at in the FBAR equivalent circuit (for example ), and the load of the CC stage is close to a short circuit around the series resonance. For the input admittance of the CC stage we can use the formula (2) , , and come from the BJT equivalent circuit [28, pp. . The analysis of the formula 26–34], and is negative (with larger magshows that the real part of is large) when is capacitive. This nitude when happens at frequencies below the series resonance. The load of the CB stage is a sum of the input admittances of the CC stage and the output buffer, the admittance of the parallel LC tank, and the resistors , , , and . The input admittance of the output buffer is approximately equivalent to pF in our circuit) as it follows from (2) due a capacitor ( to its resistive load. The tank is tuned to have a resonance approximately at the frequency of oscillation. This resonance is determined from the components of the tank as well as from the input capacitances of the CC buffer stages. Bias resistors together with the loss resistor of the tank and the real part of the input admittance of the output buffer compensate fully or partly the negative input conductance of the CC stage in the oscillator is low the compensation is full, but when core. When increases, the real part of the load admittance in the CB stage becomes very small or even negative. When analyzing the CB stage, the influence of capacitor (6 pF) must also be taken into account, because it is not large enough to realize a short circuit. The approximate formula for the input admittance of the CB stage is then

(3) If is very large, (3) gives the popular expression for the input admittance of the CB stage . This is approxis small. When is large, imately satisfied when the variations of all terms in the denominator of (3) are large, change significantly and the real and imaginary parts of

Fig. 9. Real and imaginary parts of the input admittance of the CB stage at control voltages 0.8 V and 2.4 V. The curves are plotted by using formulas (2) and (3).

around the FBAR series resonance. This is illustrated in Fig. 9, where the input admittance of the CB stage calculated by using the above formulas is compared at two control voltages. The loop gain is a product of the gains of the stages in the between and point 1, of the CB circuit in Fig. 7: of the CC stage. The approximate formulas for stage, and these gains are (4) (5) (6) Most of the components in these expressions vary vastly around the series resonance of the FBAR and it is difficult to predict their influence. In Fig. 10 are shown the corresponding phase characteristics for the case when the control voltage is 2.4 V. Additional curvature in the characteristic appears in below the series resonance, and it is the first stage increased by the next stages into a second minimum in the phase characteristic of the total loop gain. The existence of this minimum and its depth depend strongly on the -factor of the parallel tank (in Figs. 9 and 10, a -factor of 10 is assumed), on the control voltage, and on the value of capacitor . The phase of the loop gain in Fig. 10 is very close to the corresponding phase characteristic in Fig. 8(b), which confirms the formulas given above. If we plot the same characteristics , the second minimum does not exist and for the phase characteristic crosses the zero at a frequency above the series resonance. The local maximum of the phase characteristic of the total is at the series resonance of the FBAR and has loop gain a value close to 0. Its exact value is difficult to predict due to the inaccuracy of the approach of breaking the feedback loop. Most probably, this maximum is less than 0 and does not cause


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Fig. 10. Phase characteristics of the divider between the FBAR and the input ), of the CB stage (T ), of the CC stage admittance of the CB stage (T ). (T ), and of the whole feedback loop (T

problems in the form of multiple possible oscillation frequencies, since the more realistic tuning curve in Fig. 6 is smooth. To summarize, the extension of the tuning range occurs due to the following factors. • A significant decrease in the magnitude of the CB stage is high. input impedance when • The real part of the input impedance of the CC feedback is high. buffer becomes negative and is large when in the CB stage does not realize a • The bypass capacitor complete short circuit. V. EXPERIMENTAL RESULTS A. Fabrication and Measurement Setup A total of three oscillator versions were designed: a single-ended reference LC oscillator, a single-ended FBAR oscillator, and an FBAR oscillator with differential output. The only significant difference between the LC and FBAR versions is that the feedback of the LC version uses an inductor and an nMOS varactor instead of an FBAR. The circuits were fabricated in a 0.25- m SiGe BiCMOS process. The above-IC FBAR together with its connecting electrodes occupies a space of approximately 350 m 300 m and was added to the SiGe circuits through post-processing. Fig. 11 shows photographs of the single-ended oscillators. The transistor sizes, quiescent points, inductor sizes and capacitors (multiple parallel-connected MIM) were optimized with respect to phase noise and frequency tuning range performance. The circuits were measured on-wafer by using a Cascade 9000 probe station, an R&S FSEM 26.5-GHz spectrum analyzer, and an HP 4352S signal source analyzer. The circuits were sourced by a 2.4-V power supply, and the control voltage was varied between 0.9 V and 2.7 V (up to 2.95 V was used for the single-ended FBAR VCO). In these designs, the control voltage could not be lowered below 0.9 V, since doing so shuts down the CB amplifier and consequently the oscillator itself. The single-ended FBAR VCO including the buffer consumed

Fig. 11. Micrograph of (a) the reference LC VCO and (b) the single-ended FBAR VCO; chip sizes are 1 mm 1 mm.

2

11–30 mA depending on the value of the control voltage, with a low control voltage corresponding to low current consumption. The consumption of the FBAR oscillator with differential output rose to 22–39 mA due to the use of a differential amplifier and one additional CC buffer amplifier. B. Phase Noise and Spectrum The best phase noise performance (see Fig. 12) of the differential-output FBAR oscillator is about 143.7 dBc/Hz at an offset of 1 MHz from the carrier and 147.3 dBc/Hz at an offset of 3 MHz. The version with a single-ended output shows similar phase noise performance, with the phase noise at high offsets being about 2 dB lower than that of the differential-output version. The high-offset phase noise of the latter is mainly limited by the noise floor of the more complex buffering, which can be seen clearly by a lowering of the phase noise floor when the separate power supply voltage of the buffers is increased. The reference LC oscillator exhibited the best phase noise of

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Fig. 12. Phase noise performance of the reference LC VCO and the differentialoutput FBAR VCO at the optimum control voltage values.

Fig. 14. Single-ended FBAR VCO output spectrum.

Fig. 13. Single-ended FBAR VCO and LC VCO phase noise at a 1-MHz offset as a function of the control voltage.

126.0 dBc/Hz and 135.0 dBc/Hz at these offsets, respectively. A considerable improvement in phase noise due to an increase in resonator is thus clearly noticed. The phase noise performance of the FBAR-based circuits degrades when one moves away from the optimum control voltage point, and the same holds true for the LC version (see Fig. 13). The phase noise of the LC version at the 1-MHz offset is interpolated from phase noise measurements made for the offsets 600 kHz and 3 MHz. Looking throughout the tuning ranges of all the oscillator versions, it can be said that both FBAR oscillators perform considerably better than the reference LC oscillator in the sense of phase noise. The output spectrum of the single-ended FBAR oscillator is plotted in Fig. 14. Second and third harmonics have levels of 13.5 dB and 32 dB compared to the fundamental harmonic. , with lower values The harmonic levels depend on giving higher spectral purity.

Fig. 15. Frequency tuning performance of the single-ended FBAR VCO. TABLE II FBAR VCO MEASUREMENT RESULTS, V

=24V :

C. Frequency Tuning The single-ended FBAR VCO has a tuning range (see Fig. 15) of 37 MHz, or about 1.8%, with the control voltage varied from 0.9 to 2.95 V. To the authors’ knowledge, this is the largest tuning range reported for FBAR oscillators so far. The version with differential output has a total tuning range of 15 MHz, with the maximum used control voltage being 2.7 V.

It is thus clear that the solution proposed for realizing a larger tuning range than previously with a narrow-band FBAR works. Although the wider tuning range comes at some cost on phase noise, the reduction in available frequency tuning is no longer


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TABLE III COMPARISON WITH STATE-OF-THE-ART FBAR OSCILLATORS

as drastic as it is in traditional high- VCO circuits. The performance metrics of the tunable FBAR oscillators are collected in Table II, accompanied by the measurement results of the LC oscillator for comparison. A brief comparison between the present work and previously reported FBAR oscillators for RF purposes is shown in Table III. To facilitate the comparison, a commonly used figure of merit stands for phase noise at a (7) is employed. The term , and is the center frequency of the oscillator. given offset (7) Comparisons between oscillators are always difficult to make, though, and in this case, the important feature of frequency tunability in some FBAR oscillators is not taken into account. Compared to previous publications, the main contribution of the present study is the enlarged frequency tuning range. VI. CONCLUSION Integrating high- devices and implementing frequency tuning in oscillators that utilize high- resonators have traditionally been difficult problems. Recently, it has become possible to connect FBARs on top of monolithic circuits, thus taking care of the problem of integratability to some degree. The oscillator presented in this paper has the FBAR mounted on top of the IC, thus avoiding effects that are caused by bondwiring the FBAR to the IC. The mechanism employed in the present oscillator also overcomes some of the problems with tuning. The experimental 2.1-GHz single-ended oscillator achieved a best phase noise of 144.1 dBc/Hz at an offset of 1 MHz from the carrier, and the tuning range of the circuit is about 37 MHz, or 1.8%. The achieved frequency tuning range is considerably larger than for any FBAR oscillator previously reported, and although it is still comparatively small and comes at the cost of changing phase noise performance, it can be successfully exploited in applications such as GPS. The obtained results also suggest that FBAR oscillator circuits with reasonably large frequency tuning ranges can successfully be made. Attaining this goal will require significant further research and development in order to find the most suitable circuit architectures and techniques. ACKNOWLEDGMENT The VCO circuits were fabricated by ST Microelectronics, with the FBAR and the post-processing for above-IC purposes

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Q

Kim B. Östman received the M.Sc. degree in communications engineering from Tampere University of Technology, Finland, in 2005. His thesis work was focused on FBAR oscillator design. He has been a research assistant or researcher with the RF-ASIC Design Group at the Institute of Communications Engineering, Tampere University of Technology, since 2002. His main research interests in this field currently include high- VCOs.

Q

Sami T. Sipilä (S’05) received the M.Sc. degree in telecommunications from Tampere University of Technology, Finland, in 1998. He joined VLSI Solution, Tampere, Finland, in 1995, and was engaged in RF, analog and mixed-signal circuit research and design until 2000. Since 2003, he has been pursuing the Ph.D. degree in the RF-ASIC Design Group at the Institute of Communications Engineering, Tampere University of Technology. His research interests include low-noise amplifiers, VCOs, mixers and high-speed dividers.

Ivan S. Uzunov (M’98) received electrical engineering and Ph.D. degrees from the Technical University of Sofia, Bulgaria, in 1970 and 1977, respectively. From 1970 to 1980, he was a Researcher at the Technical University of Sofia, working in the fields of active RC filters design and computer-aided design of analog circuits. From 1980 to 1985, he was with the Institution of Radioelectronics in Sofia and from 1985 to 1990, he was with the Institution of Communication Industry in Sofia. In both institutions, he worked on the design of filters and other electronic circuits for communication equipment, computer programs for filter synthesis, and design of test equipment for communication industry. Between 1991 and 2000, he was with SmartCom Ltd., Sofia, and a part-time Lecturer on computer-aided design and digital signal processing at the Technical University of Sofia. Since 2001, he is a Senior Researcher at Tampere University of Technology, Finland, working on RF analog integrated circuits design. His scientific interests include circuit theory, analog and digital filters, computer simulation of analog circuits, and RF analog circuits. He is an author or co-author of more than 60 scientific papers and two books in Bulgarian, English, and Russian.

Nikolay T. Tchamov received the M.S. and Ph.D. degrees in electronics from the Technical University of Sofia, Bulgaria, in 1976 and 1980, respectively. He is a Professor with the Department of Information Technology of Tampere University of Technology, Finland, where in 1996 he established and now leads the RF-ASIC M.Sc./Ph.D. Education, Design and Measurement Laboratory of the Institute of Communications Engineering. Previously he held positions of Associate Professor at Technical University of Sofia, Bulgaria, Researcher at Tokyo Institute of Technology, and later, at the Central European Laboratory of Particle Physics in Geneva, and at Bell Laboratories in New Jersey, as well as consulted for several RF-ASIC design and manufacturing companies in Europe and USA. He has authored several publications and books and has been awarded 53 patents in the area of RF ICs, and has advised 36 M.S. students and currently 5 Ph.D. students in the field of RF and mixed-signal IC design for mobile communications.