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50-nm T-Gate Metamorphic GaAs HEMTs With fT of 440 GHz and Noise Figure of 0.7 dB at 26 GHz K. Elgaid, H. McLelland, M. Holland, D. A. J. Moran, C. R. Stanley, and I. G. Thayne
Abstract—GaAs-based transistors with the highest T and lowest noise figure reported to date are presented in this letter. A 50-nm T-gate In0 52 Al0 48 As/In0 53 Ga0 47 As Metamorphic high-electron mobility transistors (mHEMTs) on a GaAs substrate show of 440 GHz, max of 400 GHz, a minimum noise figure of 0.7 dB and an associated gain of 13 dB at 26 GHz, the latter at a of 950 mS/mm. In addition, drain current of 185 mA/mm and a noise figure of below 1.2 dB with 10.5 dB or higher associated gain at 26 GHz was demonstrated for drain currents in the range 40 to 470 mA/mm at a drain bias of 0.8 V. These devices are ideal for low noise and medium power applications at millimeter-wave frequencies. Index Terms—High-electron mobility transistor (HEMT), low noise, metamorphic, metamorphic high-electron mobility transistor (mHEMT), millimeter-wave imaging, nanometer gates, short gate. Fig. 1. Double-delta-doped In a GaAs substrate.
I. INTRODUCTION
H
IGH indium concentration high-electron mobility transistors (mHEMTs) on GaAs substrates are an attractive transistor technology for millimeter-wave applications as they have the potential to combine the outstanding millimeter-wave gain and low noise performance of InP-based HEMTs [1]–[3] with the advantages of economies of scale and robustness offered by conventional GaAs processing [4]–[7]. In this work, we show 50-nm T-gate GaAs mHEMTs with the highest of any GaAs-based three terminal device reported to date. Further, these devices have the lowest noise figure reported for any 50-nm gate length HEMT technology. These results clearly indicate the potential of aggressively scaled 50-nm length GaAs mHEMTs as viable candidates for array-based millimeter-wave imaging and sensing applications where low chip cost will be an important driver in determining application adoption. II. DEVICE REALIZATION The double delta-doped In Al As/In Ga As metamorphic HEMT structure on a GaAs substrate scaled for 50-nm gate length devices is shown in Fig. 1. The double delta doped strategy was used to increase drive current, reduce access resistance and enhance linearity [8]. The 1200-nm metamorphic buffer graded linearly from GaAs to In Ga As
Manuscript received July 7, 2005; revised August 17, 2005. The review of this letter was arranged by Editor T. Mizutani. The authors are with the Nanoelectronics Research Center, Department of Electronics and Electrical Engineering, University of Glasgow, Glasgow G12 8LT, U.K. (e-mail:
[email protected]. Digital Object Identifier 10.1109/LED.2005.857716
Al
As/In
Ga
As Metamorphic on
and followed by a 72-nm-thick In Al As/In Ga As superlattice prior to the growth of the device layers. After selective cap removal using a succinic-acid-based wet etch, room-temperature Hall mobility measurements yielded cm typical electron sheet charge density of and a mobility of 6470 cm /Vs at room temperature. The relatively low value of mobility is most probably due to the double delta-doping strategy which increases ionized impurity scattering, however this does not compromise either dc of RF device performance, as shown below. The device process flow begins with mesa isolation using an orthophosphoric acid/hydrogen peroxide/water (1:1:100)-based wet chemical etch. An isolation current of less than 200 pA/mm nm at 2 V was routinely obtained for an etch depth of (determined by atomic force microscopy), indicating high quality molecular-beam epitaxy growth of the mHEMT virtual substrate. Ohmic contact resistances as low as 0.06 mm were obtained using an annealed 150-nm-thick Au:Ge:Ni based metallization. Devices were realized using a 1.5- m source drain separation between which 50-nm gate length T-gates were aligned using a Leica EBPG5-HR 100 electron beam lithography tool operating at 100 keV and a UVIII/LOR/PMMA resist stack [9]. A pH5.5 selective succinic acid: ammonia hydrogen peroxide: water wet chemical etch was used to form the gate recess, prior to the deposition of 200-nm-thick Ti:Pt:Au gate metallization. A photograph of the completed device is shown in the inset of Fig. 5. Fig. 2 shows a scanning electron microscope (SEM) image of the unpassivated 50-nm T-gate profile after metallization
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ELGAID et al.: 50-nm T-GATE METAMORPHIC GaAs HEMTS
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Fig. 4. Transfer characteristics of a two-finger 50-m gate width, 50-nm gate length T-gate m-HEMT, a peak transconductance (g ) of 1028 mS/mm was obtained, V measured from 1 to 0.3 V in 0:1-V steps.
0
Fig. 2. Cross-sectional SEM of a 50-nm T-gate profile after metallization and liftoff.
Fig. 3. Output characteristics of a two-finger 50-m gate width, 50-nm gate length T-gate m-HEMT showing I of 815 mA/mm. Gate leakage current of less than 20 A/mm is observed across the operating range of the device V up to 1.0 V and V from 0 V to 1:0 V in 0:1-V steps.
0
0
and liftoff. Finally, 50- coplanar waveguide bondpads were defined to enable on-wafer characterization of the completed devices. III. DEVICE PERFORMANCE DC and RF characterization was performed using a probe station and on wafer RF probes from Cascade MicroTech. Typical dc output and transfer characteristics of a 2 50 m wide device are shown in Figs. 3 and 4, respectively. of more than The dc performance metrics include V( of 800 mA/mm achieved at a drain bias, 930 mA/mm was obtained), pinchoff voltage of V, gate leakage current of less than 20 A/mm (Fig. 3), peak extrinsic of greater than 800 mS/mm for gate dc transconductance to V (Fig. 4). biases in the range On-wafer S-parameter measurements were performed from 0.04 to 60 GHz, using an Anritsu 360 B Vector Network Analyzer and on-wafer RF probes from Cascade MicroTech. Calibration was performed using a Cascade Microtech Impedance
Fig. 5. RF performance of a two-finger 50-m gate width with a 50 nm of gate length T-gate m-HEMT, the device showed f of 440 GHz and f 400 GHz. Inset shows diagram of the device and the definition of measurement reference planes for determination of f and f . Insert, measurement reference planes at the probe tips M1 and M2. To de-embed the influence of the coplanar waveguide feedlines from the S-parameter measurements and thereby shift the measurement reference planes to the active device T1 and T2.
Standard Substrate (ISS) and the LRRM technique which placed the measurement reference planes at the probe tips M1 and M2 (see inset of Fig. 5). To de-embed the influence of the coplanar waveguide feedlines from the S-parameter measurements and thereby shift the measurement reference planes to the active device T1 and T2 (see inset of Fig. 5), the measured S-parameters were fitted to a standard lumped element equivalent circuit model including CPW transmission lines at the input and output. This modeling yielded CPW line lengths of 230 m and 230 m at the device input and output respectively—In line with the physical geometry of the device. Following this de-embedding and were determined from the measured procedure, S-parameters. Fig. 5 shows the results of this analysis, yielding of 440 GHz and of 400 GHz—To our knowledge, an the highest value reported to date for a GaAs-based three terminal device (previous best is 340 GHz [10]), and the highest reported for 50 nm and shorter gate length transistor (previous best is 330 GHz [11]).
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associated gain greater than 10.5 dB at 26 GHz was demonfrom 40 to 470 mA/mm. strated across a wide range of We believe this noise data is world leading for a GaAs-based transistor technology. These dc and RF performance metrics makes the technology ideally suited for both low noise and medium power millimeter-wave monolithic microwave integrated circuits applications. REFERENCES
Fig. 6. Minimum noise figure and associated gain as function of drain current densityI (mA/mm) at 26 GHz of a two-finger 50-m gate width 50-nm gate length T-gate m-HEMT biased at V = 0:8 V. The device showed less than 1.19-dB noise parameter and associated gain of higher than 10.5 dB at 26 GHz across a drain current range from 40 to 470 mA/mm.
The minimum noise figure and associated gain of 2 50- mwide devices were characterized using HP8510C Vector Network Analyzer, Agilent N4002A 26-GHz noise source and 2–26-GHz ATN NP5B Noise Parameter System. Fig. 6 shows the minimum noise figure and associated gain at 26 GHz with V as a function of drain current applied drain bias from 40 to 470 mA/mm. Across this bias range, the devices showed minimum noise figure of less than 1.19 dB and associated gain of greater than 10.5 dB, with best performance of 0.7 dB minimum noise figure and 13.5 dB gain at drain current of 185 mA/mm. This performance arises from the aggressive scaling of the device vertical architecture which results in low access resistance, large drain current and high transconductance across a wide range of gate bias ranges (as shown in Fig. 4). We believe this noise data is world leading for a GaAs-based transistor technology. IV. CONCLUSION In this letter, we reported the performance of 50-nm T-gate In Al As/In Ga As mHEMTs with excellent dc of 815 mA/mm and of and RF characteristics. At dc, 1028 mS/mm were achieved. At RF, the devices exhibit and 440 and 400 GHz respectively, to our knowledge the highest to date for any GaAs-based three terminal device. In addition, the devices have minimum noise figure of 0.7 dB and associated gain of 13 dB at 26 GHz, at drain current of 185 mA/mm. A minimum noise figure of less than 1.19 dB and
[1] R. Lai, M. Barsky, R. Grundbacher, L. Tran, T. Block, T. P. Chin, V. Medvedev, E. Sabin, H. Rogers, P. H. Liu, Y. C. Chen, R. Tsai, and D. Streit, “0.1 m InGaAs/InAlAs/InP HEMT production process for MMW applications from 2–200 GHz,” presented at the Int. Conf. Gallium-Arsenide Manufacturing Technology, May 1999. [2] K. H. G. Duh, P. C. Chao, S. M. J. Liu, P. Ho, M. Y. Kao, and J. M. Ballingall, “A super low-noise 0.1 m T-gate InAlAs-InGaAs-InP HEMT,” IEEE Microw. Guided Wave Lett., vol. 1, no. 5, pp. 114–116, May 1991. [3] K. Shinohara, Y. Yamashita, A. Endoh, T. Mimra, T. Matsui, and S. Hiyamizu, “Ültrahigh-Speed pseudomorphic InGaAs/InAlAs HEMT with 400 GHz cutoff frequency,” IEEE Electron Device Lett., vol. 22, no. 6, p. 507, Jun. 2001. [4] Y. C. Chang, E. Y. Chang, H. C. Chu, L. H. Huang, G. W. Lee, H. M. Lee, C. S. Chen, S. H. Shen, P. T. Chang, and C. Y. Lien, “Low-noise metamorphic HEMTs with reflowed 0.1 m T-gate,” IEEE Electron Device Lett., vol. 25, no. 6, pp. 348–350, Jun. 2004. [5] A. Leuther, A. Tessmann, M. Dammann, W. Reinert, M. Schlechtweg, M. Mikulla, M. Walther, and G. Weimann, “70-nm low-noise metamorphic HEMT technology on 4 inch GaAs wafers,” in Proc. Int. Conf. Indium Phosphide and Related Materials, May 2003, pp. 215–218. [6] C. S. Whelan, W. F. Hoke, R. A. McTaggart, M. Lardizabal, P. S. Lyman, P. F. Marsh, and T. E. Kazior, “Low noise (AlGa) As/In Ga As metamorphic HEMT on GaAs In substrate with 850 mW/mm output power density,” IEEE Electron Device Lett., vol. 21, no. 1, pp. 5–8, Jan. 2000. [7] H. S. Yoon, J. H. Lee, J. Y. Shim, J. Y. Hong, D. M. Kang, W. J. Chang, H. C. Kim, and K. I. Cho, “0.15 m gate length InAlAs/InGaAs power metamorphic HEMT on GaAs substrate with extremely low noise characteristics,” presented at the Int. Conf. Indium Phosphide and Related Materials, May 2003, pp. 114–117. [8] D. A. J. Moran, E. Boyd, K. Elgaid, H. McLelland, C. R. Stanley, and I. G. Thayne, “50 nm T-Gate lattice matched InP-HEMTs with f of 430 GHz using a nonannealed ohmic contact process,” in Proc. 12th Gallium Arsenide and Other Compound Semiconductors Application Symp., Amsterdam, The Netherlands, Oct. 11–12, 2004, pp. 311–314. [9] Y. Chen, D. Macintyre, X. Cao, E. Boyd, D. Moran, H. McLelland, C. Stanley, I. Thayne, and S. Thoms, “The fabrication of ultra short T-gates using a PMMA/LOR/UVIII resist stack,” presented at the 47th Int. Conf. Electron, Ion, and Photon Beam Technology and Nanofabrication, Tampa, FL, May 2003. [10] A. Leuther, R. Weber, M. Dammann, M. Schlechtweg, M. Mikulla, M. Walther, and G. Weimann, “Metamorphic 50 nm InAs-Channel HEMT,” in Proc. Int. Conf. Indium Phosphide and Related Materials, May 2005, pp. 129–132. [11] Y. Yamashita, A. Endoh, K. Shinohara, K. Hikosaka, T. Matsui, S. Hiyamizu, and T. Mimura, “Pseudomorphic In0:52Al0:48As/ In0:7Ga0:3As HEMTs with an ultrahigh fT of 562 GHz,” IEEE Electron Device Lett., vol. 23, no. 10, pp. 573–575, Oct. 2002.
