Proceedings of the 34th Chinese Control Conference July 28-30, 2015, Hangzhou, China
On Realization of Signal Processing Based on Tracking-Differentiator for Maglev Train DOU Fengshan, WANG Zhiqiang, HE Hongli, LONG Zhiqiang School of M echanics Engineering and Automation, National University of Defense Technology , Changsha 410073 E-mail:
[email protected] Abstract: The tracking-differentiator algorithm is adopted in the position and speed detection system and suspension system of maglev train to solve the practical problems of signal processing. The realization of signal processing based on tracking-differentiator in Field Programmable Gate Array (FPGA) is studied. In this paper, the tracking- differentiator algorithm is described with Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) and the calculation process is introduced. M eanwhile, the tracking-differentiator algorithm is simulated in M ATLAB-M odelsim, and tested in the experiment. The simulation and experiment results illustrate that it is feasible to achieve the signal processing based on tracking-differentiator in FPGA. Key Words: M aglev Train, Signal Processing, Tracking-Differentiator, FPGA Realization
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capabilities, and powerful re-configurability as well as
Introduction
scalability. In this paper, the signal processing based on
In the system of hybrid maglev train based on
tracking-differentiator is realized in the signal processing
synchronous traction of long stator, the suspension is
platform of FPGA with VHDL.
achieved by electromagnetic suction, and the operation is
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controlled by synchronous traction of long stator on the
VHDL Description
ground. In the position and speed detection system, the
A discrete second-order nonlinear tracking- differentiator
output signal will be abnormal when the relative position
based on boundary characteristic curves is proposed in
detection sensors pass through the joint of stator, which will
literature [4], which can quickly track the input signal, and has
increase the difficulty of position and speed detection, and
no flatter and overshoot. Meanwhile, the algorithm is more
[1, 2, 3]
concise compared to the tracking-differentiator proposed by
affect the regular operation
. In the suspension system,
Han Jingqing.
the accelerometer is adopted in the gap sensor, and the noise jamming will be occurred for the presence of electromagnetic
This type of differentiator is easy to be realized in FPGA for
interference and the effect of error transmission in the
its no radical sign, logarithm, power in the calculation process,
process of signal transmission, which will affect the control
which are difficult to be achieved in hardware. The discrete form of tracking-differentiator is:
performance of the system seriously.
° x1 (k 1) x1(k ) hx2 (k ) ® ° ¯ x2 (k 1) x2(k ) hu (k ) ( u d r )
Numerous studies show that tracking-differentiator can not only extract differential signal accurately, but also has a strong filter capability. It is widely applied to the field of Wherein
maglev train, and there have done a thorough research on the application of tracking- differentiator in the position and
(1)
x1 , x2 are the state variables, u is the control
h is the discrete step, r is the value range of u , and u is the function of x1 , x2 , h , r , which can be
function,
speed detection system as well as suspension system of maglev train in literatures [4, 5, 6]. It is necessary to have a research on the realization of signal processing based on tracking-differentiator to make
written as:
u
fxie( x1 , x2 , r , h)
(2)
signal processing algorithms be applied to the system of maglev train actually. FPGA has been widely used in the field
The control function can be selected through the method
of digital signal processing for its strong parallel computing
of variable substitution in the case of a given signal v(t ) :
u
*
T his work is supported by National Key T echnology R&D Program of China under Grant 2013BAG19B01
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fxie( x1 v, x2 , r , c0 h)
(3)
Then,
x1 o v x2 | x1c
State S3: Saving the current state. The value of the updated
vc can be realized by adjusting
the parameter r and value of
state is assigned to x1
c0 properly, and the tracking
as a basis for the next iteration to obtain the value of the next
filtering and differential extraction of the input signal will be realized with the output of
and x2 to store the current state, and
time.
x1 , x2 .
Under the control of the clock, the state S1, S2 and S3 cycle. The output signal will be obtained
Discrete tracking-differentiator algorithm is essentially an
with the iterative
calculation by collecting input signal continuously.
iterative process, and there is a context between these iterative formulas. The context on the timing cannot be
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reflected just listing formulas for VHDL is carried out in
Simulation Analysis
parallel computing. In view of the design of Finite State
3.1
Machine (FSM), the calculation process is divided into
MATLAB-Modelsim combines powerful simulation capabilities of Modelsim and rich data processing means of MATLAB, the process of simulation is shown in Fig. 2.
three parts, and every part is defined as a state. Under the control of the clock, the calculation process cycles among
Simulation Process
the three states, as shown in Fig. 1.
Data_generator.m
Generate Given Signal
Input
Read Data
Filter.vhd
Data Processing
Data_out.m
Save Data
Read, Analyse, Dispose Data Filter_test.vht
S1: Calculating controlling function
Fig. 2: M ATLAB-M odelsim simulation process
3.2
Simulation Results
v is
S3: Saving the current state
a given input signal, in which the DC component, sinusoidal component, as well as white noise are included. The simulation results are shown in Fig. 3. It can be observed that the trend of the output and input signal is basically the same, and the noise in the signal is reduced significantly, which illustrates that the filtering algorithm with VHDL is effective.
S2: Updating state variables
Output
Fig. 1: Process of state cycle
In the iteration process, the current state is defined as
x1 , Input
x2 , the previous state is x10 , x20 , the input signal is v ,
clk . The current state is recognized by the rising edge of clk , and the corresponding calculation will the clock signal is
Output
be done according to the value of current state, meanwhile, the value of the next clock cycle will be given. State S1: Calculating control function. The value of the control function
ut is calculated based on the current Fig. 3: Simulation results of analog signal
state x2 . State S2: Updating state variables. according to the previous state
In order to observe the filtering effect better, M file is
x1 is obtained
written to read the input and output signals , which are stored
x10 , x20 . x2 is obtained
in text file, and an M-file program is written to have an
according to the previous state x20 , ut . In order to avoid
analysis on simulation results. Meanwhile, the tracking-
error being occurred in the process of integer division, both
differentiator algorithm is written in MATLAB to deal with the given signal, and then make a comparison with the
2
sides of the first equation multiplied by T , and both sides of
simulation results in Modelsim, which are under the same
the second equation multiplied by T . The desired filtered
excitation signal, as shown in Fig . 4. It can be seen that the
and differential output will be obtained by extracting the value of
filter of VHDL can track the useful component of given signal
x1 and x2 at the end of state updates.
well, and filter out the white noise of the signal. The result is
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slightly different compared with the result calculated in
results show that there is a slight difference in comparison
MATLAB, which is mainly due to the definition of the data
with the simulation results in MATLAB, but overall the error
type. The data type is integer, and it leads to loss of precision
is not great.
after the division. But overall, the relative error is in the range of tolerance.
1 Input Differential in MATLAB Differential in Modelsim
0.8 0.6
2700 Input Output in MATLAB Output in Modelsim
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0.4 amplitude
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amplitude
2550 2500
0.2 0 -0.2 -0.4
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-0.6
2400
-0.8
2350 2300
0.01
0.02
0.03 time/s
0.04
0.05
0.06
2250 2200
(a) 0-0.02s simulation results 0.01
0.02
0.03 time/s
0.04
0.05
0.06
Fig. 4 : Time-domain waveform of signal after filtering
Input Differential in MATLAB Differential in Modelsim
-0.3 -0.4
In order to analyze the filtering effect from the frequency domain, there is a frequency spectrum analysis on the input and output signals, the results are shown in Fig. 5. The frequency spectrum of the 0 to 4000Hz is shown in the left side, and the right side is a partially enlarged view of 0 to 100Hz. The results show that the design of the filter can preserve the DC component and the sinusoidal component of given signal well in the range of low frequency, and the attenuation of noise is more visible in the range of high frequency
amplitude
-0.5 -0.6 -0.7 -0.8 -0.9
0.02
0.022
0.024
0.026
0.028 time/s
0.03
0.032
0.034
0.036
(b) Enlarged effect 140
140
Fig. 6: Time-domain waveform of signal after differential
130
spectrum of input signal spectrum of input signal
120
spectrum of input signal spectrum of input signal
120
4
100 amplitude/dB.
110
Experiment Analysis
80
100
After the effectiveness of the algorithm is verified in
60
90
simulation, the algorithm is downloaded to signal test board
80
for testing. In order to generate a given waveform and noise
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easily, the input signal is generated inside the FPGA. The
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testing scheme of filter is as follows. First, write the program
40
20
0
0
1000
2000 3000 frequency/Hz
4000
50
0
50 frequency/Hz
of waveform generation, then, generate waveform in FPGA as
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input signal, which outputs through DA of one channel, and the filtered signal outputs through DA of another channel.
Fig. 5: Spectrum analysis after filtering
Meanwhile, acquire the two outputs of DA simultaneously, According to the previous simulation process, the
and observe the waveform of them in the oscilloscope.
simulation of differential is done. And then a comparison with
To observe the filtering effect, a sinusoidal input signal
the results calculated in MATLAB is made, as shown in Fig.
is given, in which irregular noise is included. The
6. A period of the simulation result is shown in Fig . 6 (a), in
experimental results show that the noise signal has been
which the phase of resultant differential output advances
eliminated after the processing of filtering, the sinusoidal
close to 90°, and the amplification to the noise of given signal
signal turns smooth, and the amplitude, frequency of the
is inconspicuous. Fig . 6 (b) is a partially enlarged effect. The
filtered output signal are similar to the input signal,
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filtered signal is around 4ms. The filtering capacity is
channel 1 is the given signal waveform, and channel 2 is the
enhanced as
filtered output waveform.
filtered signal enlarged.
c0 increased, while the phase delay of the
amplitude˄mv˅
amplitude˄mv˅
meanwhile, the phase lag is small, as shown in Fig. 7, which
time(ms)
time(ms)
Fig. 7: Filtering effect of sinusoidal input signal
(a) Filtering result when
c0
=5
To observe the differential effect, a sinusoidal signal is amplitude˄mv˅
given. Since there is no negative voltage output in DA, the DC offset is joined in the differential signal, so that the output signal of the DA will be observed conveniently. AS shown in Fig . 8, the output is sinusoidal, and the phase advances close to 90° compared to the input, and the noise of output is small, which Channel 1 is the given input signal, channel 2 is the
time(ms)
differential output signal. The results show that the designed
(b) Filtering result when c 0 = 10
amplitude˄mv˅
amplitude˄mv˅
differentiator can extract differential signal preferably.
time(ms)
time(ms)
(c) Filtering result when c 0 = 20
Fig. 8: Differential effect with sinusoidal input signal
Fig. 9: Filtering result when c0 at different values
To observe the effect of the filtering factor c0 , a sinusoidal signal with white noise which its amplitude is about 31.2% of
Conclusion In this paper, the realization of the signal processing based
the signal is given. The results are shown in Fig . 9, where c0
on tracking differentiator is studied. The algorithm is
is at different values, and channel 1 is the given signal with
described with VHDL, and the calculation process is
noise, channel 2 is the filtered output signal. When c0 = 5,
introduced. Meanwhile, the tracking-differentiator algorithm is simulated in MATLAB-Modelsim, the simulation results
the amplitude of noise is suppressed to about 50% of the
illustrate that the filtering algorithm with VHDL is effective.
original noise, the phase delay of the filtered signal is small. When
c0
After the effectiveness of the algorithm is verified, the
= 10, the amplitude of noise is further reduced,
experiment is carried out, and the results illustrate that signal
while the phase delay of the filtered signal becomes larger. When
c0
processing based on the tracking-differentiator can be well achieved in FPGA.
= 20, the filtered output is smooth, and the noise in
the signal can be well suppressed, but the phase delay of the
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Acknowledgements This work is supported by the National Key Technology R&D Program of the 12th Five-year Plan, Systematic Study on Engineering Integration of High Speed Maglev Transportation, 2013BAG19B01.
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