3. M. Pospieszalski, L. Nguen, M. Lui, âVery Low noise and. Low Power Operation of Cryogenic AlInAs/GaInAs/InP. HEMT'S â, 1994 MTTS, pp. 1345-1346. 4.
1
On the performance of Low noise, Low DC power Consumption Cryogenic Ampifiers I. Angelov1,N. Wadefalk1, J. Stenarson1, E. Kollberg1, P. Starski1, H. Zirath1,2 1-Department of Microwave Technology, Chalmers University, S-41296, Göteborg, Sweden 2. -Ericsson, Microwave system AB, S-4384, Mölndal, Sweden
Abstract
120
The performance of broadband, Low-Noise, Low DC consumption cryogenic amplifiers was studied in detail with emphasis to minimize the power consumption and optimize the amplifier performance at cryogenic temperature. A general approach used in the modeling and amplifier design can help to minimize the power consumption and optimize the performance of the amplifier. A noise temperature below 6K and 25 dB gain was experimentally obtained in the frequency range 4-8 GHz with total power consumption of 4 mW with commercial GaAs transistor.
M GF4419G
gm(mS)
100
80 60 gm300KVd=0.5V gm300KVd=1.0V gm300KVd=1.5V gm18KVd=0.5V gm18KVd=1V gm18KVd=1.5V
40 20 0 -0.6
-0.4
-0.2
0
0.2
0.4
Vgs(V)
Fig. 2 Gm vs. Vgs for GaAs FET MGF4419G 140
Device modeling InP devices are known for their very good noise parameters and low DC power consumption, but in recent years GaAs have improved their parameters and especially the metamorphic InAlAsGaAs on GaAs substrate improved very much [16]. 60
InP 50
gm(ms)
40
30
20 gm300K,Vd=1.5V gm300K,Vd=1.0V gm300K,Vd=0.5V gm18K,Vd=0.5V gm18K, Vd=1.0V gm18K,Vd=1.5V
10
0 -0.6
-0.4
-0.2
0
Vgs(V)
0.2
0.4
Fig. 1. Gm vs. Vgs. for InP transistor
M GF4419G 120 100
gm(mS)
Introduction In recent years the performance of microwave GaAs and InP transistors improved significantly and many successful designs with extremely good parameters have been reported [1-5]. This, together with the existence of simple and accurate models [6-13] improved the quality of the microwave cryogenic amplifiers and excellent results were achieved in recent years. For many different applications, such as deep space ones a very low DC power dissipation is one of the most important requirements in the system.
80 60 gm18K,Vd=0.2 gm18K,Vd=0.4 gm18K,Vd=0.6 gm18K,Vd=0.8 gm18K,Vd=1 gm18K,Vd=2
40 20 0 0
5
10
15
20
Pdc(mW )
Fig. 3. Gm vs. Pdc for GaAs FET MGF4419G DC and S-parameter of many GaAs and InP transistors were measured on wafer both at room temperature and cryogenic temperature. From these measurements we could extract the noise models[6-14] which were later used at cryogenic temperatures for the amplifier design. At low temperature the transconductance of both InP and GaAs transistors increase, Figs. 1, 2. Thus, very high transconductance can be obtained at low drain voltages and low dissipated power, Fig. 3. As it can be seen in Fig. 3, high transconductance can be reached with 2-3 mW dissipated DC power and drain voltages below Vds=0.8V.
2 0.025
500
InP
Rds:Vg=-0.1 Rds:Vg=0
0.0096
0.02
400
Vg=-08
M GF4419G 6GHz
Vg=-06 Vg=-04 Vg=-02 Vg=0
Ids(A)
300
0.01
200
Rds(ohm)
0.015
Y11
0.00832
0.00704
0.00576 0.005
100 Id:Vg=-0.1
0.00448
Id:Vg=0 0
0 0
0.5
1
Vds(V)
1.5
0
0.5
2
1
1.5
Vds(V)
Fig.7. Y11 for MGF4419G, F=6 GHz, Id=5mA
Fig. 4. Ids, Rds for InP transistor
70
0.0045 ft :Id=5mA
25
500 Rds:Vg=-0.3V Rds:Vg=-0.2V Rds:Vg=-0.1V
20
M GF4419G Id=5mA
0.004 400
0.0035
10
200
Y12
300
Vg=-0.6
0.003
Vg=-0.4 Vg=-0.2
0.0025
ft (GHz)
15
Rds(ohm)
Ids(mA)
65 Vg=-0.8
M GF4419G
60
Vg=0 IdVg=-0.3V
5
100
0.002
IdVg=-0.2V IdVg=-0.1V 0
0 0
0.5
Vds(V)
1
1.5
2
Fig. 5 Ids, Rds for MGF4419G
0.0015 -0.5
0
0.5
1
55 1.5
Vds(V)
Fig. 8. Y12, ft for MGF4419G, F=6 GHz, Id=5mA
Transconductance gm, Cgs ,Cgd and Rds depend strongly on the bias and the conventional simplified equation for ft Eq. 1a will predict ft with significant error. We have found Eq.1b to be more accurate [15]: ft =
gm 2π [Cgs + Cgd ] gm
(1a)
1 . (1b) 2π [Cgs + Cgd ] [1 + (Rs + Rd ) / Rds ] + C gd.gm .(Rs + Rd ) where: ft =
gm = I pk P 1. sech(P1. Vgs ) 2 tanh(αVds )(1 + λVds )(2)
gds = I pk (1 + tanh(ψ ))(α (1 + λ Vds )sech(α .Vds )2 + λ tanh(αVds ))
Fig.6. S-11 and Gopt at 15Kand 300K for MGF4419G.
Very low drain voltages Vds0.5 V the total gate capacitance is nearly constant (Y11), Fig. 7 , Y12 (Cgd) does not change very much, Fig. 8 and the intrinsic ft follows the gm dependence and reach maximum at drain voltages approximately equal to the knee voltage at which drain voltage is just sufficient to saturate the carrier velocity. In order to simultaneously optimize the noise performance and to minimize the DC power consumption the noise models computed from the large signal model can be used- all of the parameters needed to calculate the noise parameters and the dissipated power are available from the transistor model [6-12]. f ft rgs.Tg T min ≈ 2 gds.Td.rgs.Tg ;Ropt ≈ (3); f gds.Td ft
3
50
Id=5ma
Noise(T)
40 Vd=0.4 Vd=0.8 Vd=1 Vd=2
30
20
10
0
2
3
4
5
6
7
8
Frequency (GHz)
Fig. 9. Noise for MGF4419G at 18 K, Id=5mA 10 9
1400 Td(K) ft(Ghz)
8
1200
7
1000
Vd=0.8V
6
800
5
600
4
400
3
200
2
Td(K),ft[GHz]
Tmin [K], Rn[ohm]
1600
Tmin (K) Rn (ohm)
0 0
5
10
15
20
Ids(mA)
Fig. 10a. Tmin, Rn, Td, Ft for MGF4419G at 18 K. 6
1200 1000
Id=5mA 4
800
3
600
2
400
1 0
Td[K] ft[GHz]
Tmin (K) Rn (ohm)
0
0.5
1
1.5 Vds(V)
2
Td[K], ft(GHz)
Tmin (K), Rn(ohm)
5
200 0 2.5
Fig. 10b. Tmin, Rn, Td, Ft for MGF4419G at 18 K.
The noise temperature which can be obtained both at room and cryogenic temperature from the high quality low noise transistors is very low and is in the order of the accuracy of the conventional noise measurement system. Thus, in order to improve the accuracy of the noise measurements and validate the noise models both at room and cryogenic temperatures a special pre-matched circuit was designed. This pre-matched circuit includes the input matching network calculated from the extracted model, transistor bonded in the fixture and the necessary bias networks in order to stabilize the transistor at cryogenic
temperatures. In the study we used GaAs chip transistors MGF4419G and different InP transistors. Figs, 9,10 and Table1 show typical results -the main noise parameters and their bias dependence, obtained with this pre-matched fixture using MGF4419G. The noise temperature reaches minimum at drain current Ids=4÷5 mA, but the minimum noise resistance Rn is lower at higher drain voltages, because of the influence of capacitances Cgs, Cgd. Nevertheless, even at drain voltages Vds=0.5÷0.7V a Tmin below 5 K can be achieved with dissipated power of 2-3 mW per transistor. Ft does not change much at the drain voltages above Vds>0.5V and drain temperature Td increases as the drain current and drain voltage increase. As it can be seen from Figs. 10, 11 Td follows the Ids dependence vs. Vds and Vgs an this means that the same type of dependencies describing the Ids can be used to describe the Td dependence. By using this information it is possible to correct the noise models and design the cryogenic amplifier more precisely and to optimize the power dissipation and noise performance. Another issue is selecting the right device size so to obtain optimum input capacitance Cgs, high ft and low Rn and thus to make the matching networks rather simple in order to achieve broadband operation [12,13], because the noise performance depends linearly on ft(gm) and (Td and Tg)^0.5. These relations are general for all FETs. It is possible to operate the transistor at drain voltages as low as Vds= 0.5-0.7 V, minimizing the power consumption at which we still have rather high ft which is one of the key parameters influencing the minimum noise [6]. If this approach of combining the large signal with the noise model is followed, it is not necessary to make a special bias dependent noise models which is difficult and time consuming specially at cryogenic temperatures. In many circuit simulators the noise models are already associated with the large signal models and it is sufficient to calibrate the noise part of the model at several bias points. Amplifier Design The amplifier structure is shown in Fig. 11. In order to improve the input match and stability, and to facilitate the noise matching, an inductive feedback was used - a large bonding inductance at the sources. The amplifier performance is shown in Fig. 12. A gain of 24-25 dB and noise temperature 6-7 K was measured in the frequency range 4-8 GHz with total power dissipation of 4 mW with commercial transistors. Better results can be achieved using transistors with higher ft [16].
4
TL7 TL3 TL1 C1
S
TL4
TL5
Rb1 Cb1
Vg1
S
Rd2 TL12
TL11
TL9
_
TL10
_
Rb4
Cb4
Vd1 _
Out
C3
Q2
C2 Rd1 Rg2
Q1
In
TL8
TL6
TL2
Rb2 Cb2 Cb3 Rb3
_
_ _
_
_
Vd2
Vg2 _
_
Fig.11 2-stage amplifier schematic 30
T =19K B1=4mW,B2=8mW,B3=4.1mW
50
40
Gain B1
20
30
Gain B2 Gain B3 Noise B1
15
20
Noise (K)
Gain (dB)
25
Noise B2 Noise B3 10
10
5
0 4
5
6
7
8
Frequency (GHz)
Fig.12. Gain and Noise of the amplifier at 19K B1:Vd1=0.7V,Vd2=0.6V; B3:Vd1=1.5V, Vd2=1v; B2: Vd1=0.7V,Vd2=0.6V
Conclusions The performance of low noise transistors was studied at room and cryogenic temperatures with emphasis to minimize the power consumption and optimize the amplifier performance. Combining the Noise Models with the Large Signal Models can help to design low noise amplifiers with minimum power. A noise temperature below 6K and 25 dB gain (2stages) was experimentally obtained at ambient temperature T=18K in the frequency range 4-8 GHz with total DC power consumption of the amplifier Pdct=4 mW using GaAs transistor. This is close to the best-reported results with InP transistors. Acknowledgments The authors wish to acknowledge Swedish Space Corporation (SSC) for the financial support, Hewlett Packard and Compact Software for the donation of high frequency simulation software, Urban Frisk and. G. Florin (SSC) for their strong support of this work. The authors also acknowledge the valuable discussions and help of S. Weinreb and J. Fernandez from JPL and M. Pospieszalski from NRAO.
References: 1. S. Weinreb, M. Pospieszalski and R. Norrod” Cryogenic Hemt Low noise receivers for 1.3-43 GHz range”, 1988 MTTS, pp. 945-950. 2. M. Pospieszalski, W. Lacatosh, R. Lai, K. Tan, D.C Streit” Millimeter wave Cryogenically coolable amplifiers using AlInAs/GaInAs/InP HEMT’s”, 1993 MTTS, pp. 515-518. 3. M. Pospieszalski, L. Nguen, M. Lui, ”Very Low noise and Low Power Operation of Cryogenic AlInAs/GaInAs/InP HEMT’S ”, 1994 MTTS, pp. 1345-1346. 4.R. Lai, … ”An ultra-low noise cryogenic Ka-band AlInAs/GaInAs/InP HEMT front-end receiver ”IEEE Microwave and Guided Wave Letters, Vol. 4. pp. 329-331, Oct. 1999. 5. I. L. Fernandez, J. D. Gallego, O. Homan ” Low noise Cryogenic X-band Amplifier Using Wet-Etched Hydrogen Passivated InP HEMT Devices”, IEEE Microwave and Guided Wave Letters, Vol. 9. N.10, Oct. 1999. 6. M. Pospieszalski, ”Modeling of noise parameters of MESFET’s and MODFET’S and their frequency and temperature dependence””, IEEE Trans. Microwave Theory Tech., Vol. 37, pp. 1340-1350, Sept. 1989. 7. Fukui, “Optimal Noise Figure of Microwave GaAs MESFET’s” IEEE Trans. Electron Devices, Vol. ED-26, pp. 1032-1037, July 1979. 8.R. Pucel, H. Haus, H. Statz, “Signal and Noise Properties of GaAs Microwave FET” in Advances in Electronics and Electron Physics, Vol. 38, New York, Academic Press. 1975. 9. A. Cappy, ”Noise Modeling and Measurement Techniques”, IEEE Trans. Microwave Theory Tech., Vol. 36, pp. 1-10, Jan. 1988. 10. A. Cappy, W. Heinrich ”High-Frequency FET Noise Performance: A New Approach, IEEE Trans. Electron Dev., Vol. 36. No 2, Feb. 1989, pp. 403-409. 11. B. Hughes, ”A Temperature Noise Model for Extrinsic FET’S”, IEEE Trans. Microwave Theory Tech., Vol. 40, pp. 1821-1832, Sept. 1992. 12. B. Hughes, ”Designing FET’S for Broad Noise Circles”, IEEE Trans. Microwave Theory Tech., Vol. 41, pp. 190-198, Feb. 1993. 13. D. Scherrer. at all “Optimal Noise Match of 0.25 Micron Gate GaAs MESFET’s for Low Power Personal Commutations Receiver Circuit Design”, 1994 MTTS, pp. 1439-1440. 14. M. Garcia, J. Stenarson… “A New Extraction Method for the Two-Parameter FET Temperature Noise Model”, IEEE Trans. Microwave Theory Tech., Vol. 46,N 11, pp. 1679, 1998. 15. P. Tasker, B. Hughes ”Importance of Source and Drain Resistance to the Maximum ft of Millimeter-Wave ModFets, IEEE EDL, Vol. 10, N7, pp. 291-293. 16. D. C. Dumka, W. E. Hoke, “Metamorphic InAlAs/InGaAs Hemts on GaAs substrate with Ft over 200 GHz”, Electronic Letters, Vol. 35, N21,14 Oct.1999, pp. 1854-1855.
Table 1. MGF4419G Vds=0.4V
Gm ms
Gd ms
Tm [K] 8GHz
Gopt 8GHz
T=300K Id=10mA
89.4
12
35.4
50.2+j101
T=15K Id=5mA
83.6
9
4.5
Vds=1V
Gm ms
Gd ms
T=300K Id=10mA T=15K Id=5mA
89.0 85.8
Rn 8GHz
Td K
Ri
15.2
2100
2
20.2+j100
3.85
870
1.9
Tm[K] 8GHz
Gopt 8GHz
Rn 8GHz
Td K
Ri
7.4
30.2
57.2+j105
12.8
2750
1.8
6.4
3.7
23.4+j104
3.1
1000
1.8
Ω
Ω
