Partial EBG Power Distribution Network using Remants of Signal Layers in Multi-layer PCB Junho Lee, Youngwon Kim*, Eakhwan Song*, and Joungho Kim* Advanced Design Team, Hynix Semiconductor Inc. Icheon-si, Kyoungki-do, South Korea Email:
[email protected] *Terahertz Interconnection & Package Laboratory KAIST, Division of EE and CS Daejon, South Korea E-mail:
[email protected] In this paper, we first propose a partial EBG PDN using the remnants of the signal layer in a multilayer PCB. We adopt a signal trace that transits its reference plane in a four-layer PCB and investigate signal integrity issues and power noise mitigation. The proposed method, which employs remnants of the signal layer to embody a partial EBG PDN, is then compared with a conventional ground filling method, which fills the remnants with ground, and with a typical four-layer stack-up PCB, which has no ground filling.
Abstract—In this paper, design and efficiency verification of a partial electromagnetic band-gap (EBG) power distribution network (PDN) using remnants of the signal layer in a multilayer printed circuit board (PCB) are presented. A partial EBG PDN is embodied in a conventional four-layer stack-up PCB without any additional layer, and the efficiency of the proposed method on signal transmission quality improvement and power plane noise mitigation is investigated experimentally. It is shown that the proposed method provides an improved signal return current path, resulting in better signal transmission quality and higher signal noise margin than conventional methods. In addition, the method enables lower power noise generation and better noise isolation.
II.
Frequently, signal traces transit from the top to a different layer because of the restricted routing area on the componentmounting layer in multilayered PCBs. An example of reference plane transition in a four-layer PCB is shown in Figure 1. A signal trace is routed from the top to the bottom layer, connecting the driver and receiver chips. The trace routed on the top layer references the ground plane, and the trace routed on the bottom layer references the power plane. Thus, the return current path is formed between the power and ground planes with respect to high frequencies. Therefore, the impedance of the return current path discontinuity is equal to the impedance between the power and ground at the transition point (PDN input impedance, Z11), and the transition impedance is determined by the power-ground resonance. Figure 2 represents the equivalent circuit model of the signal trace shown in Figure 1. Transmission models represent signal traces on the top and bottom layers, referencing the ground and power planes respectively, and the signal via model and the impedance box (Zin) represent discontinuity by the signal via. Here, Zin is equal to the input impedance of the PDN at the signal via location. Figure 3 shows a typical input impedance of a PDN, which contains high impedance peaks generated by power-ground cavity mode resonances.
Keywords-EBG, Power Distribution Network, Signal Integrity, Power Noise, Reference Transition
I. INTRODUCTION In high-speed digital systems that deal with signal bandwidth over a few Gbps, a guaranteed low-loss and wellmatched signal path for multi-Gbps data signaling is strongly required. In particular, a return current path for high-speed signals is among the key considerations for signal quality of multi-Gbps data. However, in a multilayer printed circuit board (PCB), the return current path is no longer guaranteed for signals that transit its reference plane, since the return current discontinuity, which is generated by signal via, affects signal transmission and becomes a major source of signal degradation. This phenomenon results from the power-ground cavity resonance in multilayer PCBs [1]. There have been several reports on the electrical behavior of multilayer power distribution networks (PDNs) in the high frequency range, and they assert that a PDN behaves like a cavity at high frequency, controlling the PDN impedance [2–4]. On the other hand, a PDN using electromagnetic band-gap (EBG) structures has been proposed to function as a planar band-stop filter that blocks the RF noise currents throughout the power-ground planes. These structures have proved very effective in power-ground cavity noise suppression [5–7].
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TEST VEHICLE DESCRIPTION
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connected to the power layer by vias. The ground filled area on the signal layer is connected to the ground layer by ground vias.
Ground Plane Reference Driver
Signal Current Flow
Layer 1 (Signal) Layer 2 (Ground)
Power noise measurement port Signal Via
P/G Cavity
Signal Input Port
Layer 3 (Power)
Return Current Flow Power Plane Reference
Receiver
Figure 1. Return current path discontinuity of a signal trace which transits its reference plane in a four layer PCB. Via Model
Driver
Vs
ZS
Groundreferenced signal trace
Signal Output Port
Microstrip on Bottom Layer Microstrip on Top Layer
Receiver Powerreferenced signal trace
Ground filling area on top layer
100mm
Layer 4 (Signal)
Signal Via
100mm
ZL
Figure 3. Top view of test vehicle
Zin Reference Transition Impedance
100µm
Microstrip on top layer
Figure 2. An equivalent circuit model of the signal trace shown in Figure 1.
Ground Layer
100µm
600µm
The signal propagation is greatly affected by the transition impedance (Zin) and parasitics of the via itself at the transition point. In particular, at frequencies at which the signal meets high PDN input impedance, the return current path for that signal has a larger discontinuity, blocking the return current and resulting in more signal reflections and higher cavity noise generation within the PDN.
Power Layer Microstrip on bottom layer
III.
(a)
TEST VEHICLE DESCRIPTION Microstrip on top layer
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A. Test Vehicle Structure Three types of test vehicles were fabricated, with no ground filling (NF), with ground filling (GF), and with EBG filling (EF). The test vehicles consisted of four conducting layers (0.5 oz): two for the signal layers (top and bottom layers), one for the ground layer, and one for the power layer. FR4 (εr = 4.3, t = 100 µm, 600 µm, and 100 µm respectively) was used as the dielectric material. The top view of the test vehicles is shown in Figure 3. The overall dimensions of the test vehicles were 10 cm × 10 cm, and the dimensions of the ground filling area were 3 cm × 4 cm. The EF has a 3 × 4 array of 1 cm EBG cells surrounding the signal via. Figure 4 shows the cross-sectional structure and layer stacking of the test vehicles. Figure 4(a) represents typical layer stacking without ground filling on the signal layer (NF), Figure 4(b) shows conventional ground filling on the signal layer, and Figure 4(c) depicts EBG structures using the ground filling area on the signal layer. EBG structures are patterned on the ground layer and are
Ground filling on signal layer Ground connection vias
100µm
600µm
Ground Layer
Power Layer
Microstrip on bottom layer
(b)
44
100µm
Microstrip on top layer
30
Ground filling on signal layer
20 10
Z21 [dB Ω]
Ground connection via
600µm
Ground Layer EBG structures patterned on ground layer
0
bandgap
-10 -20
NF (no filling)
-30
GF (ground filling) EF (EBG filling)
-40
100µm
0.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Frequency [GHz]
Power Layer
(b)
Figure 5. Input and transfer impedances comparison between test vehicles. (a) Input impedance (Z11) at signal via location. (b) Transfer impedance (Z21) from signal via location to power noise measurement port.
Microstrip on bottom layer
(c)
Figure 4. Cross-sectional view of test boards: (a) NF: no ground filling, (b) GF: conventional ground filling, and (c) EF: partial EBG PDN using ground filling area
IV.
B. Test Vehicle Characteristic Figure 5 shows impedance curves of the test vehicles measured with the vector network analyzer (VNA, Agilent PNA-L) up to 5 GHz. The input (Z11) and transfer (Z21) impedances of the PDN were taken at the signal via location and at the power noise measurement point. Figure 5(a) shows input impedances at the signal via location, and Figure 5(b) shows transfer impedances from the signal via location to the power noise measurement port. The dotted, dashed, and solid lines represent the impedance curves of the test vehicles with no ground filling (NF), with ground filling (GF), and with EBG structures (EF), respectively. Several high impedance peaks, which are generated by the power-ground cavity modes, are observed from both impedance curves. From the transfer impedance curve taken from the EF, the band-gap appears to be from 1.3 GHz to 4 GHz, and the high impedance peaks due to the resonance modes disappear in the self-impedance curve. This will provide reduced noise generation and improved noise isolation since the input impedance of a PDN is closely related to its power noise generation, and its transfer impedance is closely related to the isolation of the generated power-ground cavity noise.
EXPERIMENTAL RESULTS AND DISCUSSION
A. Effect on Signal Transmission Figure 6 shows the frequency-dependent signal transfer characteristics (S21) of the test vehicles measured with VNA up to 5 GHz. Several dips are observed on the S21 curves at frequencies corresponding to the resonance modes from the PDN input impedance, and the level of the 'dips' closely corresponds to the impedance. The test vehicles NF and GF show almost the same signal transfer characteristics as the PDN impedance curves. Test vehicle EF, however, shows improved signal transfer characteristics, with smaller dips and negligible dips found from 1.5 GHz onwards, because of its band-gap and the low PDN input impedance. 0
S21 [dB]
-2 -4 -6 NF (no filling) GF (ground filling)
-8
EF (EBG filling)
-10
40
0
30
1
2
3
4
5
Frequency [GHz]
20
Z11 [dB Ω]
0.5
Figure 6. Frequency-dependent signal transfer characteristics (S21) of test vehicles.
10 0 NF (no filling)
-10
In Figure 7, the output clock signal waveforms are observed at the frequencies of 1 GHz and 1.42 GHz (f20 resonance mode). The clock signals were fed to the signal line from a pulse pattern generator (Anritsu MP1763C) and measured by a sampling oscilloscope (Tektronics TDS8000). The frequency dependence of the output clock signal waveforms is compared for each clock frequency. Negligible differences between the
GF (ground filling)
-20
EF (EBG filling)
-30 0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Frequency [GHz] (a)
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output clock signal waveforms were found at 1 GHz, but the magnitude of the output clock signal decreases at the resonant mode frequency (1.42 GHz) for test vehicle NF and GF. The magnitude of clock signal increases at 1.42 GHz by approximately 32 percent for the test vehicle EF with the help of the low-impedance return current path.
V. CONCLUSTIONS In this paper, we first propose a partial EBG PDN, which is embodied using the remnant area on the signal layer. The design of the proposed concept was introduced and the analysis of the proposed structure was experimentally conducted and compared with the conventional ground filling method and typical layer stack-up for four-layer PCB. The results indicate that the proposed structure improves the return current path quality and provides security from the threat of power-ground resonance. The proposed method enhances its advantage from its physical configuration since the EBG PDN can be embodied using the remnant area on the signal layer without any additional layer, overcoming a disadvantage of conventional EBG PDNs. The concept can be extended to multilayer PCBs with more than four layers since inner signal layers also become suitable sources for the realization of partial EBG PDN if there exists any empty space. As the signal return current path becomes a more important consideration in high-speed channel design, the proposed concept can be a good choice, which can be applied in multilayer PCBs
Output Clock Waveform [mV]
600 64mV (13%)
500 400 300
NF, GF
200 100 0 -100
EF
95mV (19%)
0
0.5
1
1.5
2
2.5
Time [ns]
Figure 7. Comparison of time domain clock signal output waveforms. (a) 1 GHz clock. (b) 1.42 GHz clock
REFERENCES
B. Effect on Power Plane Noise The power plane noise waveforms of each test vehicle were measured at the measurement port shown in Figure 3 with a high-Z impedance probe (Tektronics P7260). In Figure 8, the peak-to-peak magnitude of the power plane noise is compared with the clock frequency from 50 MHz to 3 GHz with a 50 MHz step. From the results, it can be seen that power plane noise has a tendency to increase at the resonance mode frequencies much more than at other frequencies, since the PDN impedance becomes higher at the resonant modes, increasing displacement current, which generates cavity noise. Comparing the peak-to-peak power noise magnitude from test vehicles NF and GF with the magnitude from the EF vehicle, much of the power plane noise reduces over broadband frequencies because of its band-gap, which provides low input and transfer impedances, resulting in lower noise generation and good noise isolation.
[1]
[2]
[3]
[4]
[5]
200
Power Plane Noise [mVp-p]
180
[6]
NF (no filling) GF (ground filling)
160
EF (EBG)
140
[7]
120 100 80 60 40 20
0
0.5
1
1.5
2
2.5
3
Input Clock Frequency [GHz]
Figure 8. Comparison of peak-to-peak power plane noise magnitude according to input clock frequency.
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Junho Lee, Jaemin Kim, Albert Lu, Fan Wei, L. L. Wai, and Joungho Kirn, “Efficiency of differential signaling on cavity noise suppression in applications with reference plane change”, International Symposium on Electromagnetic Compatibility, Vol. 1, pp. 203–208, Aug. 2004. Guang-Tsai Lei, Robert W. Techentin, and Barry K. Gilbert, “Highfrequency characterization of power/ground-plane structures” IEEE Transactions on Microwave Theory and Techniques, Vol. 47, No. 5, pp. 562-569, May 1999. Nanju Na, Jinseong Choi, Sungjun Chun, Madhavan Swaminathan, and Jegannathan Srinivasan, “Modeling and Transient Simulation of Planes in Electronic Packages”, IEEE Transaction on Advanced Packaging, Vol. 23, No. 3, pp. 340-352, Aug. 2000. S. Van den Berghe, F. Olyslager, D. De Zutter, J. De Moerloose, and W. Temmerman, “ Study of the Ground Bounce Caused by Power Plane Resonance”, IEEE Transactions on Electromagnetic Compatibility, Vol. 40, No. 2, pp. 111-119, May 1998. R. Abhari and G. V. Eleftheriades, “Metallo-dielectric electromagnetic bandgap structures for suppression and isolation of the parallel-plate noise in high-speed circuits”, IEEE Transactions on Microwave Theory and Techniques, Vol. 51, No. 6, pp. 1629–1639, June 2003. T. Kamgaing and O. M. Ramahi, “A novel power plane with integrated simultaneous switching noise mitigation capability using high impedance surface”, IEEE Microwave and Wireless Components Letters, Vol. 13, No. 1, pp. 21–23, Jan. 2003. Junho Lee, Hyungsoo Kim, and Joungho Kim, “High dielectric constant thin film EBG power/ground network for broad-band suppression of SSN and radiated emissions”, IEEE Microwave and Wireless Components Letters, Vol. 15, No. 8, pp. 505–507, Aug. 2.
