PATHWAYS TO IMPROVED PERFORMANCE AND PROCESSING OF CdTe AND CuInSe2 BASED MODULES Robert W. Birkmire Institute of Energy Conversion, University of Delaware Newark, DE 19716. Phone: 302-831-6221; fax: 302-831-6226; e-mail:
[email protected]
ABSTRACT CdTe and CuInSe2 based modules have made the transition from pilot scale development to large manufacturing facilities. Production of CdTe modules has validated the cost reduction associated with the high throughput manufacturing process in plants exceeding 100 MW. Similar to development of crystalline Si modules, the next challenges are to improve the performance and processing of the modules. Currently, the module performance of CdTe and CuInSe2 based modules are significantly less than the small area ‘champion’ laboratory cells. In this presentation, approaches to advance the module performance to 15% and beyond will be discussed along with modification of processing steps to improve manufacturing throughput and materials utilization. For improvements in performance and processing to be effectively translated to a manufacturing environment, analytic/diagnostic tools based on measurable and predictive properties will be needed. This will require advancing the science and engineering fundamentals of the materials, devices and processing. INTRODUCTION The worldwide solar cell production reached 3,436 MW in 2007 [1] and since the turn of the century, PV production has been increasing about 35% per year with most of the capacity in the crystalline silicon module production. However, in the past few years, thin film manufacturing has undergone rapid expansion lead primarily by a-Si and CdTe technologies. The emergence of the thin film technologies has been, in part, driven by the shortage of Si feedstock that has limited the supply of Si modules. First Solar, the largest PV manufacturer in the U.S., has expanded its manufacturing capacity of CdTe to 277 MW in 2007 with additional plants under construction that will bring their total capacity to 910 MW in 2009. It is the first thin film company to demonstrate the ‘promise of thin film PV’ that high throughput processing and large scale facilities will significantly reduce the cost of PV modules and has achieved the lowest manufacturing cost per watt in the industry [2]. The production of CuInSe2 based modules has also increased substantially through efforts of Global Solar and Wurth Solar along with the entrance of Showa Shell and Honda into the market. This has spurred an infusion of venture capital for a large number of start-up companies in the U.S. and throughout the world in
CuInSe2, CdTe and a-Si based technologies as well as sparking the interest of several large companies. The market share of thin film PV modules is expected to increase substantially in the coming years. Selection of PV modules will be based on annualized power output for the specific location of the array and type of application. The performance of commercially available thin film modules are significantly less than crystalline Si modules that typically have efficiencies ranging from 12 to 19%. CuInSe2 modules have the highest efficiency of thin film modules in the range of 9 to12% with CdTe modules from 9 to 11% and a-Si typically in the 5 to 8% range [3]. The thin film technologies are at a similar development stage as crystalline silicon was in the 1980’s and the next challenge is to increase the module performance at the manufacturing level. The performance of crystalline Si technologies are still increasing with the goal of module efficiencies over 20%. Many of the innovations that have increased Si module performance historically have come from universities and government supported laboratories throughout the world. Presently, in the United States under the Solar America Initiative, the bulk of support for PV is directed to industrial programs and towards meeting the DOE 2015 goals. Universities and national laboratories have been somewhat relegated to supporting the PV industry’s efforts which are not conducive to providing the innovation, science, engineering and training of students needed to advance the performance of PV modules and is particularly critical at the early stage of development of CdTe and CuInSe2 based modules. In this paper, the present status of CdTe and CuInSe2 based technologies will be briefly reviewed and critical issues identified that could reduce the module cost through improvements in performance and processing with the goal of achieving a 15% commercially viable module. Both processing and fundamental device operation will be addressed based on the current laboratory ‘champion’ cells and modules. STATUS OF CdTe AND CuInSe2 BASED SOLAR CELL TECHNOLOGIES To provide a context for CdTe and CuInSe2 based solar cells, Figure 1 shows the best laboratory solar cell efficiency for different technologies compared to the attainable efficiencies for single junction solar cells [4] and
Tables 1 & 2 show the efficiency of the best CuInSe2 and CdTe based cells and modules along with Si cells and modules for comparison [5]. Single crystalline Si is within about 85% of the efficiency limit while multicrystalline Si is ~70% of the limit. The best CuInGaSe2 cells are directly comparable to multicrystalline Si since the bandgaps are similar and both are polycrystalline in nature. CdTe, which is about 55% of the efficiency limit, is difficult to compare with other technologies. However, the best laboratory CdTe cells have been fabricated on borosilicate glass which is not used in commercial modules. CdTe laboratory cells on
soda lime glass are typically in the 13.5 to 14.5% efficiency range [6]. Comparison of the best cell and module can provide a benchmark on the commercialization of the technology. In the case of crystalline Si and CdTe (using soda lime glass), the best modules are greater than 75% of the best cell while CuInSe2 based modules are greater than 65% of the best cell. Thus, the primary focus for improving CuInSe2 based modules is to effectively translate laboratory results to manufacturing. In the case of CdTe, there is not a clear path to a 15% module and the primary focus is to improve the solar cell performance.
Table 1. Summary of cell efficiencies measured under the global AM1 5 spectrum 2 (1000 W/m ) at 25ºC (5) Classification Eff. Area VOC JSC FF Test center 2 2 (%) (cm ) (V) (mA/cm ) (%) (date) CdTe (cell) 16.5 1.03 0.845 25.9 75.5 NREL (9/01)
Description
CIGS (cell)
18.8
1.00
0.703
34.0
78.7
NREL, CIGS on glass
CIGS (Notable Exception) Si (crystalline)
19.9
0.419
0.692
35.5
81.0
24.7
4.0
0.706
42.2
82.2
20.3
1.002
0.664
37.7
78.9
Si (multicrystalline)
FhG-ISE (8/06) NREL (10/07) Sandia (3/99) NREL (5/04)
NREL, mesa on glass
NREL, CIGS on glass UNSW PERL 9 FhG-ISE
2
Table 2. Summary of module efficiencies measured under the global AM1 5 spectrum (1000W/m ) at a cell temperature of 25ºC [5] Classification Eff. Area VOC ISC FF Test center Description 2 (%) (cm ) (V) (A) (%) (date) CdTe 10.7 4874 26.21 3.205 62.3 NREL (4/00) BP Solarex CIGSS
13.4
3459
31.2
2.16
68.9
NREL (8/02)
Showa Shell (Cd free)
Si (crystalline)
22.7
778
5.60
3.93
80.3
UNSW/Gochermann
Si (large area)
20.1
16300
66.1
6.30
78.7
Si (multicrystalline)
15.3
1017
14.6
1.36
78.6
Sandia (9/96) Sandia (8/07) Sandia (10/94)
SunPower Sandia/HEM
Figure 1. Best device efficiencies in the laboratory compared to limit efficiency. [4] Thin film CdTe and CuInSe2 based modules are fabricated on large, >1 sq. ft, soda lime glass substrates and are monolithically integrated using a laser/mechanical scribing [7]. However, some CuInSe2 based modules employ rollto-roll deposition on a metal or plastic web. For the conductive web, individual cells are fabricated by cutting the web and applying a metal grid structure to form individual cells. These cells then are assembled into a module in a manner similar to c-Si. For the plastic web, monolithic integration is used to make large area modules. PATHWAYS TO IMPROVE CELL PERFORMANCE Both CdTe and CuInSe2 based solar cells have nearly 100% internal quantum efficiency and thus are not limited by JSC. Efforts to improve device performance have generally focused on VOC and FF, although the approaches have been different for each materials system. The primary mechanism limiting VOC in both materials is generally recombination in the space charge region [8,9]. Figure 2 shows VOC-T for CdTe, CuInSe2 and 1.2 eV CuInGaSe2 devices. The intercept gives a value of Eg for both devices, consistent with Schockley Read Hall recombination at defects within the bandgap [9]. This is supported by values of the ideality factor A=1.4-1.8 for these devices. CdTe Devices Losses in CdTe production, record, and target devices have been quantified [10]. Characterization at IEC of CdS/CdTe devices made with a wide variety of semiconductor deposition methods, contacts, and thickness (>1.5 µm) have found remarkable similar operating characteristics. Typically, good CdTe devices (efficiency > 10%) have A=1.4-1.8 and Jo=0.5-3 x 10-7 2 2 mA/cm , R=2-4 Ω-cm and large voltage dependent collection losses [8,9]. They may also have back contact barriers of 0.3-0.5 eV. Methods to increase JSC in CdTe are well known for laboratory scale devices: decreasing the CdS thickness and using a more transparent glass/SnO2 substrate.
Figure 2. Temperature dependence of VOC for CdTe, CuInSe2 and CuInGaSe2 absorber materials, in each case VOCà Eg/q (absorber) as Tà0 [Ref. 9]. However, these are both difficult to implement in manufacturing. The thinner CdS also reduces VOC and yield [11]. This can be mitigated somewhat with an intrinsic buffer layer [11]. There are three losses dominating the FF: series resistance, voltage dependent collection, and junction recombination (diode forward current). Methods have been developed to separate and quantify their impact [12]. For a CdTe device with measured efficiency of 13.3% and FF of 70%, eliminating voltage dependent collection and resistance losses would increase the efficiency to 16.0% with FF=82%, which establishes superposition between light and dark JV curves, implying the device is then limited by forward recombination current. CdTe devices have a significant loss in FF due to voltage dependent collection arising from the fact that the absorption depth for AM1.5 light is less than the depletion width. This is a consequence of the low carrier density (N=1-2 x 10 14 cm 3 ). Increasing the carrier density will reduce depletion width but would only result in a higher FF if the diffusion length was sufficient to collect carriers generated. The diffusion length in CdTe is 0.6-0.8 µm based on bifacial QE measurements [13]. This is marginally high enough to provide a high collection efficiency in the absence of the high field. Note that Cu(InGa)Se2 devices have at least 10X higher N, 2X higher diffusion length, and consequently smaller voltage dependent collection losses and higher FF. VOC is where the greatest gains can be made. Conceptual approaches to increase VOC have been presented [14]. The upper limit to VOC ~ 1.0 V for CdTe has been obtained from the saturation value of VOC at low temperature [15]. Increasing lifetime will have a slight impact until the carrier density increases. Increasing the carrier density will increase the separation in quasi-Fermi levels and reduce the depletion width. Despite years of effort by many
groups, improvements in CdTe lifetime and carrier density have remained elusive. Instead, a more practically achievable goal might be to create an electron mirror at the CdTe/metal back contact to minimize electron injection from the CdS, hence reduce Jo [14, 16]. CuInSe2 Based Devices For CuInSe2 based cells, the collection width is larger than the space charge indicating that the diffusion length is sufficient for good carrier collection and high FF. Most of the efforts to improve CuInSe2 based solar cell performance have focused on modifying the bandgap to better match the solar spectrum by alloying with other chalcopyrite materials. The alloy material system covers a Eg range from 1.0 to 2.7 as shown in Table 3 which list the materials and bandgap. Table 3. CuInSe2 Alloy Materials Material Eg (eV) CuInSe2 1.0 CuGaSe2 1.68 CuAlSe2 2.72 CuInS2 1.53 CuInTe2 1.1 CuGaS2 2.53 CuAlS2 3.5 CuGaTe2 1.23 AgGaSe2 1.8 AgInSe2 1.2 AgAlSe2 1.66 Most of these materials form continuous solid solutions and thus provide a class of materials similar to the III-V’s that allows ‘bandgap engineering’. Figure 3 shows the bandgap as a function of composition for the CuInSe2CuInS2-CuGaSe2 quaterninary system which has been the primary focus of most of the research efforts [17]. The assumption in using this approach has been that the electrical properties of the new alloy material would not change and that CdS would be a good heterojunction partner. The approach was successful up to an Eg of about 1.3 eV where the VOC increased linearly with Eg but beyond 1.3 eV the expected improvement in VOC was not realized (see Figure 4) and performance decreased dramatically in part, due a reduced FF [18]. As the CuInSe2 material was modified by alloying, the forgiving nature of CuInSe2 diminished and direct control of the electronic properties of the alloys is required.
Figure 3. Variation of Eg with composition for the CuInSe2CuInS2-CuGaSe2 alloy system. (Figure courtesy of W.N. Shafarman)
Figure 4. Efficiency and VOC for CuInGaSe2 solar cells with different bandgaps Two areas of research that could lead to devices with a better match to the solar spectrum and higher performance would be: 1) develop approaches to controllably dope the alloy materials through a basic understanding defect chemistry controlling electronic properties; and 2) for some of the alloy materials, the VOC is controlled by interface recombination and thus developing a better heterojunction partner could reduce the interface states and recombination. Success at making device with the wider Eg has several other important aspects: 1) Higher Eg devices will reduce area related losses in fabricating modules due to the reduced current which reduces the requirements on the TCO. and ; 2) Can provide a pathway to multijunction device structure for the next generation polycrystalline thin film modules. PATHWAYS TO IMPROVE PROCESSING Typically, there are about half as many processing steps (from substrate preparation through contacting) to make monolithic integrated thin film modules compared to
crystalline Si modules. The major challenges in thin film CdTe and CuInSe2 based module fabrication are uniform deposition over large areas and post deposition treatments in the case of CdTe, process speed and yield (substrate in module out). Uniform film growth is of critical importance when monolithic integration is used and is relaxed somewhat when individual cells are prepared, tested and sorted for module fabrication. This approach can impact process yield by selectively removing ‘bad’ regions but also increase the number of steps in the module fabrication process. CdTe has a larger number of processing steps due to the post CdS/CdTe deposition treatments required for doping and contacting. An approach to reducing manufacturing cost for both CdTe and CuInSe2 based PV is to reduce the thickness of the film which impacts both throughput and materials cost. The challenge is to maintain the performance and yield of the modules as thickness decreases. Reducing the thickness can have several impacts: 1) As the thickness is decreased to less than absorption length, the JSC will decrease and light trapping techniques will need to be developed and incorporated into the device structure, and 2) As the physical separation of the junction and back contact is reduced, different recombination mechanism can reduce the VOC. The challenge will be to address these issues so that the gains in process speed and reduced materials will not be offset by complexities of light trapping and device structure. CdTe Module Fabrication The translation of laboratory processes to fabricate CdTe solar cells to manufacturing using two different technologies to deposit the CdS/CdTe films have been successfully achieved by both First Solar and BP Solar (even though BP is not longer pursuing thin film technology) and their success has spawned new start-up companies. For CdTe solar cells, the approach to fabricating the glass/TCO/buffer/CdS/CdTe structure is not as critical as the post deposition processing steps required to dope the CdTe p-type and form a contact on the CdTe back surface (See ref 11). In general, a CdCl2 treatment is first performed in the presence of oxygen to dope the CdTe p-type that also can promote grain growth and intermixing of the CdS-CdTe films. The process for forming the contact consisting of: 1) a surface etch step to create a Te rich surface; 2) deposition of Cu or a Cu + containing compound to form a p primary contact and 3) deposition of a current-carrying metal contact. The post deposition and contact formation processes are coupled to the CdTe deposition technology, and the structure and thickness of the CdTe film, adding to the overall complexity of the process. Thus, the processing conditions and properties of the glass/TCO/buffer/CdS/CdTe structure need to be fixed before the post processing procedures can be optimized. A pathway to improving the process would be to reduce the individual processing step. For example, the CdCl2 treatment could be combined with the surface etch step
[19]. Finally, inverting the structure of the CdTe device from a glass superstrate to substrate configuration on a flexible substrate would open a new market segment for CdTe PV. However, the best laboratory devices using a substrate configuration have efficiencies between 6 to 8% (non-lift off process). The challenge is to form a good contact to the CdTe during the deposition of the CdTe and subsequent processing. CuInSe2 Based Module Fabrication The primary challenge for CuInSe2 based modules is the growth of the CuInSe2 based film. There currently are two primary approaches being employed: multi-source element evaporation and reaction of precursors in a Se and/or S atmosphere. (An all-sputtering process which has limited laboratory validation is also being developed and will not be addressed in this paper). Multi-source evaporation has been used to fabricate all high efficiency laboratory cells and is the most versatile in controlling the structure and composition of the CuInSe2 based film. A three-stage deposition process was used to deposit the CuInGaSe2 films used in the ‘champion’ cell fabricated by Ripen et. al [20]. High efficiency cells, ~ 18%, however, have been made by several laboratories using simpler growth procedure which are more compatible with manufacturing. The challenge with elemental multi-source evaporation is the high source temperatures required to obtain high film growth rates coupled with the Se environment [21]. This is particularly true for the Cu source which operates at ~1600ºC. Also, in in-line processing, where the substrate or web moves over a sequential array Cu, Ga, and In source, there is an inherent through film non-uniform Ga and In distribution incorporated in the film [22,23]. Design and control of the system, particularly when depositing on a continuous web requires in situ process control and diagnostics [24] that have been implemented by several companies. There has been limited optimization of source sequences, both the number and order with respect to material structure, Ga to In distribution through the film, and solar cell performance. Research in this area could have the potential to enhance process throughput, yield and possibly module/cell performance. Additionally, the maximum growth rate that can be used to deposit high quality films needs to be evaluated and incorporated in system design to optimize translation speed through the deposition zone and sources effusion rates. In the case of the reaction in Se and/or S atmosphere to form CuInSe2 based films, there are a variety of approaches to preparing the precursors which usually consists of sputtered metal films, metallic metal particles or chalcogenide binaries delivered using a print process. The precursors are reacted in an H2Se/H2S or Se/S atmosphere and the reaction chemistry has been quantitatively evaluated for CuInSe2 [25,26]. This process has several limitations: 1) Reaction in H2Se is limited to a reaction temperature of about 450ºC in order to maintain a good Mo back contact to the CuInSe2 based absorber; 2) The reaction time to form the CuInSe2 based films is
limited by the reaction/ diffusion rates; and 3) The Ga content in the film is higher at the back of the film, limiting the increase in Eg in the junction region [27]. Incorporation of S and control of the reaction-time-temperature-gas phase composition may reduce this affect [28]. Fabrication of modules on glass substrates, generally, is performed by a batch process where a large number of plates are reacted in a furnace to overcome the slow conversion rates. For a flexible web, the challenge is to react the precursors on a moving web where delivery of the uniform gas and reaction time become important issues. Although the fundamental understanding of reaction chemistry is semi-quantitatively understood, a more quantitative evaluation of the reaction chemistry could lead to alternative chemical pathways that could reduce the overall reaction time to produce the CuInSe2 based films.
4.
The best CuInSe2 based modules using monolithic integration have a FF of 68.9% compared to a multicrystalline Si module of 78.6%. Most monolithic integration for CuInSe2 based modules use a combination of laser and mechanical scribing where the Mo is segmented with a laser and the CuInGaSe2/CdS cut and isolation cuts are made mechanically. Improvements in this process could increase the FF by reducing the series resistance of the interconnect.
13.
CONCLUSIONS
18.
Thin film CdTe and CuInSe2 based PV has become a commercial reality but still makes up a small fraction of the market. For the thin film PV to be more competitive, it must show the similar performance level relative to laboratory achievements that Si PV has been able to do. Both CdTe and CuInSe2 based PV need to improve VOC and FF in the manufacturing environment. For CdTe PV, the challenge lies in understanding and improving the fundamental operation of the device, both in the absorber characteristics and in the contact development areas. For CuInSe2 based PV, the pathway is to develop and control the electronic properties of wider band gap alloys. In addition, there exists the challenge of translating laboratory fabrication processes to manufacturing. The fundamental issue for both material systems is the lack of fundamental science and engineering to underpin the technology.
19.
5. 6. 7. 8. 9. 10. 11.
12.
14. 15. 16. 17.
20.
21. 22. 23. 24. 25. 26.
ACKNOWLEDGMENT 27. The author would like to acknowledge helpful discussions with S. Hegedus, W. Shafarman, B. McCandless and E. Eser. The work was supported by NREL (contract ADJ-130630-12). REFERENCES 1. 2. 3.
SolarBuzz™ March 17, 2008. http://www. solarbuzz.com/Marketbuzz2008-intro.htm First Solar web site: http://www.firstsolar.com/. “Solar modules in 2008,” Photon Int’l 2, (2008), 126.
28.
L. Kazmerski, J. Electron Spectroscopy, 150 (2006), 105–135. Martin A. Green, Keith Emery, Yoshihiro Hishikawa and Wilhelm Warta, Prog. Photovolt: Res. Appl. 16: (2008), 61–67. Alvin D. Compaan, JOM , December (2007), 31. R.W. Birkmire and E. Eser, Annual Review of Materials Science 27, (1997), 625. S. Hegedus, B. McCandless, Solar Energy Materials and Solar Cells 88, (2005), 75-95. S. Hegedus, W Shafarman, Progress in Photovoltaics 12, (2004), 155. st S.Demtsu,J.Sites,Proc.31 IEEE PVSC,(2005) 347. B. McCandless, J. Sites, Handbook of Photovoltaic Science and Engineering, Chapter 14, Wiley and Sons Chichester UK (2004). S. Hegedus, D. Desai, B. McCandless, Progress in Photovoltaics 15, (2007), 587-602. D. Desai, S. Hegedus, B. McCandless, R. Birkmire, K. Dobson, D. Ryan, Proc. 32nd IEEE PVSC and WCPEC-4, (2006), 368. J. Sites, J. Pan, Thin Solid Films 515,(2007), 6099. C. Thompson, S. Hegedus, D. Desai, W. Shafarman, this conf. 33rd IEEE PVSC (2008). P. Meyers, Proc, 4th WCPEC, (2006), 2024-2027. W. N. Shafarman, L. Stolz, Handbook of Photovoltaic Science and Engineering, Chapter 13, Wiley and Sons Chichester UK (2004). W. Shafarman, R. Klenk, and B. McCandless, J. Appl. Phys. 79(9), 1 May (1996). B. McCandless and W. Buchanan, this conf. 33rd IEEE PVSC (2008). Ingrid Repin, Miguel A. Contreras, Brian Egaas, Clay DeHart, John Scharf, Craig L. Perkins, Bobby To and Rommel Noufi, Prog. Photovolt: Res. Appl. 16: (2008), 235–239. S. Tobias Junker, Robert W. Birkmire, and Francis J. Doyle III, AIChE Journal 51(3), (2005), 878. R. Birkmire, E. Eser, S. Fields, W. Shafarman, Prog. Photovolt: Res. Appl. 13(2), (2005), 41. G.M. Hanket, P.D. Paulson, U. Singh, S.T. Junker, R.W. Birkmire, F.J. Doyle III, E. Eser and W.N. Shafarman, Proc. 28th IEEE PVSC, (2000), 499. K.Mukati, B. A. Ogunnaike, E. Eser, S. Fields, R. Birkmire, Proc. 32nd IEEE PVSC, (2006), 1842. N. Orbey, H. Hichri, R.W. Birkmire, and T.W.F. Russell, Prog. in Photovoltaics 5, (1997) 237. N. Orbey, G. Norsworthy, R.W. Birkmire, T.W.F. Russell, Prog. in Photovoltaics 6, (1998) 79. M. Marudachalam, R. W. Birkmire, H. Hichri, J. M. Schultz, A. Swartzlander, and M. M. Al-Jassim, J. Appl. Phys. 82(6), (1997), 2896. V. Alberts, J. Titus and R.W. Birkmire, Thin Solid Films 451-451, (2004), 207.
