Performance Evaluation of Reversible Logic Gates

Performance Evaluation of Reversible Logic Gates Lavisha Sahu M. Tech Scholar, Dept. ofCSE

Banasthali University, Niwai

Rajasthan, India

Rajasthan, India

Rajasthan, India

[email protected]

[email protected]

umabansthali [email protected]

Abstract - It has been realized that quantum computing is one of the latest technologies using reversible logic. It is observed that

M. Tech Scholar, Dept. ofCSE

Govt women EngineeringCollege, Ajmer

Govt women EngineeringCollege, Ajmer

increasing

growth

consumption

will

technologies.

In

of

reach

transistor

their

conventional

density,

limits

Circuits

in

power

conventional

during

the

logic

operations bits of information is erased resulting dissipation of

Uma Sharma

Umesh Kumar Assistant Professor, Dept. ofIT

energy

in

significant

amount.

Thus,

if Circuits

are

designed so that information bits can be preserved, the power use can be reduced. In case of reversible logic computation, the information bits are not lost. We can use reversible logic technology for minimizing the power consumption,

heat

operates in both forward and backward direction Devices become more portable if element size of the circuit is reduced and without implementation of reversible logic gate does not realize quantum computing. Important resources which are used in computing are Time, Space, Manufacturing cost and Energy. It has been observed that in scientific applications demand of computational speed is growing rapidly. [3] A.

Feynmen Gate

dissipation, increasing speed etc. This paper describes various logic gates based on reversible logic like

Toffoli, Peres,

Fredkin, and Feynman etc. A comparative between classical and quantum logic gates is also given on various parameters along with limitations of conventional computing Keywords: Quantum cost, Low power CMOS design, Low power VLSI, Reversible logic

I.

In which input vector and output vector is respectively represented by I(X, Y) and 0 (P and Q). This gate given Quantum cost [4] is l. Output is defmed by P=X and Q= XEBY.Feynman gate was given by Richard Feynman in 1982.it is also known as control known gate.

INTRODUCTION

Table

I :Truth Table

Conventional computation by its nature is irreversible. Input can't be reconstructed from its output. In high speed computation, reversible bit causes a number of problems as from the output all the input lines do not propagate. The problems, which may arise in conventional computing system, can be of physical, Computational or Economical in nature defmed later in this paper Reversible logic is very effective and important in the formation of low power circuit. The aim of low power VLSI circuits is to reduce the power dissipation. It is called reversible when it is completely specified N-output, n-input Boolean function and if it maps each output assignment to a unique input assignment and vice versa. The reversible logic operations can't erase information and dissipate zero heat. The circuit actually operates in a backward operation, allows reproducing the inputs from the outputs and consumes zero power. [I]

Fig. I. Feynman Gate

B. Double Feynmen Gate In which input vector and output vector is respectively represented by I(X, Y, Z) and 0 (P, Q and R).Output IS defmed by P= X and Q= Xffi Y, R= xEBZ.

According to launder's research "the amount of energy dissipated by every irreversible bit operation is at least KTln2 joules, where k=1.3806505*IO-23 23m2kg-2K-I (joule/Kelvin-I) is the Boltzmann's constant and T is the temperature at which operation is performed". [2] It affects the results and performance of the component because of large heat dissipation. Reversible logic gate

978-1-5090-5515-9/16/$31.00 ©2016 IEEE

-

Table 2: Truth Table

,---Fig.2. Double Feynman gate

C. Toffoli Gate


In which input vector and output vector is respectively represented by I(X, Y and Z) and 0 (P, Q, R). It is having quantum cost is 5 [4]. Output is refer as P=X, Q=Y and R=XyEBZ. Table 3: Truth Table

Fig. 5. Peres gate

F. TSG Gate In which input vector and output vector is respectively represented by I (W, X, Y, Z) and 0 (P, Q, R, S). TSG gate work singly reversible full adder [5] and perform all Boolean function. Table 6: Truth Table

Fig. 3. Toffoli Gate

D. Fredkin Gate In which input vector and output vector is respectively represented by I(X, Y, Z) and 0 (P, Q, R).It is having Quantum cost 5.0utput equation is P=X, Q=XyEBxz and R=x'ZffiXY. Table 4: Truth Table

Fig. 6. TSG Gate

G. Sayem Gate In which input vector and output vector is respectively represented by I (W, X, Y, Z) And 0 (P, Q, R, S).Output is refer as P=W, Q=W'y'EBx, R= (W'y'EBx') EBz' And S= (W'y'EBx').Z EB(wxEBy). Fig. 4. Fredkin gate


E. Peres Gate In which input vector and output vector is respectively represented by I(X, Y and z) 0 (P, Q and R). It is having quantum cost 4. Output is take by P=X and Q=xEBy, R=XyEBZ.

Fig.7. Sayem Gate

H. New Gate:

II. POWER CONSUMPTION AND DELAY

In which input vector and output vector is respectively represented by I(X, Y, Z)And 0 (P, Q, R).Output is defiend by P=X And Q=XyEBz, R=X'Z'EBY'.

Power conswnption and delay for various reversible logic gates are as Table: 11 Comparison of Reversible Logic Gates


Fig. 8. New Gate

I. URG Gate URG stand for universal reversible gate in which input vector and output vector is I(X, Y, Z) And 0 (P, Q, R).Output

is

defined

by

P=(X

¥)ffiC

And

Q=Y

,R=Xy EB Z. Table 9: Truth Table

III. APPLICATION AREAS

Reversible logic gate used in achieving high energy efficiency, low power dissipation [6], speed and performance. In computer security and transaction processing reversible computing are used. It includes areas like FPGA, Quantwn computer, Nano Technology, Low Power CMOS, etc. IV. LIMITATION OF CONVENTIONAL

&

REVERSIBLE COMPUTING

A. Physical Problem Irreversible classical gates based devices may become cause Fig. 9. URG Gate

of physical inefficiently of conventional computing system.

J. DKG Gate

1. Heat Dissipation

In which input vector and output vector is respectively represented by is I (W, X, Y, Z) And 0 (P, Q, R, S).

During irreversible computation KT Ln2 Joule of energy is


dissipated in each lost bit of operation. Where k= Boltzmann constant and T is a system temperature. If T=300K which is equal to room temperature than heat dissipate equal to 2.8* lO-28 joule/transistor. [7, 8] Energy is expressed as a mUltiple of room temperature KT. Which is also proportional to the net of associate information. If the trend is follow thermal noise will become significant in 2035s when transistor energies approach small multiple of KTs. [9] If reversible operation are used the order KT bit energies dissipated and the dissipation per reversible bit

Fig. 10. DKG Gate

might decrease [8].

2. Operational speed

V. CONCLUSION

Low power consumption for VLSI circuit realization has become an important issue in the present day as if Speed of operation is higher the power dissipation increases accordingly and dissipation of power is directly proportional to clock frequency. 3. Unable to meet size requirement According to Moore's Law transistor complexity increasing and feature size is reducing. Nowadays computer is based on silicon chips, chip become small and faster. High packaging density cannot be achieved due to heat dissipation so conventional computing doesn't unable to meet size requirement in coming years B. Computational problem

Developing of reversible logic computing and its promises of low power computation, usage of old circuit was in focus of this work. The power analysis can be made using Xilinx ISE version 6.1 [10]. In this paper the classical Gates and Quantum Gates are been compared on the basis of certain parameters and limitations. This paper give the overview of limitations of classical logic gates for the further upgradations according to the Moore's law and about basic reversible logic gates and their further extension towards development of reversible logic. REFERENCES

[I] W. D. Pan; M. Nalasani, "Reversible logic'", Volume: 24, Issue: I, IEEE Journals

& Magazines Year: 2005 DOT: 10. 1109/MP.2005. 1405801,

IEEE 2005 [2] Launder, R. , "Irreversibility and heat generation in the computing

NP-complete type problem required high computational speed and have not been solved by classical computers. During cryptography operation heat dissipation is a crypto analysis method.

process'", IBM J. Research and Development, 5(3): pp. 183-191, 1961. [3] Dr.

Mike Frank, "Quantum Computer Architectures for Physical

Simulations'", James H. Simons Conferences on Quantum Computation for Physical Modeling Work-shop, University of Florida, May 2002. [4]

Thapliyal

H,

Ranganathan

N.,'"

Design

of

Reversible

Latches

Optimized for Quantum Cost, Delay and Garbage Outputs'" Centre for VLSI and Embedded

System Technologies International Institute of

Information Technology, Hyderabad, 500019, India. [5]

Thapliyal

Architecture

H,

Using

M.

B. Sshrinivas

Reversible

TSG

"Novel Gate'"

Reversible

Computer

Multiplier

Systems

and

Applications, 2006. IEEE International Conference on. [6] P. Vanusha, k. Amurtha Vally, "Low Power Computing Logic Gates design using Reversible logic'" ISSN: 2319-5967, Volume 3, Issue 10, IJAIEM, October 2014, Fig. II. Moore's Law

[7] Hugo De Garis, Thayne Batty, "Robust, Reversible, Nano-scale, Femto-Second-Switching circuits and their evolution'", Proceedings of the

C. Economic problem In higher complexity cost of computation will be always higher so higher computational complexity will lead to economic problem.

2004 congress on evolutionary Computation, XXX-2371, ISBN 0-78038515-2, IEEE, 2004. [8] Michael P. Frank, "The Physical Limits of Computing'", Vol. 4, No. 3, pp. 16-26, May-June 2002, doi:l 0.11 09/5992.998637, IEEE, 2002. [9] Robert Wille, "Introduction to Reversible Circuit Design'", Electronics,

Table: 12 Difference Between Classical and Quantum Gates

Communication

and

Photonics

Conference

(STECPC),

2011

Saudi

International, E-ISBN: 978-1-4577-0067-5, Print-ISBN: 978-1-4577-00682, IEEE, 2011. [IO]www. xilinx. com.[Online.Available:http://direct.xilinx. com/directlise6_ tutorials/ise6tut. pdf