conversation time being 4,200 seconds. Compute the call arrival rate and the. traffic intensity. 10. 7. a) For a cascade
Jun 9, 2009 - Figure 2 PV System as Backup Power Supply. The entire PV array has been modeled as a Thevenin's equivalent consisting of a Thevenin's ...
theory and to an analysis of the basic single-node queueing models. ... Modelling
” of J. van der Wal, and the lecture notes ”Stochastic methods for design and.
Let the joint pdf be given by : ... b) State and prove convolution theorem. 10 ... 5. a) We are given two independent Po
Page 1 of 3. JUP â 019. II Semester M.E. (Computer Networks & Engg.) Degree Examination,. January/February 2014. (
Performance Bond Cost Calculator. Performance Bond Example. Performance Bond Sample. What Is A Performance Bond Its Purp
to support modelling and simulation of large-scale system with natural and arti cial ... The basic modelling formalism employed is that of discrete events for .... DEVS falls within the formalisms identi ed by Ho 6] for discrete event dynamical syste
solutions in the context of a stochastic process algebra. .... departure from the first queue and an arrival at the second, they are clearly different ways .... the participating agents, filled head arrows indicate active actions and open headed arro
MODELLING RAIL TRACK PERFORMANCE: AN INTEGRATED APPROACH. By Yu-Jiang Zhang1, Martin Murray2, Luis Ferreira3. Abstract: This paper reports ...
production forecast of a tanning industry processing 5 leather types is presented. ... The Emmanouil Vrontakis & Co industry, is located in. Chania, Greece and ...
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support throughout this process in order to make it a success. Managers are expected to contact Student Life Human Resou
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CI 71/IS 74.3 : ADVANCED COMPUTER ARCHITECTURE. Time : 3 Hours Max. ... 7. a) Explain the steps involved in creating a p
ED – 1009
*Ed1009*
VII Semester B.E. (CSE/ISE) Degree Examination, Dec. 2014/Jan. 2015 (2K11 Scheme) CI 71/IS 74.3 : ADVANCED COMPUTER ARCHITECTURE Time : 3 Hours
Max. Marks : 100
Instruction : Answer any 5, selecting atleast 2 from each Part. PART – A I. a) Discuss the evolution of computer architecture, with a suitable diagram.
10
b) Discuss the Flynn’s classification of computer architecture.
10
2. a) The execution time (in seconds) of four programs on three computer are given below :
10
Assume that 100,000,000 instruction were executed in each of the programs.Calculate the MIPS rating of each programs on each of the three machines. Based on these rating, can you draw a clear conclusion regarding the relative performance of the three computers ? Give reason if you find a way to rank them statistically.
Execution Time (in Seconds) Program Computer A
Computer B
Computer C
Program 1
1
10
20
Program 2
1000
100
20
Program 3
500
1000
50
Program 4
100
800
100
b) With neat block diagram, explain the architecture and working principle of vector processor.
10 P.T.O.
ED – 1009
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*Ed1009*
3. a) Differentiate between hardware and software parallelism. b) What is Node Duplication ? With an example explain the static multiprocessor scheduling with Node Duplication. c) Determine the types of dependencies and draw corresponding dependencies graph for the following : S1 : Load R1, 1024 / R1 ← 1024 / S2 : Load R2, M(10) / R2 ← Memory (10) / S3 : Add R1, R2 / R1 ← (R1) + (R2) / S4 : Store M(1024), R1 / Memory (1024) ← (R1) / S5 : Store M((R2)), 1024 / Memory (64) ← 1024 /
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4. a) Define the following basic terms associated with memory hierarchy design : (5×2=10) 1) Physical address space 2) Address Mapping 3) Cache blocks 4) Hashing function 5) Memory replacement policies. b) Give the classification of shared memory organisation, explain briefly. 5. a) What is pipelining ? Explain with a suitable example. b) Explain the different instruction execution phases considering a five stage instruction pipeline. 6. a) Explain the following terms associated with multicomputer networks and message-passing mechanisms :
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1) Message, packets and flits 2) Share-and-forward routing at packet level 3) Virtual channel versus physical channel 4) Buffer deadlocks versus channel deadlocks. b) What is cache coherence problem ? Explain cache inconsistency caused by data sharing, process migration and I/w processor with neat diagram. 10 7. a) Explain the steps involved in creating a parallel program. b) Why are parallel algorithm are essential ? Discuss with an example.
10 10
*Ed1009*
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8. Write short notes on any four of the following : 1) Scalable programming model 2) Omega network 3) Write-once protocol 4) Shared memory organisation 5) Program partitioning. ______________
