Performance Tradeoffs of Integrated CMOS Charge Amplifiers Antonio J. Lopez-Martin, Marco Massarotto and Alfonso Carlosena Dept. of Electrical and Electronic Engineering Public University of Navarra Pamplona, Spain
[email protected] Abstract—A detailed comparison of integrated CMOS charge amplifiers is presented in this work. Conventional topologies, along with new ones, have been fabricated in a CMOS test chip prototype and their measured performance compared in terms of sensitivity, PSRR, and frequency response. As a result of this work, a complete library of fabricated CMOS charge amplifiers is presented and the performance tradeoffs of each solution discussed. This way the designer can make an educated choice about the design that best suits some given specs.
I.
INTRODUCTION
Several devices produce electrical charge in response to an external physical magnitude, such as piezoelectric sensors, pyroelectric sensors, particle detectors, and radiation and light detectors. The physical magnitudes measured by these sensors include force, pressure, acceleration, displacement, decay time (disintegration), and radiated energy in different frequency bands. Charge amplifiers are often employed to transform the electrical charge generated by the sensor into a more easily measurable parameter, typically, voltage [1], by integration. Such charge amplifiers are usually referred to as transcapacitance circuits [2]-[3]. Desirable properties of charge amplifiers include: negligible input and output impedances for optimum coupling with the sensor and the subsequent electronics, high sensitivity, and low noise. Since current is defined as the time variation of charge, charge amplifiers can also be used with minor redesign to interface current generating sensor. Thus they can interface the plethora of sensors having output currents, e.g., photodiodes. In this case the amplifier acts as a transresistor (current-tovoltage converter), typically obtained by replacing the integrating capacitor by a resistor. Charge amplifiers can also be used to interface capacitive sensors. Fully integrated change amplifiers are usually preferred since in this case both sensor and charge amplifier can often be implemented on the same substrate, thus minimizing the This work was supported in part by the Dirección General de Investigación and FEDER under grants DPI2007-66615-C02-01 and TEC2007-67460C03-01/MIC
978-1-4244-5335-1/09/$26.00 ©2009 IEEE
length of the interconnections between them, avoiding interference. Besides, integrated sensor interfaces lead to cost and size reduction. Concerning the semiconductor technology employed, particular applications require charge amplifiers designed in a specific technology. For instance, some applications demand radiation hardening [4] Silicon-onInsulator (SOI) substrates, while X and gamma ray spectroscopy in high-energy physics often uses GaAs substrates [5]. However, most common applications can be implemented in inexpensive CMOS processes, thus strongly reducing cost (although sometimes the sensor requires extra fabrication steps). In the technical literature extensive treatment of fabrication of different charge or current generating sensors in CMOS technologies has been presented, but the required readout electronics (and remarkably, CMOS charge amplifiers) has not received the same attention. In particular, a comparison describing the tradeoffs of integrated CMOS charge amplifiers has not been reported to the best of the authors’ knowledge. In this paper we present measurement results of a CMOS test chip containing 7 different charge amplifiers, both conventional and novel topologies. From these experimental data the performance tradeoffs of each topology are described. This analysis can help designers to choose the CMOS charge amplifier that best suits a particular application. The target application for which the charge amplifiers presented in the paper were designed is interfacing piezoelectric sensors for impact detection, although the circuits developed can be extended to other charge-generating sensors as well. II.
SENSOR MODEL
A suitable model for charge-generating sensors, which will be used in the subsequent analysis of charge amplifiers, is shown in Fig. 1. RS is the leakage resistance; CS represents the capacitive behavior of the sensor; Q is the generated charge in the model of Fig. 1(b), and I is the corresponding generated current in the equivalent model of Fig. 1(c). Because of the relationship between charge and current (I(s)=sQ(s) in the sdomain) both sensor models shown in Fig. 1 are easily
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IEEE SENSORS 2009 Conference
i(t ) =
dq(t ) dt
I (s ) = sQ ( s)
Figure 1. The typical sensor (a) used in conjunction with charge and transresistance amplifiers can be represented by its charge (b) or current (c) equivalent model, considering that I(s)=sQ(s).
interchangeable, helping the analysis of the interface circuits presented both for change and current inputs. In particular, the model applies for instance to piezoelectric sensors [6], where typically CS is in the order of hundreds of pF and RS is in the order of tens of MΩ. Moreover, the sensor also exhibits some kind of resonance, a typical characteristics of piezoelectric materials. It is usually avoided when the sensor is used as an accelerometer or pressure sensor, or exploited e.g. in ultrasonic receivers and transmitters. Thus, the resonance needs to be modeled when the overall transfer function from physical magnitude to voltage has to be predicted, but is not required in general to optimize the charge amplifier design. III.
INTEGRATED CMOS CHARGE AMPLIFIERS
Such feedback enforces low input impedance and a virtual short circuit between the sensor terminals. Thus the charge coming from the sensor is transferred to the feedback capacitor, leading to an output voltage proportional to such charge. The amplifier can be implemented by a simple MOS transistor or an operational amplifier. In practice, to enforce a stable DC bias point a feedback resistor Rf is used, as shown in Fig. 2(a). Alternatively, if continuous-time operation is not required the capacitor can be reset by a switch. Using the sensor model of Fig. 1, the output voltage in Fig. 2(a) is
Vo (s ) = −
Q(s ) 1 ⎞⎟ Ct ⎛ 1 ⎞⎛ C f ⎜1 + ⎟⎜1 + + ⎜ A sR C f ⎟⎠ A ⎝ ⎠⎝ f
Vo (s ) ≈ −
Cf Vo
Vo
-
(c)
(b)
(d)
R2 R1
R2
Rf
-
Vo
Cf
R1 Vo
Rf
Rf
Rf
R2
Cf
(a)
-
Cf
+ R1 Rf
R1
-
Cf
Vo
R2
Vo
(1)
(2)
⎞ ⎟ ⎟ ⎠
+ Rf
+
⎛ 1 C f ⎜1 + ⎜ sR C f f ⎝
+
+
-
Q(s )
Cf
Rf
⎞ ⎟⎟ ⎠
where Q(s) is the charge provided by the sensor and A is the gain of the amplifier. Capacitance Ct=Cs+Cw+CinA is the total capacitance at the input, which is the sum of the sensor capacitance (Cs), interconnect capacitance (Cw), and amplifier input capacitance (CinA). Analogously, resistance Rt=Rs||Rw||RinA is the total shunt resistance at the input, due to the sensor, wire, and input amplifier. In practice amplifier gain A is high, and (1) becomes:
Figure 2 shows the schemes of the charge amplifiers that have been fabricated in a CMOS test chip. The circuit of Fig. 2(a) is the most common charge amplifier, which will be used as a benchmark for the rest of topologies presented. It is a simple integrator using an amplifier in negative feedback.
-
⎛ 1 ⎜⎜1 + sR Ct t ⎝
+
+
R1
Cf (e)
(f)
Fig. 2: Fabricated charge amplifiers (a) Conventional charge amplifier (b) Alternative implementation by ground-output swapping transformation (c) Implementation of (a) with gain sensitivity adjustment (d) Implementation of (b) with gain sensitivity adjustment (e) Using current amplifier (f) Charge amplifier by reduced cut-off frequency using a resistive T-network (g) Charge amplifier with additional high-frequency pole
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R2
(g)
Vo C2
yielding a first-order high-pass response with cutoff frequency flow=1/(2πRfCf) and sensitivity SQ=Vo/Q=-1/Cf in the passband. As can be noticed, sensitivity is independent of sensor, amplifier and interconnect parasitics due to feedback for the frequency range where A remains large. In practice, bandwidth limitation of the amplifier precludes this ideal behavior at high frequencies, so the amplifier should be designed taking this fact into account. For instance, considering a single-pole amplifier with frequency response A(s)=GB/s, where GB is the gain-bandwidth product of the amplifier, the response of the charge amplifier of Fig. 2 becomes bandpass instead of highpass, with an upper cutoff frequency of approximately
f high ≈ GB·
Cf
(3)
C f + Ct
reducing the low cutoff frequency flow of the charge amplifier by the same amount [8]. The schemes presented so far allow control of sensitivity and low cutoff frequency of the charge amplifier. However, high-frequency operation is not controlled and may be critical if noise or resonance effects must be considered. The circuit of Fig. 2(g) introduces an additional pole at high frequencies that allows an additional roll-off beyond a given frequency. In this case the low cutoff frequency is f low =
A limitation of the two circuits presented is that sensitivity is entirely dependent on Cf, thus it cannot be adjusted without modifying this capacitor. A solution, patented by Murata [7], is shown in Fig. 2(c), consisting in the inclusion of a resistive divider in the feedback loop. Considering that R1,R2
