Polymer Liner Formation in High Aspect Ratio Through ... - IEEE Xplore

IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 3, NO. 7, JULY 2013

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Polymer Liner Formation in High Aspect Ratio Through-Silicon-Vias for 3-D Integration Cui Huang, Qianwen Chen, and Zheyao Wang, Senior Member, IEEE

Abstract— Replacing silicon dioxide with polymers that have low dielectric constants as the insulation (liner) materials is of great help in reducing the capacitive coupling of throughsilicon-vias and improving the reliability. This paper presents the fabrication of uniform poly propylene carbonate (PPC) polymer liners in high aspect ratio trenches by addressing the difficulty in coating PPC layers on via inner walls. A unique spin-coating method is developed by using vacuum treatment and solvent refill techniques for PPC liner formation for circular and annular trenches. Vacuum treatment and solvent refill facilitate PPC filling in high aspect ratio vias by preventing formation of air bubbles in the vias. By investigating the flow behaviors of PPC precursors and optimizing the spin-coating parameters, an optimal fabrication process is achieved. Using this newly developed technique as well as the optimized processing parameters, uniform PPC liners are successfully fabricated on the inner walls of circular vias with coating aspect ratio greater than 9:1 and the annular vias with filling aspect ratio of 24:1. Index Terms— Insulator, poly propylene carbonate (PPC), polymer, spin-coating, void-free.

I. I NTRODUCTION

W

ITH the continuous demand for high performance, small size, low power, and multifunctional semiconductor devices, it will no longer be possible to achieve the desired performance through scaling down alone. 3-D integration, which can integrate different functional devices with vertical through-silicon-vias (TSVs) in the 3-D, is emerging as an enabling technology and a new driving force for keeping Moore’s Law [1]–[5]. The prominent value of TSVs lies in bridging multiple chips by means of short and dense interconnects through the substrates, which provides wide bandwidth, low power consumption, small signal delay, and small footprint, as well as possibility of heterogeneous integration of different technologies. The propagation delay and the power consumption of TSVs are roughly proportional to their capacitance, hence it is highly desired to reduce TSV capacitance and capacitive coupling for high-speed applications. As TSV capacitance is proportional to the dielectric constant of the insulation layer (liner) between Manuscript received March 23, 2012; revised September 6, 2012 and April 12, 2013; accepted April 17, 2013. Date of publication May 27, 2013; date of current version July 2, 2013. This work was supported in part by the 973 Program under Grant 2011CBA00603 and NSFC under Grant 61271130. Recommended for publication by Associate Editor P. McCluskey upon evaluation of reviewers’ comments. The authors are with the Institute of Microelectronics, Tsinghua University, Beijing 100084, China (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2013.2259541

the substrate and the copper plugs, one promising way to reduce TSV capacitance is to use polymer materials that have low dielectric constants to replace common silicon dioxide as the liner materials [6], [7]. In future high-speed systems, for which propagation delay and power consumption will be serious constraints, it is expected that using spin-on dielectric (SOD) polymers as the isolation layer of deep TSVs could provide a competitive solution. In addition to performance, SOD is also expected to benefit TSV reliability. Because of the large mismatch in the coefficient of thermal expansion (CTE) between copper and silicon, large stresses are induced in both the copper plug and the surrounding silicon by the CTE mismatch. The thermal stress is a serious concern from the reliability point of view. The soft feature of polymers allows them to be a good candidate as a stress buffer layer by decaying the induced thermal stresses [8], [9]. To realize high densities of vertical interconnects with SOD polymers, the technology for fabrication of polymer liners in high aspect ratio TSVs needs to be developed. One critical challenge in fabrication of polymer liners is to coat uniform polymer layers onto the TSV inner walls. Because of the viscous feature of polymers and the high aspect ratio of TSVs, both spin-coating and spray-coating techniques are insufficient in depositing uniform liners in deep TSVs, and thus the ability of polymer coating methods are limited for deep trench coating, unlike in-situ chemical vapor deposition. Methods for polymer filling in deep trenches instead of coating are investigated. Duc presented the use of negative photosensitive SU8 polymer to fill deep trenches with 65-µm length, 3-µm width, and 50-µm depth [10]. Mahfoz–Kotb showed that benzocylcobutene (BCB) is capable of filling 3-µm wide and 100-µm deep trenches [11]. Chausse reported a vacuum-driven via filling method to remove the air bubbles trapped in the vias [12]. Dang investigated the influence of the polynorbornene viscosity [13], and concluded that a low viscosity material can be a better candidate for coating the inner wall of deep trenches. Ko used solid polymer films and applied heat and pressure to reflow the films for via filling [14]. These investigations provide solutions to completely filling deep trenches with polymers rather than coating. More recently, IMEC proposed a polymer liner fabrication method by etching annular trenches, filling trenches with polymer, and then etching the silicon post in the annular polymer [15] and [16]. Using this method, polymer liners with internal diameter of 25 µm, thickness of 5 µm, and height of 50 µm were successfully fabricated. These progresses provide potential solutions to the problem of polymer liner fabrication in high aspect ratio vias, and so far to our knowledge there is no report concerning the method

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for effectively coating polymer liners on the inner walls of high aspect ratio circular vias. To address this problem, we develop a spin-coating method with special vacuum treatment and solvent refill techniques to coat polymer in high aspect ratio vias with circular or annular shapes. The details of the vacuum treatment and solvent refill are presented, and the optimization results with respect to polymer precursor composition, viscosity, spin-coating parameters are reported.

II. P OLYMER L INER FABRICATION M ETHODS

Fig. 1. Schematic illustration of the polymer lined TSV. (a) Cross-sectional view. (b) Top view along the dashed line.

A. Materials The key issue in polymer liner fabrication is the formation of polymer cladding. To completely coat the inner wall of high aspect ratio vias, polymer materials and the coating conditions need to be carefully selected to realize optimal filling. Commonly used polymers, including poly propylene carbonate (PPC), polyimide, and BCB are selected and evaluated as potential candidates. In this paper, we use PPC as an example to illustrate the coating techniques. PPC has the advantages of ease in obtaining smooth surface, readily adjustable viscosity of precursors (solid PPC dissolved in solvent), good fluidity, and relatively low curing temperatures (< 200 °C). In addition, using Ti/W as an adhesion layer, copper seed layers can be deposited on PPC surfaces. These characteristics enable the PPC coating process fully CMOS-compatible. PPC with an averaged molecular weight of 50 000 g/mol is purchased from Sigma–Aldrich (product No. 389 021). Original PPC material is in solid-state form at room temperature, and should be dissolved into anisole solvent and further diluted to proper concentrations before deployed to patterned substrates. Because of the hydrophilic property of anisole solvent, it is not necessary to perform extra pretreatment on the substrate surface such as wettability improvement. Through exploiting the violation of anisole, fast separation of PPC from unnecessary solvent after trenching filling can be obtained. To obtain appropriate solution viscosity, the concentration of PPC precursors (in weight ratio) is optimized through experimental evaluation.

B. Schematics The schematic structure of a polymer liner TSV is shown in Fig. 1. It consists of a circular through-via in the substrate, an annular polymer liner on the inner wall, and a copper plug surrounded in the polymer liner. The straightforward way to fabricate the polymer liner is coating a polymer layer on the sidewalls of deep circular vias, which has the advantages of ease of fabrication and low cost. However, coating uniform polymer layers on the sidewalls of vias with high aspect ratios is rather challenging. Another approach is to fabricate annular deep trenches and fill the trenches completely with polymers, followed by etching away of the silicon post in the polymer. This paper focuses on fabrication of polymer liners for both circular and annular trenches with different diameters and depth, and does not involve in fabrication of metal conductors.

Si

Si (a)

Si (b)

(c)

Si (d) Al

Photoresist

Polymer

Fig. 2. Polymer filling in annular trenches. (a) Sputtering Al hard mask and patterning. (b) ICP etching and mask strip. (c) Void-free polymer filling in deep trenches. (d) Silicon post etching. TABLE I D IMENSIONS OF V ERTICAL T RENCHES Trench Shape

Depth (µm)

Ring

60–80

Diameter (µm) 10/15, 10/20, 10/25, 20/25, 20/30, 20/35 (internal/external)

Circle

55–80

5, 10, 15, 20, 25

C. Annular Trench Filling Fig. 2 shows the fabrication of annular trenches and the polymer filling procedures. A 200-nm aluminum film is first sputtered onto a silicon wafer, and patterned by photolithography and reactive ion etching (RIE), to serve as the hard mask for the following trench etching. Then deep reactive ion etching (DRIE) is performed to etch annular trenches into the silicon substrate, followed by Al mask removal using wet etching. The internal and the external diameters of the annular trenches are shown in Table I, as well as the depth. To fill the deep trenches, a double pressure-driven filling technique is developed for polymer filling. The filling processes include four steps. First, PPC precursors with a particular concentration are spin-coated on the substrate at 1000-r/min low rotation speed to obtain a thick PPC layer, which provides sufficient PPC supply for the whole filling process. Second, the substrate together with the PPC layer is placed in a vacuum chamber at room temperature for 30 min to remove the trapped air bubbles in the trenches by

HUANG et al.: POLYMER LINER FORMATION IN TSVs FOR 3-D INTEGRATION

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TABLE II V ISCOSITY OF PPC P RECURSOR

Si

Si (a) Al

PPC C ONTENT (wt%) 5 10 15

Si (b)

Photoresist

Viscosity (cP) 18 40 60

(c) Polymer

Fig. 3. Polymer coating in circular vias. (a) Sputtering Al hard mask and patterning. (b) ICP etching of deep trenches. (c) Via side-wall coating.

the pressure difference. Third, the substrate is applied with anisole solvent and treated in vacuum for another 30 min. The anisole solvent dissolves the partially solidified PPC in the trenches and restores the fluidity, which facilitates the removal of the air bubbles in vacuum treatment and improves the filling results. Because air bubbles in the trenches are fatal defects for polymer liners and could occur during spin-coating, the solvent refill and double vacuum treatment is critical to complete filling the trenches. Finally, the PPC is soft-baked at 110 °C for 30 min to completely eliminate the anisole solvent and solidify the PPC polymer in the trenches. Because of the highly volatile property of anisole, no residual anisole is found in PPC liners after thermal treatment.

Fig. 4. SEM cross-sectional results of 15-µm circular vias after PPC spin-coating. (a) 5 wt% PPC. (b) 10 wt% PPC. (c) 15 wt% PPC.

D. Circular Via Coating Coating polymer on the inner walls of circular trenches is more challenging than filling annular trenches [17]. Because of the good flow ability of PPC precursor, a coating technique for direct inner wall deposition is developed. As shown in Fig. 3, an aluminum hard mask is sputtered on a silicon wafer and then patterned by photolithography and RIE etching. DRIE is then performed to etch circular vias. The diameters and the depths of the circular vias are shown in Table I. A unique four-step coating process is developed for circular via coating, among which three steps are identical to those for annular trench filling. First, 1000-r/min spin-coating is employed to coat a thick PPC layer on the substrate. Second, the substrate is placed in a vacuum chamber for 30 min to vent the air bubbles in the vias. Third, the substrate is applied with anisole solvent and rotated at a high speed of 3000 r/min for solvent refill, during which the redundant PPC in the vias is expelled and the remaining PPC forms a thin film on surface of the inner wall. This step is critical to form thin film by changing PPC from filling to coating. Finally, the PPC is softbaked at 110 °C for 30 min to completely evaporate the anisole solvent and solidify the PPC polymer. III. R ESULTS AND D ISCUSSION A. PPC Precursor Concentration To obtain the optimal concentration, PPC precursors with different concentrations are prepared in anisole solvent for evaluation, namely 5%, 10%, and 15% in weight ratio. The measured corresponding viscosities are shown in Table II. To compare the influences of the precursor viscosity on filling results, spin-coating of different precursors onto silicon wafers

patterned with 15-µm diameter circular vias is carried out using identical processing parameters. As coating circular vias is more difficult than filling annular trenches, circular vias are used to evaluation the PPC concentration. PPC precursors with 0.05 ml/in2 are dispensed at the substrate center, and then the wafer is rotated at 1000 r/min for 15 s to spin the precursor uniformly, followed by a main spinning step at speed of 3000 r/min for 60 s and soft-bake at 110 °C. The resulting polymer films on the inner walls of the vias are evaluated by cross section inspection with scanning electron microscopy (SEM), and the results are shown in Fig. 4. It can be found that for precursors with concentration of 5% and 10%, thin PPC films are formed on the sidewalls of the vias even without surface pretreatment for wettability improvement. As expected, the thickness of the 10% concentration is greater than that of 5% concentration because of the increased viscosity and PPC quantity. For the precursor with 15% concentration, a PPC interceptive diaphragm occurs on the middle position of the vias. This self-sealing phenomenon could be due to the relatively large viscosity of the precursor. The PPC seals an air cavity at the lower part of the via, and fast volatilization of anisole forms a rather strong diaphragm and it cannot be broken even with high-speed spinning. It is also found that only upper sidewall is coated with PPC when using a small quantity of precursor, and the trenches are filled with PPC rather than coated when using sufficient precursor. From these results, it can be concluded that the PPC concentration and the resulting viscosity of the precursor are the key factors to deep trench coating. The preliminary results suggest that the PPC with concentrations lower than 15% are applicable to filling or coating trenches. From the efficiency

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(a)

(b)

(c)

(d)

(e)

(f)

Fig. 5. Cross-sectional SEM of annular trenches after polymer filling with single pressure-driven process. Internal-external diameters of (a) 10–15 µm. (b) 10–20 µm. (c) 10–25 µm. (d) 20–25 µm. (e) 20–30 µm. (f) 20–35 µm.

(a)

(b)

(c)

(d)

Fig. 6. Cross-sectional SEM of annular trenches after polymer filling with double pressure-driven processes. Internal-external diameters of (a) 10–15 µm. (b) 10–25 µm. (c) 20–25 µm. (d) 20–35 µm.

point of view, 10% concentration is preferred to 5% to achieve fast filling, and 5% is better for thin film coating. It should be noted that the viscosities of the PPC precursors are much lower than those of BCB and other polymers in [16]. This is because the anisole solvent has a lower viscosity than other solvents, and the concentration of the PPC used are around 10%, which is much lower than those used in [16], around 40%–50%. B. Polymer Filling in Annular Trenches For annular trenches, as the space for metal plug is occupied by the silicon post during coating and the polymer in the annular trench acts as the liner after removing the silicon post, it is highly desired to completely fill the entire trenches without forming any voids or seams. The nominal depth of the trenches is 80 µm; however, because of the RIE-lag effect, the actual depth varies with the width of the trenches. Both the single pressure-driven and the newly developed double pressure-driven processes are employed to fill the annular trenches with 10% PPC solution dispersed with 0.2 ml/in2 , and their cross-sectional SEM photos are shown in Figs. 5

TABLE III A NNULAR T RENCHES F ILLING R ESULTS InternalExternal Diameter (µm)

Depth (µm)

10–15 10–20 10–25 20–25 20–30 20–35

60 70 77 60 70 77

Single PressureDriven Process Bottom voids Fully filled Partially filled Bottom voids Fully filled Partially filled

Double PressureDriven Process Fully filled Fully filled Fully filled Fully filled Fully filled Fully filled

and 6, respectively. The internal and the external diameters, the depth, and the filling results using single pressure-driven and double pressure-driven filling processes are shown in Table III. It can be seen from Fig. 5 that void-free filling is achieved for annular trenches with 5-µm width (including diameters of


(a)

(b)

1111

(c)

(d)

(e)

Fig. 7. SEM cross-sectional results of circular vias coated with normal spin-coating. Diameters of (a) 5 µm. (b) 10 µm. (c) 15 µm. (d) 20 µm. (e) 25 µm.

(a) Fig. 8.

(b)

(c)

(d)

SEM cross-sectional results of circular vias coated by four-step spin-coating. Diameters of (a) 5 µm. (b) 10 µm. (c) 15 µm. (d) 20 µm.

10–20 and 20–30 µm) using single pressure-driven method. However, as the width decreases to 2.5 µm (including diameters of 10–15 and 20–25 µm), air voids were formed at the bottom of the trenches. For the trenches with 7.5-µm width (including diameters of 10–25 µm and 20–35 µm), the trenches are partially filled because of the lack of sufficient PPC. From the experimental results, it can be concluded that the trench width instead of the trench diameter is the dominant factor for complete filling, and complete filling can be achieved for trenches with 5-µm width and greater. The void formation is associated with coating step. In case that the voids are formed during coating, they remain if the force caused by vacuum treatment is insufficient to break through the polymer. During vacuum treatment, a pressure difference as large as one atmospheric pressure is induced between the top and the bottom surfaces of the blocking polymer. This imposes a force on the polymer diaphragm tending to break it, such that the air bubbles can escape from the trenches. As the force equals to the product of the diaphragm area and the pressure difference, the diaphragm in wide trenches has a larger force and a relatively low strength, and therefore is easier to be broken by the pressure difference.

During vacuum treatment, the anisole solvent volatilizes because of high volatility, and the PPC precursor viscosity increases with time, which prevents further trench filling by either forming hard PPC diaphragm or decreasing the fluidity. This results in initial voids in the trenches during coating, and is the critical factor that determines the filling results. To validate this hypothesis, a compensated anisole refill is performed after the pressure-driven process by coating anisole solvent again on the wafers to dilute or even dissolve the surface hardened PPC precursor, followed by another 30-min vacuum treatment. Solvent refill restores the PPC precursor to its initial fluidity, and accelerates the PPC to be transferred into the trenches and facilitates the air bubble removal. Fig. 6 shows the cross-sectional SEM photos of the trenches filled using double pressure-driven method. It can be seen that using the solvent refill and double pressuredriven method, all the trenches regardless the trench width are completely filled with PPC, indicating that the anisole refill and the double pressure-driven are efficacious in deep trench filling. The largest aspect ratio demonstrated in this paper reaches 24:1 for the annular trenches with internal and external diameters of 10 and 15 µm, and

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TABLE IV TSV A NNULARLY F ILLING P ERFORMANCES Diameter (µm)

Depth (µm)

Thickness of Cladding Films (µm) Normal Coating

Four-Step Coating

5

56

X

1.0

10

67

X

1.5

15

74

1.6

1.7

20

80

2.3

2.8

25

86

3.5

−

this method has the potential to fill trenches with even greater aspect ratios. It can be concluded that eliminating the air bubbles has more significant effects than avoiding void formation during coating, and the viscosity and the fluidity are the most important factors that dominate the filling results for annular trenches. For other polymers using nonvolatile solvents, the solvent refill technique is also helpful to decreasing the viscosity and improving the fluidity. This in-situ dilution method cannot be replaced by using precursors with lower concentrations because the latter one cannot provide enough polymers in the trenches for complete filling. C. Polymer Coating in Circular Vias Despite the fact that the wide trenches can only be partially filled with single pressure-driven method, as shown in Fig. 5(c) and (f), it is interesting to note that during PPC precursor flowing into the trenches, a uniform polymer film with thickness around 2 µm is formed on the sidewall surface across the whole depth. Based on this result, a four-step coating method is developed to coat uniform polymer layers on the inner walls of circular vias. The four-step coating method is employed for PPC liner fabrication for circular vias with depth of 60–80 µm and diameters ranging from 5–25 µm. For comparison, circular vias with identical dimensions are also tested using normal coating method. The experimental results are shown in Figs. 7 and 8, respectively, and are shown in Table IV. It can be found that using normal spin-coating, the circular vias with diameters >15 µm were coated with a continuous and uniform PPC liner. The circular vias with small diameters are partially or even completely filled with PPC rather than forming a uniform liner. These results show that normal spin-coating method is applicable to large circular via coating, and small circular vias tend to be filled rather than to be coated. To address the problem of complete or partial filling in small circular vias, an additional solvent refill and spinning is adopted. Anisole solvent is recoated on the wafers to dissolve the hardened PPC. Then using fast speed spinning at 3000 r/min for 60 s, the dissolved PPC is spun out from the circular vias, leaving a thin layer of PPC on the sidewall of the vias. Fig. 8 shows that using this four-step coating method, all the circular vias regardless of diameters are coated with a uniform PPC liner. It should also be noted that there is solid PPC on the base of the vias. The largest coating aspect ratio, by excluding

the solid PPC on the bottom of the vias, reaches 9:1 for the vias with 5-µm diameter and 60-µm depth. In fact, this four-step coating process is a filling and removing process, which first fills the deep vias and then removes the superfluous polymer, leaving a thin film on the via sidewall. Because of the large aspect ratio and the refill ability of anisole solvent, the PPC on the bottom of the vias are not completely dissolved during short solvent refill, causing a solid PPC on the via base. This can be alleviated by extending the duration of solvent refill or be removed by thinning the wafer from the wafer backside using mechanical grinding or chemical-mechanical polishing. IV. C ONCLUSION PPC polymer coating methods were developed for fabrication of polymer liners for high aspect ratio vias in 3-D integration. The concentration of PPC precursors was optimized with respect to filling results. A filling method based on precursor refill and double pressure-driven techniques was proposed, and annular trenches with width of 2.5 µm and aspect ratio as high as 24:1 were successfully filled without forming voids or seams. A unique four-step coating technique was developed for polymer coating on high aspect ratio circular vias by employing additional solvent refill and precursor removal. Using this technique, PPC polymer liners were successfully fabricated in circular vias with coating aspect ratio of 9:1 and diameter of 5 µm. With the increase in the trench aspect ratio, the coating aspect ratio also increased slightly. The experimental results demonstrated that the double pressuredriven method was effective in forming thick polymer liners in annular trenches, and the four-step coating was applicable to fabricating thin polymer liners in circular vias. The newly developed method can also been applied to other polymers with similar properties to fill high aspect ratio trenches. R EFERENCES [1] J. Q. Lu, “3-D hyperintegration and packaging technologies for micronano systems,” Proc. IEEE, vol. 97, no. 1, pp. 18–30, Jan. 2009. [2] R. S. Patti, “Three-dimensional integrated circuits and the future of system-on-chip designs,” Proc. IEEE, vol. 94, no. 6, pp. 1214–1224, Jun. 2006. [3] J. U. Knickerbocker, P. S. Andry, B. Dang, R. R. Horton, M. J. Interrante, C. S. Patel, R. J. Polastre, K. Sakuma, R. Sirdeshmukh, E. J. Sprogis, S. M. Sri-Jayantha, A. M. Stephens, A. W. Topol, C. K. Tsang, B. C. Webb, and S. L. Wright, “Three-dimensional silicon integration,” IBM J. Res. Dev., vol. 52, no. 2, pp. 553–569, 2008. [4] T. S. Cale, J.-Q. Lu, and R. J. Gutmann, “Three-dimensional integration in microelectronics: Motivation, processing, and thermomechanical modeling,” Chem. Eng. Commun., vol. 195, no. 8, pp. 847–888, 2008. [5] A. W. Topol, D. C. La Tulipe, Jr., L. Shi, D. J. Frank, K. Bernstein, S. E. Steen, A. Kumar, G. U. Singco, A. M. Young, K. W. Guarini, and M. Ieong, “Three-dimensional integrated circuits,” IBM J. Res. & Dev., vol. 50, no. 4.5, pp. 491–506, 2006. [6] Y. Civale, D. S. Tezcan, H. G. G. Philipsen, F. F. C. Duval, P. Jaenen, Y. Travaly, P. Soussan, B. Swinnen, and E. Beyne, “3-D wafer-level packaging die stacking using spin-on-dielectric polymer liner throughsilicon vias,” IEEE Trans. Compon., Packag., Manuf. Tech., vol. 1, no. 6, pp. 833–840, Jun. 2011. [7] Z. Xu and J.-Q. Lu, “High-speed design and broadband modeling of through-strata-vias (TSVs) in 3D integration,” IEEE Trans. Compon. Packag. Manuf. Tech., vol. 1, no. 2, pp. 154–162, Feb. 2011. [8] K. H. Lu, X. Zhang, S. K. Ryu, J. Im, R. Huang, and P. S. Ho, “Thermo-mechanical reliability of 3-D ICs containing through silicon vias,” in Proc. 59th IEEE Electron. Comput. Tech. Conf., May 2009, pp. 630–634.


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[9] S. Ryu, K. H. Lu, X. Zhang, J. Im, P. S. Ho, and R. Huang, “Impact of near surface thermal stresses on interfacial reliability of through-siliconvias for 3-D interconnects,” IEEE Trans. Devices Math. Rel., vol. 11, no. 1, pp. 35–43, Aug. 2010. [10] T. Chu Due, J. Wei, P. M. Sarro, and G. K. Lau, “Integrated siliconpolymer laterally stacked bender for sensing microgrippers,” in Proc. 5th IEEE Sens. Conf., Oct. 2006, pp. 662–665. [11] H. E. M. Kotb, K. Isoird, F. Morancho, L. Théolier, and T. D. Conto, “Filling of very deep, wide trenches by benzocyclobutene polymer,” Microsyst. Technol., vol. 15, no. 9, pp. 1395–1400, 2009. [12] P. Chausse, M. Bouchoucha, D. Henry, N. Sillon, and L. L. Chapelon, “Polymer filling of medium density through silicon via for 3-D packaging,” in Proc. 11th IEEE Electron. Packag. Tech. Conf., Mar. 2009, pp. 790–794. [13] B. Dang, P. Joseph, M. Bakir, T. Spencer, P. Kohl, and J. Meindl, “Wafer level microfluidic cooling interconnects for GSI,” in Proc. IEEE Int. Interconnect Technol. Conf., Jun. 2005, pp. 180–182. [14] H. S. Ko, J. S. Kim, H. G. Yoon, S. Y. Jang, S. D. Cho, and K. W. Paik, “Development of three-dimensional memory die stack packages using polymer insulated sidewall technique,” IEEE Trans. Adv. Packag., vol. 23, no. 2, pp. 252–256, May 2000. [15] D. S. Tezcan, F. Duval, H. Philipsen, O. Luhn, P. Soussan, and B. Swinnen, “Scalable through silicon via with polymer deep trench isolation for 3D wafer level packaging,” in Proc. 59th IEEE Electron. Comput. Techol. Conf., May 2009, pp. 1159–1164. [16] F. F. C. Duval, C. Okoro, Y. Civale, P. Soussan, and E. Beyne, “Polymer filling of silicon trenches for 3-D through silicon vias applications,” IEEE Trans. Comput. Packag. Manuf. Tech., vol. 1, no. 6, pp. 825–832, Jun. 2011. [17] C. Rusu, G. Klaasse, S. Sedky, H. Esch, B. Parmentier, A. Verbist, and A. Witvrouw, “Planarization of deep trenches,” Proc. SPIE, vol. 4557, pp. 49–57, Sep. 2001.

Cui Huang received the B.E. degree in electronic engineering from Xidian University, Xi’an, China, in 2010. She is currently pursuing the Ph.D. degree with the Institute of Microelectronics, Tsinghua University, Beijing, China. Her current research interests include micro-fabrication and 3-D integration.

Qianwen Chen received the B.S. degree in electrical engineering from the Huazhong University of Science and Technology, Wuhan, China, in 2006, and the Ph.D. degree in microelectronics from Tsinghua University, Beijing, China, in 2011. She was a visiting student with Prof. James Lu’s Group, Rensselear Polytechnic Institute, Troy, NY, USA, from 2009 to 2010. Her current research interests include 3-D integration and related technologies.

Zheyao Wang (M’07–SM’13) was born in China in 1972. He received the B.S. degree in mechanical engineering and the Ph.D. degree in mechatronics from Tsinghua University, Beijing, China, in 1995 and 2000, respectively. He was a Post-Doctoral Research Fellow with the Institute of Microelectronics, Tsinghua University, from 2000 to 2002, where he worked on silicon micromachining for microsensor applications. In 2002, he joined DIMES, Delft University of Technology, Delft, The Netherlands, as a postDoctoral Researcher, and worked on silicon micromachined components for 3-D packaging. He currently is a Full Professor with Tsinghua University. His current research interests include microsensors, 3-D integration, and MEMS.