To develop a Schematic/Block diagram and VHDL program of MPPT controller and ..... Built-in USB Blaster for FPGA configuration. ⢠Line In/Out ... Memory. ⢠128 MB SDRAM, 2 MB SRAM, 8 MB Flash. ⢠SD memory card slot. Displays ...... micro grid standalone photovoltaic system,' IEEE Transaction on Power. Electronics.
1
CHAPTER 1
INTRODUCTION
1.1
Project Background
Photovoltaic (PV) system is rapidly inclined and widely used in electric power technologies, brought more secure power sources and pollution free supplies. Power sources in photovoltaic applications are generated by solar panel. Solar arrays are converted to electrical power. As it is clean and free pollution power resources, the proposed project is aligned with the 2009 National Green Technology Policy [1], which is to facilitate in the growth of green technology industry and to increase national capability for innovation in green technology development. In addition, the architecture of solar panels have low efficiency in energy conversion and high fabrication cost [2]. By the implementation of maximum power point tracking (MPPT) [3], it can overcome the cons of solar panel. Maximum Power Point Tracking, MPPT, is basically an electronic system that engages the Photovoltaic (PV) modules, allowing the modules to be adequate to produce the maximum power. MPPT is not a machine that point and move directly to certain high intensity solar array but a system controlling the electrical operating point [4]. The module is capable to distribute maximum power.
2
The study of MPPT has two major approaches: dc-dc converter topology optimization; and maximum power point tracking algorithm [5]. The dc-dc converter topology is a technique to resolve an applicable dc-dc converter for operating as MPPT. On the other hand, the maximum power point tracking algorithm is applied to regulate the dc-dc converter. The regulation made by the maximum power point tacking algorithm is to generate the top Maximum Power Point (MPP). In conclusion, a dynamic MPPT system needs to be formed by the integration of a suitable dc-dc converter (hardware) and tracking algorithm (software). By looking at the MPPT tracking algorithm point of view, various techniques of MPPT can be used. These methods are hill climbing, voltage feedback, current feedback, perturb and observation, incremental conductance, fuzzy logic and neural network [6]. Between these methods, hill climbing and voltage feedback are easy to apply but not efficient in the maximum power point tracking with variations of environment conditions. Plus, perturb and observation technique has drawback as it process an extra P-I control loops which causes slow tracking process. Furthermore, the neural network based algorithm is hard to implement. The Adaptive Fuzzy Logic Inference System based algorithm is one of the most efficient technique in maximum power point tracking [7]. The combination of developed fuzzy logic and neural network algorithm is able to track the maximum power point with a proper speed. Plus, the fuzzy logic algorithm shows a very dynamic response with all environment conditions. In the same time, the implementation of this algorithm is possible with available components at a lower cost. Nowadays, there are many technologies and methods to implement the MPPT algorithm such as Microcontroller based implementation, Field Programming Gate Array (FPGA) based implementation and Digital Signal Processing based implementation [8]. Field Programming Gate Array (FPGA) based implementation provide many advantages compare to microcontroller and Digital Signal Processing (DSP) implementation. The FPGA has runtime advantages compare to microcontroller. Plus, the FPGA is capable to execute operation both continuously and simultaneously faster than Digital Signal Processing (DSP) [9]. Since DSP can only perform DSP-related
3
computation, FPGA is able to integrate various functions and components onto the same chip, thus makes FPGA low implementation cost. Additionally, FPGA supports higher performance with the customization potential of an application-specific integrated circuit (ASIC). Thus, it is convenient in processing complex algorithm. In addition, the FPGA is able to customize and update the MPPT control system even when it is running [10].
1.2
Problem Statement
The photovoltaic (PV) systems are widely used in various field. However, unpredictability of solar array makes photovoltaic (PV) systems less reliable. This caused the conversion efficiency of electric power generation very low. There are three main factors that affect power conversion efficiency; cell temperature, solar irradiation and series system of solar panel. The cell temperature and solar irradiation is an unsteady variable because it changes according to the weather. This will give uncertainty of the maximum power generated. Therefore, this project proposes to develop an Adaptive Neuro Fuzzy Inference System (ANFIS) controller which applies the use of Maximum Power Point Tracking (MPPT) using FPGA that aims to control and maximizes the output maximum power.
1.3
Project Objectives
The primary objective of this project is to develop the FPGA based MPPT controller of photovoltaic system. In addition, this project has various objectives, which comprise of: i.
To design an Adaptive Neuro Fuzzy Inference System (ANFIS) algorithm simulation for maximum power point tracking by using MATLAB/SIMULINK.
ii.
To develop a Schematic/Block diagram and VHDL program of MPPT controller and simulate using QUARTUS II.
iii.
To compare the result of MATLAB and QUARTUS II simulation.
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1.4
Project Scope
The scope of this project is limit to: i.
The MPPT algorithm applied FPGA based, in charge for controlling the dc-dc converter in order to establish the system operating point as close as possible to the Maximum Power Point (MPP).
ii.
Use VHDL and Block Diagram to put the algorithm into FPGA and simulate the MPPT controller using QUARTUS II software.
iii.
Use MATLAB-SIMULINK and Altera QUARTUS II to verify the result.
5
CHAPTER 2
LITERATURE REVIEW
2.1
Introduction
This chapter is about the discussion of all the summarized information of the relevant studies to implement FPGA on designing the MPPT method for PV system. The QUARTUS II software implemented using Block Diagram/Schematic and VHDL programming for Field Programmable Gate Array (FPGA) and the features of Altera DE2 board. Furthermore, this chapter is also discussing about a study on the previous research based on journals and conferences. The sources of the literatures review are from journals, conferences and books.
2.2
Photovoltaic System
Photovoltaic is a technique in converting abundance solar rays into electrical energy. This method is applied by using the semiconductor materials. The generation of power from PV module is clean and sustainable energy. The abundance solar rays is drawn from the sun to make a renewable energy sources. Photovoltaic system is a system designed in converting solar rays into electrical energy efficiently. The system consists of certain part of components. The components
6
are arranged in order, to generate the maximum power [11]. There are several components in photovoltaic system which are solar panels, battery, inverter and charge controller as depicted in Figure 2.1.
Figure 2.1: The components arrangement of photovoltaic system.
The first component of photovoltaic system is solar panel. The solar panel is responsible in absorbing the solar ray and converting it into electricity. The second component is solar inverter which convert the electrical current from DC to AC. In the solar inverter, it has a solar tracking system which is designed to improve the system performance. The output power will be stored in batteries. The charge controller is responsible in driving the output power to the maximum. Lastly, the power generated will be transferred to load for industrial or daily uses.
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2.3
Solar Panel
In designing PV system, the first part of PV system is solar panel. Solar panel is the most important part of solar system as it captures the sun energy and converts it to electrical energy. There are mainly three types of solar panels; monocrystalline, polycrystalline and thin film [12]. The monocrystalline solar cell is made of monocrystalline silicon (mono-Si), also known as single-crystalline silicon (single-crystal-Si), are quite easily recognizable by an external even coloring and uniform look, indicating high purify silicon. Monocrystalline solar cells are made of silicon ingots, which are cylindrical in shape. To optimize performance and lower costs of a single monocrystalline solar cell, four sides are cut out of the cylindrical ingots to make silicon wafers. The polycrystalline silicon, also called polysilicon (p-Si) and multi-crystalline silicon (mc-Si). Despite from monocrystalline-based solar panels, polycrystalline solar panel does not require the Czochralski process. Raw silicon is melted and poured into a square mold, cooled and cut into perfectly square wafers. The thin-film solar panel is made of one or several thin layers of photovoltaic material onto a substrate. The different types of thin-film cells can be categorized by which photovoltaic material is deposited onto the substrate; Amorphous silicon (a-Si), Cadmium telluride (CdTe), Copper indium gallium selenide (CIS/CIGS), and Organic photovoltaic cells (OPC).
8
Table 2.1: Characteristics of solar panel types Monocrystalline Characteristics
Made out of the
Polycrystalline
Simpler
Thin-film
Simple
highest-grade
making
mass
silicon.
process and
production.
Highest
low cost.
Flexible.
Less silicon
High
efficiency.
Space efficient.
Long lasting.
Better
waste.
temperature
Lower heat
and
tolerance.
shading.
performance even at low-light conditions.
In this project, polycrystalline-based solar panel is used as it low cost and simple.
2.3.1
Solar Panel Model
In solar panel model, single diode model is proposed. Plus, there are plenty of researches about the model regarding in extracting parameters of single diode photovoltaic modeling. Figure 2.2 shows the circuit of single-diode model.
9
Figure 2.2: Single diode model of PV solar panel In this project, PV module, SM140P solar panel is used. SM140P is produced by SM Solar is polycrystalline-based solar panel. In the next chapter, the mathematical modelling will be deriving according to single-diode model and parameter from SM140P module. The electrical characteristic of SM140P is described in Table 2.2. Table 2.2: Electrical characteristics of SM140P PV module Electrical Characteristic
SM140P
Maximum power, (Pmax)
140W
Voltage of Pmax, (Vmp)
17.2V
Current of Pmax, (Imp)
8.14A
Short-circuit current, (Isc)
8.61A
Open-circuit voltage, (Voc)
21.6V
Short-circuit current temperature coefficient
(0.065±0.015)%/oC
Open-circuit voltage temperature coefficient
-(80±10)%/oC
Peak power temperature coefficient NOCT (Air 20oC; Sun 0.8kW/m wind 1m/s) Operating temperature Maximum system voltage Power tolerance
-(0.5±0.05)%/oC 47±2oC -40oC to 85oC 1000V DC ±3%
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2.4
Photovoltaic (PV) Generation
Photovoltaic (PV) modules output power relies on cell temperature and solar irradiation. The temperature influences the photovoltaic (PV) module output voltage, while the solar radiation mainly effects the photovoltaic (PV) module output current. Since P = IV where P is power in Watt (W), I is current in Ampere (A) and V is Voltage in Volt (V), the power increases as I and V increases. In real life, weather differs from time to time, therefore it will cause fluctuations in temperature and solar radiation, resulting in a non-linear and time variant power source. The I-V curve presented at Figure 2.3 is obtained from Kyocera KC200GT PV module datasheet [13].
Figure 2.3: I-V curve from Kyocera KC200GT PV module. (a) Under constant temperature, T = 25oC (b) under constant temperature, G = 1000 W/m2 In PV system, the operation point is obtained on the knee of I-V curve. For a given solar radiation and temperature, the product of PV output voltage and current at maximum available power is usually known as Maximum Power Point (MPP) [14]. For emphasizing the maximum power point, an alternative P-V (power versus voltage) curve may be plotted, in accordance with Figure 2.4.
11
Figure 2.4: P-V curve from Kyocera KC200GT PV module obtained by simulation: (a) under constant temperature, T = 25oC and (b) under constant solar radiation, G = 1000W/m2 In MPP point of view, there are several parameters for completing the PV module characterization. The parameters are short circuit current (Isc), open circuit voltage (Voc), current at maximum point (Impp), and power at maximum point (Pmpp). These parameters represent the points where the PV generated power is zero, but the current and voltage reach the maximum as shown in Figure 2.5.
Figure 2.5: Maximum power point identification of Isc, Voc, Impp and Pmpp on the I-V and P-V curves.
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2.5
Maximum Power Point Tracking (MPPT)
The sun energy is converted to electrical energy. It is converted based on the conversion efficiency. High conversion efficiency is accomplished when the photovoltaic module operates on the maximum power point [15]. However, due to uncertainty of solar radiation and temperature, it affects the power point. This leads to vary I-V curve, as illustrates on Figure 2.6.
Figure 2.6: MPP across the I-V curves under varies solar radiation and temperature.
Dealing with varies solar radiation and temperature, the MPP is also varies. Therefore, in order to dynamically set the MPP as operating point for wide range of inputs (solar radiation and temperature), Maximum Power Point Tracking (MPPT) technique is adopted [16]. MPPT application is basically a DC-DC converter placed between the photovoltaic modules and the load aided with tracking algorithm, as illustrated in Figure 2.7.
13
Figure 2.7: MPPT system consists of DC-DC converter and tracking algorithm
The study of MPPT has two major approaches: dc-dc converter topology optimization; and maximum power point tracking algorithm. The dc-dc converter topology is a technique to resolve an applicable dc-dc converter for operating as MPPT. On the other hand, the maximum power point tracking algorithm is applied to regulate the dc-dc converter [14]. The regulation made by the maximum power point tacking algorithm is to generate the top Maximum Power Point (MPP). In conclusion, a dynamic MPPT system is designed by combining the integration of suitable dc-dc converter and adequate tracking algorithm [17], resulting in some desire aspects: i.
Low cost design;
ii.
Simple implementation;
iii.
Fast tracking response (dynamic analysis);
iv.
Capable to track MPPT for wide range of solar radiation and temperature;
v.
Accurate (steady-state analysis);
vi.
Supply power to load for up to 30% of charge duration.
14
2.5.1
Tracking Algorithm
For controlling the dc-dc converter, an adequate tracking algorithm is required. The tracking algorithm performance is fundamental for an efficient tracking response. Basically the tracking algorithm will receive the inputs which are PV module voltage and current and cooperates with dc-dc converter duty cycles that establishes the system operating point of MPP [18]. As the temperature and solar radiation are dynamic variables, the tracking algorithm must practically work in real time updating the duty cycle for a fast and accurate tracking. There are several algorithms for improving the tracking speed and accuracy [19]. Plus, the algorithm efficiency is directly associated to the complexity of the tracking algorithm design. Therefore, the more complex the tracking algorithm, the more complex to design. The most commonly employed of MPPT tracking algorithm which are Constant Voltage, Perturb and Observe (P&O) and Incremental Inductance (IncCond) [20]. For constant voltage implementation, the voltage across the PV terminals clamped at a fixed value, normally specified to ensure the maximum power transfer on the STC. Once a single voltage sensor is needed, it is featured by simplify of implementation and low cost, but for any temperature change, the PV operating point is set out of the MPP. In P&O tracking algorithm, the tracking response is independent on the environmental conditions, however, its implementation requires a voltage and a current sensor, increasing the cost and complexity. When in operation, the P&O algorithm calculates the PV output power and perturbs the converter duty cycle (increasing or decreasing it). After perturbation, the PV output power is recalculated and, if it was increased, the perturbation is repeated on the same direction, otherwise, it is inverted. The main drawbacks associated to this method are the oscillation in steady-state, due to the constant perturbations, the slow tracking dynamic and the inability to proper operate during fast changes of solar radiation [21].
15
The Incremental Conductance (IncCond) method is featured for combining both, tracking speed and accuracy. From the voltage VPV and current IPV measurements, the algorithm calculates the photovoltaic output power PPV and its derivative in function of the voltage dPPV/dVPV, using both results to define if the duty cycle must be increased or decreased, in order to impose the system operating point on the MPP. Usually the IncCond method is implemented digitally, and the derivative is calculated by the microcontroller [22]. This technique is characterized for presenting high tracking speed (variable step) and accuracy (no oscillation), however, it is more complex than P&O, once the derivative must be calculated in real time and also require a voltage and a current sensor [23]. Table 2.3: Comparison of MPPT tracking algorithms. Method Perturb and Observe
Advantages
(P&O)
Disadvantages
Limit response at low
irradiance
Fast,
high
Perturbed
array
terminal voltage.
level.
and
Loss
generated
power.
continuous radiance variations. Incremental
Conductance (InCond)
Good performance under
Low efficiency.
Complex design.
rapidly
changing atmospheric conditions. Adaptive Neuro Fuzzy
Inference System
Combination
of
neural network and
(ANFIS)
fuzzy logic.
Best
tradeoff
between neural and fuzzy system.
Smooth adaptable.
and
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2.6
Field Programming Gate Array (FPGA)
A Field-Programmable Gate Array (FPGA) is an integrated circuit designed to be configured by the customer or designer after manufacturing. FPGA are programmed using a logic circuit diagram or a source code in a Hardware Description Language (HDL) to specify how the chip will operate. Previously, the Application-Specific Integrated Circuit (ASIC) in circuit diagrams form is used to specify the configuration. A combination of volume, fabrication improvements, research and development, and the I/O capabilities of new supercomputers have largely closed the performance gap between ASICs and FPGAs. FPGAs originally began as competitors to CPLDs (Complex Programmable Logic Device). As their size, capabilities, and speed increased, FPGAs began to take over larger and larger functions to the state where some are now marketed as full Systems on Chips (SoC). Applications of FPGAs include digital signal processing, software-defined radio, aerospace and defense systems, ASIC prototyping, medical imaging, computer vision, speech recognition, cryptography, bioinformatics, computer hardware emulation, radio astronomy, metal detection and a growing range of other areas [24]. FPGAs are increasingly used in conventional high performance computing applications where computational kernels such as FFT or Convolution are performed on the FPGA instead of a microprocessor. Compared to ASICs, FPGA offer many design advantages, including: i.
Rapid prototyping;
ii.
Shorter time to market;
iii.
The ability to reprogram in the field of debugging;
iv.
Lower NRE cost;
v.
Long product life cycle to mitigate obsolescence risk.
17
2.6.1
FPGA Technologies
In FPGA world, there are two main companies, Altera and Xilinx. These two companies comes out with a different FPGA chip architecture. In Altera, the FPGA chip architecture design is based on the Logic Element (LE) while Xilinx, is based on Logic Cell (LC). In terms of software implementation, Altera is using QUARTUS II, Xilinx on the other hand using Xilinx ISE. In FPGA basic building block, basically these two companies designing it based on four input look up table (LUT), flip fop and additional circuitry, LE and LC. Despite on different architecture of FPGA, the application is almost the same. In FPGA there are FPGA families regarding to the cost, performance and power.
Table 2.4: FPGA types. Low-cost
High
Embedded
DSP and
density
processor
LUT6
Latest
Altera
Cyclone
Stratix
Stratix GX
Stratix IV
Stratix V
Xilinx
Spartan
Virtex
Virtex II
Virtex 6,
Virtex 7,
pro, Virtex
Spartan 6
Kintex 7,
4, Virtex 5
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2.6.2
Altera Technologies
Altera Corporation is a Silicon Valley manufacturer of PLDs, reconfigurable complex digital circuits. The company released its first PLD in 1984. Altera's main products are the Stratix, Arria and Cyclone series FPGAs, the MAX series CPLDs (Complex programmable logic devices), the HardCopy series ASICs and QUARTUS II design software. The Stratix and Cyclone series FPGAs are the company's largest, highest bandwidth devices, with up to 1.1 million logic elements, integrated transceivers at up to 28 Gbit/s, up to 1.6 Tbit/s of serial switching capability, up to 1,840 GMACs of signal processing performance, and up to 7 x72 DDR3 memory interfaces at 800 MHz. Cyclone series FPGAs and SoC FPGAs are the company's lowest cost, lowest power FPGAs, with variants offering integrated transceivers up to 5 Gbit/s. In between these two device families are Arria series FPGAs and SoC FPGAs, which provide a balance of performance, power, and cost for mid-range applications such as remote radio heads, video conferencing equipment, and wire line access equipment.
2.6.3 Altera DE2-115 Board
The DE2 series has consistently been at the forefront of educational development boards by distinguishing itself with an abundance of interfaces to accommodate various application needs. Extending its leadership and success, Terasic announces the latest DE2115 that features the Cyclone IV E device [25]. Responding to increased versatile lowcost spectrum needs driven by the demand for mobile video, voice, data access, and the hunger for high-quality images, the new DE2-115 offers an optimal balance of low cost, low power and a rich supply of logic, memory and DSP capabilities.
19
The Cyclone EP4CE115 device equipped on the DE2-115 features 114,480 logic elements (LEs), the largest offered in the Cyclone IV E series, up to 3.9-Mbits of RAM, and 266 multipliers. In addition, it delivers an unprecedented combination of low cost and functionality, and lower power compared to previous generation Cyclone devices. The DE2-115 adopts similar features from the earlier DE2 series primarily the DE2-70, as well as additional interfaces to support mainstream protocols including Gigabit Ethernet (GbE) [26]. A High-Speed Mezzanine Card (HSMC) connector is provided to support additional functionality and connectivity via HSMC daughter cards and cables. For large-scale ASIC prototype development, a connection can be made with two or more FPGA-based boards by means of a HSMC cable through the HSMC connector. Figure 2.10 shows the Altera DE2-115 board while Figure 2.11 shows the block diagram of the DE2-115. The functionality and features of DE2 are shown in Table 2.5.
Figure 2.8: Altera DE2-115 board.
20
Figure 2.9: Altera DE2-115 block diagram Table 2.5: DE2-115 board information Feature FPGA
Description
Cyclone IV EP4CE115F29C7 with EPCS64 64-Mbit serial configuration device
I/O Interfaces
Built-in USB Blaster for FPGA configuration.
Line In/Out, Microphone In (24-bit Audio CODEC).
Video Out (VGA 8-bit DAC).
Video In (NTSC/PAL/Multi-format).
RS232.
Infrared input port.
PS/2 mouse or keyboard port.
Two 10/100/1000 Ethernet.
USB 2.0 (type A and type B).
Expansion headers (one 40-pin header).
21
Memory
Displays
Switches and LEDs
Clocks
2.6.4
HSMC high-speed header.
128 MB SDRAM, 2 MB SRAM, 8 MB Flash.
SD memory card slot.
Eight 7-segment displays.
16 x 2 LCD display.
18 toggle switches.
18 red LEDs.
9 green LEDs.
Four debounced pushbuttons switches.
50 Mhz clock.
External SMA clock input
External SMA clock output.
VHDL Programming
VHDL stands for VHSIC Hardware description Language. VHSIC means Very High Speed Integrated Circuit. VHDL is a hardware description language which describes the behavior of an electronic circuit or system from which the physical circuit or system can be attained of implemented. This hardware description language has become popular nowadays in the electronics design community due to its ability to easily migrate code from one system to another. Since a VHDL design is just a text file, it can be used with a wide variety of software tools without worrying about data compatibility. VHDL is a computer language used to model and synthesize digital hardware. As its title implies, VHDL is used to describe the structure or behavior of hardware, and then determine how it should operate (modeling) or how it should be built (synthesis) [27]. A programmer enters text according to the syntax of language, then use appropriate software to compile, simulate and synthesize the design. In this project, the QUARTUS II software is will be used as a compiler and simulator [28].
22
After the design process using VHDL is done, the simulation part of the waveform will be simulate using Vector Waveform File (.vwf). By using the waveform editor, the .vwf can be easily viewed and edited.
2.6.5
QUARTUS II Design Entry
The block diagram of MPPT system is design using schematic block design file (.bdf) of VHDL program. The approach is quite simple and easy to understand as it readable to all user. Figure 2.10 shows the block design file of MPPT system in QUARTUS II.
Figure 2.10: Block design file of MPPT system
23
CHAPTER 3
METHODOLOGY
3.1
Introduction
This chapter will discuss about the method used in developing the project including tool, equipment procedure and process involved in software and hardware development and implementation. The methodology process for phase one only utilizes on software (simulation) part. For phase one the simulation is carried out using MATLABSIMULINK. For phase two, the simulation is carried out using QUARTUS II and comparison between both simulations. It is virtual to simulate the system by using software to get the theoretical result before hardware designation.
3.2
Flowchart
The main tool for development of this project is MATLAB/SIMULINK application software. In first phase, the circuit simulation of solar module and design controller for MPPT system are develop. Then the second stage is designing VHDL programming and block diagram are program using QUARTUS II software. Lastly, the source code and block diagram are downloaded into Altera DE2 board. The output is analyzed in MPPT
24
output current, voltage and power. The flowchart shown on Figure 3.1 shows the flow of the software implementation.
Begin
Literature review
Designing PV module of SM140P
Testing and verification of SM140P electrical characteristic
No
Yes Designing the tracking algorithm (Neuro-Fuzzy)
No
Testing and verification of tracking algorithm
Yes A
25
A
Generate ANFIS equation
No
Testing and verification of ANFIS algorithm
Yes Simulate complete MPPT system in MATLAB
Design VHDL source code for ANFIS controller
Develop MPPT system block design file (.bdf) in QUARTUS II
No Test
Yes Result and analysis
End
Figure 3.1: Flowchart of MATLAB-SIMULINK simulation.
26
3.3
Project Development using MATLAB-SIMULINK
In this section, the implementation of MPPT system is based on the tracking controller and PV module applied. For first phase, start with designing, modeling and verification of PV module designed in MATLAB-SIMULINK. The designation of tracking controller and verification are described in the next phase. Lastly, the inputs and output data are taken to generate the algorithm and mathematical expression of tracking algorithm.
3.3.1
SIMULINK Modeling of Photovoltaic Module
PV module will be constructed by using the fundamental mathematical modeling of single-diode model of PV module. The parameter for the PV module is based on the electrical characteristics datasheet of SM Solar SM140P PV module. Plus, the electrical characteristics and equations are applied into Embedded SFunction in MATLAB-SIMULINK. The output produced will be verified based on the electrical characteristics provided by the manufacturer.
3.3.1.1 Mathematical Equation of PV Module
Majorly, there are two mathematical modeling of solar panel which are single-diode and two-diode model. In this project, the approached model applied is single-diode since it is simple and accurate[29]. The equivalent circuit of a single solar cell is depicted in Figure 3.2.
27
Figure 3.2: Single-diode circuit of solar cell.
The symbols in Figure 3.2 are defined as below: IL = Iph : Photocurrent; ID : Current of parallel diode; Ish : Shunt current; I : Output current; V : Output voltage; Rsh : Shunt resistance; Rs : Series resistance. The fundamental equation of single-model solar cell is derived using Kirchoff’s current law as showed I = 𝐼𝑝ℎ − 𝐼𝐷 − 𝐼𝑠ℎ From the equation, Ish and ID are derived
(1)
28
𝐼𝑠ℎ =
𝐼𝐷 = 𝐼𝑜 {𝑒
𝑉+𝐼𝑅𝑠
(2)
𝑅𝑠ℎ
𝑞(𝑉+ 𝑅𝑠 𝐼) 𝐴𝐾𝑇
− 1}
(3)
Where Io is the reverse saturation current of the diode, while q is the electron charge (1.602 x 10-19 C), A is the fitting factor and K is the Boltzmann constant (1.38 x 10-23 J/K). By substituting the equation (2) and (3) into (1) become
𝐼 = 𝐼𝑝ℎ − 𝐼𝑜 (𝑒
𝑞(𝑉+ 𝑅𝑠 𝐼) 𝐴𝐾𝑇
− 1) −
𝑉+𝐼𝑅𝑠 𝑅𝑠ℎ
(4)
If a solar cell type tend to have an I-V curve in which the slope at short circuit is almost zero, the value of Rsh can be assumed to be infinite [30]. In this, the last term in (4) could be ignored. By taking Iph as Isc, it will become 𝐼 = 𝐼𝑠𝑐 − 𝐼𝑜 (𝑒
𝑞(𝑉+ 𝑅𝑠 𝐼) 𝐴𝐾𝑇
− 1)
(5)
PV module is a combination of solar cell either in series or parallel. To create a PV module, in this case, the number of series-connected solar cells, Ns must take into account.
𝐼 = 𝐼𝑠𝑐 − 𝐼𝑜 (𝑒
𝑞(𝑉+ 𝑅𝑠 𝐼) 𝑁𝑠 𝐴𝐾𝑇
− 1)
(6)
When PV module is in open circuit, eventually output current will become zero, I = 0. By arranging the equation (6), it become
29
𝑞 𝑁𝑠 𝐾𝐴𝑇
=
𝐼 ln( 𝑠𝑐 +1) 𝐼0
(7)
𝑉𝑂𝐶
where VOC is open circuit voltage of PV module. By substituting equation (7) into (6), it become
𝐼 = 𝐼𝑠𝑐 [1 −
𝐼0 𝐼𝑠𝑐
(𝑒
𝐼 𝑉+𝐼𝑅𝑠 ) ln( 𝑆𝐶 +1)( 𝐼𝑂
𝑉𝑂𝐶
− 1)]
(8)
Let k = Isc/Io and simplify equation (8),
𝐼 = 𝐼𝑆𝐶 [1 −
𝑉+𝐼𝑅𝑠
1
1
(𝑘 + 1) 𝑉𝑂𝐶 + ] 𝑘 𝑘
(9)
Basically, the value of k is large since Io is bigger than Isc. By ignoring some terms and simplify, then a simple I-V equation is deduced
𝐼 = 𝐼𝑆𝐶 [1 − 𝑘
𝑉+𝐼𝑅𝑠 −1 𝑉𝑂𝐶
]
(10)
Most PV module has standard test condition (STC) for temperature and irradiance. In this case, the temperature reference is 25 oC and irradiance is 1000W/m2 plus spectral distribution to an AM 1.5 spectrum [31].
𝐼𝑟𝑒𝑓 = 𝐼𝑆𝐶,𝑟𝑒𝑓 [1 − 𝑘𝑟𝑒𝑓
𝑉𝑟𝑒𝑓 +𝐼𝑟𝑒𝑓 𝑅𝑠 −1 𝑉𝑂𝐶,𝑟𝑒𝑓
]
(11)
Parameters at maximum output power point (MPP) under STC could be given to solve the coefficient of kref 𝑉𝑀𝑃𝑃,𝑟𝑒𝑓 +𝑅𝑠 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓
𝑘𝑟𝑒𝑓 = (
𝑉𝑂𝐶,𝑟𝑒𝑓
− 1) √1 −
𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 𝐼𝑆𝐶,𝑟𝑒𝑓
(12)
where VMPP,ref is output voltage of maximum point under STC. The output current and voltage change with temperature and irradiance. Therefore, these parameters should be taken into account in designing the PV module. To deal with
30
various temperature and irradiance, a method of current-voltage translation recommended by Hermann and Wiesner [32] is implemented in this project. The equation are 𝐼𝑆𝐶 = 𝐼𝑆𝐶,𝑟𝑒𝑓 [1 + 𝛼(𝑇 − 𝑇𝑟𝑒𝑓 )] 𝑆
𝑆
𝑟𝑒𝑓
𝑉𝑂𝐶 = 𝑉𝑂𝐶,𝑟𝑒𝑓 [1 + 𝑎 ln 𝑆
𝑆
𝑟𝑒𝑓
+ 𝛽(𝑇 − 𝑇𝑟𝑒𝑓 )]
(13)
(14)
where T is the PV module temperature, Tref is the reference PV module temperature under STC, S is the solar irradiance while Sref is the reference PV module solar irradiance under STC, 𝛼 is the temperature coefficient of Isc, 𝛽 is the temperature coefficient of Voc and 𝑎 is the irradiance correction factor of Voc. The translation equations in these methods are
𝐼 = 𝐼𝑟𝑒𝑓 𝐼
𝐼𝑆𝐶 𝑆𝐶,𝑟𝑒𝑓
𝑉 = 𝑉𝑟𝑒𝑓 + (𝑉𝑂𝐶 − 𝑉𝑂𝐶,𝑟𝑒𝑓 ) + 𝑅𝑠 (𝐼𝑟𝑒𝑓 − 𝐼)
(15)
(16)
In order to calculate the output current of PV under varies temperature and solar irradiance is presented in Figure 3.3
31
Obtain V Translating V to Vref (16)
Calculate Iref using equation (11)
Translating Iref to I (15)
End
Figure 3.3: Flowchart of calculating the output current of a PV module.
By substituting the equation (16) and (15) into (11), it get the new expression of Iref
𝑉− 𝑉𝑂𝐶 + 𝑅𝑠 𝐼𝑟𝑒𝑓
(
𝐼𝑟𝑒𝑓 = 𝐼𝑆𝐶,𝑟𝑒𝑓 1 − 𝑘 (
𝑉𝑂𝐶,𝑟𝑒𝑓
𝐼𝑆𝐶 𝐼𝑆𝐶,𝑟𝑒𝑓
)
(17) )
Where Iref can be solved using numerical method.
3.3.1.2 PV Model in MATLAB-SIMULINK
In this section, the mathematical equation will be implemented in MATLAB-SIMULINK. The programming language is C language. PV module model is design as shows in Figure 3.4.
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Figure 3.4: PV module model in MATLAB-SIMULINK.
The main part of PV module is implemented by an Embedded MATLAB Function with three inputs and one output. S1 is solar irradiance, T0 is temperature and V is the output voltage of the PV module. The Iout is connected to a controlled current source to converts the SIMULINK input signal into equivalent current source. Plus, a bypass diode is connected in parallel with the controlled current source. The top level of PV module model, which all components in Figure 3.4 incorporated into a subsystem block as depicted in Figure 3.5.
Figure 3.5: PV module subsystem.
33
The subsystem block in Figure 3.5 is a basic PV module model of phase one of this project. In the subsystem block, port S is the input solar irradiance, T is the input temperature while V- is the negative terminal of the PV module and V+ is positive terminal of PV module. The mathematical equations of PV module are processed in Embedded MATLAB Function block model. The equations are implemented using C language as shows in Figure 3.6. The “function” code display the target parameters and output.
Figure 3.6: Screenshot of PV module programming.
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3.3.2
Verifying PV Module Modelling
This section will evaluate the design of PV module. The PV module of SM140 I-V result obtained from the MATLAB-SIMULINK simulation will be compare with the I-V characteristic provided by manufacturer. SM140P, produced by SM Solar is chosen to evaluate the proposed model in the project. The parameters of series resistance, Rs is calculated 𝑉𝑂𝐶,𝑟𝑒𝑓 − 𝑉𝑀𝑃𝑃,𝑟𝑒𝑓 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 ) (𝐼𝑆𝐶,𝑟𝑒𝑓 − 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 ) ln( 1− ) 𝐼𝑆𝐶,𝑟𝑒𝑓 𝐼2 𝑀𝑃𝑃,𝑟𝑒𝑓 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 + 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 (𝐼𝑆𝐶,𝑟𝑒𝑓 − 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 ) ln(1− ) 𝐼𝑆𝐶,𝑟𝑒𝑓
𝑉𝑀𝑃𝑃,𝑟𝑒𝑓 + 𝐼𝑀𝑃𝑃,𝑟𝑒𝑓 (
𝑅𝑠 =
(18)
From equation (18), the series resistance, Rs of PV module SM140P is 0.22310Ω, kref is 4.286 x 10-2. Assuming Rs is constant at its reference value under STC, while the value of irradiance correction factor, 𝑎 is 0.066 as proposed by Ding. In verification of PV module, the I-V and P-V curve is simulate. The curve is observed through output voltage under varies of inputs. Testing conditions as shown in Table 3.1 is used to compare the results simulation with manufacturer. Figure 3.7 shows the I-V and P-V curve under constant irradiance.
Table 3.1: Testing condition Irradiance (p.u)
Temperature (‘C)
1
0
1
25
1
50
1
75
1
100
35
(a)
(b) Figure 3.7: (a) I-V curve (b) P-V curve of SM140P PV module.
36
3.3.3
MPPT Algorithm
MPPT tracking algorithm is designed to extract the maximum power from the PV panel. The most commonly algorithm according to the number of publications are Perturb and Observe (P&O) and Incremental Conduction (InCond) method. Despite of these popular method, there are several method in MPPT tracking algorithm such as Fuzzy Logic Controller (FLC) and Adaptive Neuro Fuzzy Inference System (ANFIS) method. For FLC, the membership function is set manually by the user, on the other hand, for ANFIS, the training of the input data is automatically processed to generate output. The input will be trained as to get same as the output. The feedback from the output will control the input. To conclude, ANFIS is the improvement of the FIS as it easy and automatic. Although there are many methods in implementing the MPPT, there are some advantages and disadvantages. ANFIS algorithm is selected because it is fast algorithm and best learning method.
3.3.3.1 Adaptive Neuro Fuzzy Inference System (ANFIS) Method
Neural network models are data based whereas fuzzy logic models are based on expert knowledge, in a situation in which both data and knowledge of underlying system are available, a neuro fuzzy approach is able to exploit both sources. The neuro fuzzy system used here is the adaptive network based fuzzy inference system (ANFIS. Artificial Intelligent technique like ANFIS is proposed and simulated. The ANFIS was validated with several test data by minimizing mean square error.
37
3.3.3.2 MPPT Controller in MATLAB-SIMULINK
In designing the ANFIS model, the flow of the model design is the same as PV module design. The block diagram of the MATLAB-SIMULINK of ANFIS model is shown in Figure 3.8. There are three inputs: IPV; Vref feedback; step size, and one output, Vref.
(a)
(b) Figure 3.8: ANFIS model in MATLAB-SIMULINK. (a) Block diagram of the ANFIS model. (b) ANFIS model in subsystem.
38
In ANFIS subsystem, there are four inputs and one output. The inputs are Current, Voltage, step size and Correction data signal. These inputs will be the membership functions of ANFIS. Figure 3.9 shows the detail of the Fuzzy Logic Controller. This code used for implementation of the ANFIS algorithm.
Figure 3.9: Screenshot of ANFIS code.
39
3.3.3.3 Mathematical Algorithm of ANFIS
The mathematical algorithm of ANFIS controller is generated using System Identification Toolbox in MATLAB. The equation is generated based on the polynomial model (ARMA). The inputs and output from the simulation will be taken to generate an ideal mathematical expression. The equation of the model as follows:
𝑦=
𝐵𝑢+𝑒 𝐴
.
Bu = I, V, correction data signal and step size (inputs); e = error tolerance; A = output correlation; y = output;
MATLAB-IDENT is used to generate the tracking algorithm equation. Figure 3.10 shows the mathematical equation of ANFIS based on the polynomial model. The equation is based on the four inputs; voltage, current, vref and step size. The ouput generated will be the duty cycle for generation of PWM signal. The duty cycle will drive the PWM signal either to increase or decrease the maximum output power.
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Figure 3.10: ANFIS mathematical equation.
3.4
Developing MPPT using QUARTUS II
In this section, the MPPT system tracking algorithm will be implemented using FPGA based. The QUARTUS II software is chosen as a compiler and simulator. The algorithm will be designed using mixer design entry that combines VHDL code with block symbol file.
3.4.1
ANFIS Implementation In QUARTUS II
The ANFIS algorithm has been implemented in Altera QUARTUS II software by using Schematic/Block diagram. The main reason of using this method is the algorithm can be illustrated in graphically, easier to modify. It allows the user to create a new custom block using VHDL code. In other word, this method provides flexibility to the user to develop the project.
41
From the mathematical expression generated in section 3.3.3.3, these equations are implement in VHDL. Nevertheless, VHDL is a strongly type language. In dealing with floating point and mathematical operators, it is hard to implement. In this case, there are many negative exponent numbers and floating point which gives error in hardware implementation. To overcome this method, MANTISSA method is approach. To develop mathematical expression, it is easy for software language but hard for hardware language developer. By MANTISSA, the problems are solved. For example, 1
𝑛−3 will gives error in VHDL. By MANTISSA conversion, 𝑛−3 is equal to 𝑛3 . Since library used in ANFIS block diagram are ieee.numeric_std, the compiler will gives error to any negative number and floating point number. This is because hardware does not works that way. By MANTISSA, the problem is overcome by the conversion. The equation is then imply in VHDL as shown in Figure 3.11.
Figure 3.11: VHDL of ANFIS model screenshot.
42
The VHDL of the ANFIS controller is develop for ANFIS block diagram design entry. Figure 3.12 shows the block diagram of ANFIS method implemented in QUARTUS II. The equation is based on the mathematical expression generated by System Identification Tools in MATLAB.
Figure 3.12: Block diagram of ANFIS method.
In QUARTUS II implementation, there are several logic blocks such as d-flipflop, counter, comparator and constant. For inputs, there are three which are current, voltage and clock. In FPGA the default clock is 50MHz. As duty cycle will increase as the current and voltage increases.
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3.4.2
Downloading Altera DE2-115 board
The MPPT block on QUARTUS II is assigned to the expansion header of the Altera DE2 board through pin planner as shown in Figure 3.13. For downloading process in this project, JTAG mode is used. The assembler which is the compiler module that completes project processing will generate device programming images which are Programmer Object Files (.pof) and SRAM Object Files (.sof). For downloading process, .sof programming image is downloaded. Figure 3.14 shows the downloading process of MPPT that had been developed on Quartus II software. For downloading process, the DE2 board is connected to a host computer via a USB cable. Using this connection, the board will be identified by the host computer as an Altera USB Blaster device.
Figure 3.13: Pin planner assignment in QUARTUS II.
44
Figure 3.14: Downloading process of MPPT programming.
45
CHAPTER 4
RESULT AND ANALYSIS
4.1
Introduction
This chapter focuses on the analysis and evaluation of the obtained results from this project. The first section is verification of the MPPT model using MATLAB. The verification of the simulation used to explain an effect of applying MPPT controller in the application project. The next section describes the assessment of the variation in the values of irradiance and temperature. Firstly, the output is evaluated by select input that representing sunny day. While the irradiance and temperature will varies according to the weather. Secondly, the input is twist to graph that representing partially shaded condition. Lastly, the output results after the implementation of MPPT controller is shown. A comparison has also been made to evaluate the output of MATLAB simulation as compared to the QUARTUS II simulation.
46
4.2
Verification result of MPPT model
Firstly, uniform radiance and temperature are implemented to verify whether the ANFIS model. In this case the irradiance and temperature feed are 1000W/m2 and 25oC. The power peak is 140W. Figure 4.1 shows simulated result of output power generated with and without MPPT system implementation.
Figure 4.1: Simulation result of power generated under constant irradiance.
Secondly, non-uniform irradiance and temperature are implemented. The inputs are based on the real time data from 8am to 4pm. In this case, the power peak is 140W. Figure 4.2 shows the result simulation of power under varies irradiance and temperature.
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Figure 4.2: Simulation result of power generated under varies irradiance and temperature.
From Figure 4.2, the power fluctuated over certain time due to irradiance and temperature intensity changes from 8am to 4pm. Based on the result from the two cases, it shows that the proposed model is able to maximize the output power under varies temperature and irradiance.
4.3
Simulation of MPPT System in MATLAB-SIMULINK
4.3.1
PV Module Input
48
In MPPT system, the main inputs for the system are two; irradiance and temperature. Figure 4.3 and 4.4 shows the graph input variable of PV Module. As shown, the graph red line represents sunny day condition whereas purple line represents partially shaded condition.
Irradiance (p.u) versus Time (hours)
Figure 4.3: PV module input – Irradiance
49
Temperature (oC) versus Time (hours)
Figure 4.4: PV module input – Temperature.
In evaluating the output simulation, the time scope for simulation is from 8am to 4pm. This is due to the dynamic variation of irradiance and temperature. The graph pattern shows the highest temperature and irradiance achieved are around 12pm to 2pm. Figure 4.5 shows the configuration of PV module inputs.
Figure 4.5: Configuration on input irradiance and temperature in MATLABSIMULINK.
50
4.3.2
MPPT Parameters Analysis
The simulation during sunny day is analyzed. The result of the simulation is depicted in Figure 4.6 until Figure 4.9. By referring to the electrical characteristic of SM Solar SM140P, the maximum power produced is 140W under STC condition. Figure 4.6 shows the power generated. As shown, MPPT controller delivered maximum power during the peak time of irradiance and temperature. The peak time of irradiance is between 12pm to 2pm.
Figure 4.6: MPPT output power
Figure 4.7 and 4.8 show the result of MPPT controller inputs; voltage reference, Vref and PV current, IPV respectively. The fluctuation of power and Vref is due to duty step size and control period in ANFIS method.
51
(a)
(b) Figure 4.7:(a) MPPT output voltage reference, Vref (b) zoom-in Vref.
52
Figure 4.8: Current photovoltaic of MPPT system. Figure 4.9 shows the duty cycle versus time. The main function of duty cycle is to generate pulse width modulation (PWM) signal. These PWM will be fed to Boost converter as a driving signal of MPPT system.
Figure 4.9: MPPT system duty cycle
53
4.4
MPPT Model Simulation in QUARTUS II
In QUARTUS II, the inputs are Current, I and Voltage V obtained from MATLAB simulation. Figure 4.7 and 4.8 are sampled with 10ms. Figure 4.10 shows the plotted graph of input voltage and current.
Figure 4.10: Input voltage for QUARTUS II. The input voltage and current are manually insert into QUARTUS II software. The vector waveform (.vwf) is used to simulate the MPPT controller in QUARTUS II. Figure 4.11 shows the screenshot of vector waveform simulation in QUARTUS II.
54
Figure 4.11: Screenshot of output vector waveform.
The result of vector waveform is observed at duty cycle. The final result of QUARTUS II will be compared with MATLAB_SIMULINK simulation result. Figure 4.12 shows the comparison result of QUARTUS II and MATLAB-SIMULINK.
55
Figure 4.12: Comparison of duty cycle.
From the observation, the tracking pattern of both simulation result is almost the same. Nevertheless, the amplitude of QUARTUS II simulation is lower due to the miss tracking at certain point. This is because the radix input for QUARTUS II is unsigned type while the input in MATLAB is floating point. Therefore at certain point, the calculation of VHDL is slightly not accurate compare to MATLAB.
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CHAPTER 5
CONCLUSION AND RECOMMENDATION
5.1
Conclusion
This final year report has presented the PV module of SM140P and the development of Maximum Power Point Tracking (MPPT) controller of photovoltaic system. The performances of the controller are measured in both MATLAB and QUARTUS II implementation. Based on the MATLAB-SIMULINK simulation result, the project has successfully achieved the objective and covered the scope. The project proposes an FPGA based implementation. The MPPT controller, ANFIS is implemented in DE2-115 board. At the core of the system, the ANFIS controller is used to track the maximum current and voltage and eventually produce maximum output power. In implementing the MPPT system on FPGA board, it provides many advantages. Due to the high logic capacity in FPGA, FPGA performance surpasses other microcontrollers and DSPs performances. It can also be used to conduct in-circuit experiment, testing and optimize the parameters that affecting the MPPT system. The tested scheme proved to work efficiently. The output simulation from QUARTUS II is approximately the same as simulation result from MATLABSIMULINK. This report shows that FPGA can be used in developing a cost-effective and
57
adaptable implementation of MPPT system. Therefore, based on the simulation results and analysis, it can be concluded that the aim and objectives of the project are successfully achieved.
5.2
Recommendations
The efficiency of the system can be improved from time to time. There are some suggestions in developing the existing system become more practical. (i)
Developing the system by expanding the scopes and implementation of efficient communication schemes.
(ii)
Expand the single chip multi-channel control architecture in order to handle MPPT control at a large scale. This may brought to higher performance and flexibility compare to the single chip.
(iii)
For higher computational schemes, a highly adaptable architecture of FPGA are sufficiently flexible and powerful to support these computations.
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APPENDIX A MATLAB code for SM140P PV Module %%
SM140P
function Iout = fcn(S1,T0,V) %% Electrical Characteristic Isc_ref=8.61; Voc_ref=21.6; Impp_ref=8.14; Vmpp_ref=17.2; Pmax=140; NOCT=47; Vmax=1000; a=0.00065; b=-0.08; c=0.1017; Rs=0.22310; Sref=1000; Tref=25;
% % % % % % % % % % % % %
Short circuit current Open circuit voltage Current of maximum point Voltage at maximum point Maximum power generated Nominal Operating Cell Temperature Maximum voltage Temperature Coefficient of Isc Temperature Coefficient of Voc Irradiance correction factor of Voc Resistor in series Irradiance reference Temperature reference
%% Mathematical EQ DT=T0-Tref; Isc=Isc_ref*(S1/Sref)*(1+a*DT); Voc=Voc_ref*(1+b*DT+c*log(S1/Sref)); k=(1-Impp_ref/Isc_ref)^((Voc_ref/(Vmpp_ref+Rs*Impp_ref-Voc_ref))); Iref=1.9; DIref=1.9; V1=Voc-Rs*Iref*Isc/Isc_ref+Voc_ref*log(1-Iref/Isc_ref)/log(k); %Solving Iref using numerical Method for n=0:50 DIref=DIref/2; if(V1V) Iref=Iref+DIref; else break; end V1=Voc-Rs*Iref*Isc/Isc_ref+Voc_ref*log(1-Iref/Isc_ref)/log(k); end %Iref=Isc_ref*(1-(k.^((V-Voc+Rs*Iref*Isc/Isc_ref)/Voc_ref))); Iout=Iref*Isc/Isc_ref;
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MATLAB code for ANFIS load sort3.mat; [A B] = size(sort3); in= sort3(:,1:4); out= sort3(:,4); input1=in*1.05; output1 =out*1.05; input2=in*1.1; output2 = out*1.1; ptr=in; ttr=out; % Training v.P=input1; v.T=output1; % Validatiorn t.P=input2; t.T=output2; % Testing fismata=genfis2(in,ttr,.6); fuzouta=evalfis(in,fismata); fismat2a=anfis([in ttr],fismata,[100 0 0.2]); vu=input1 tu=input2 [fismat3a,trnErr,ss,fismat4a,tstErr]=anfis([in ttr],fismat2a,[200 0 0.04 0.9 1.1],[],[vu ttr]); fuzout2a=evalfis(in,fismat3a); ea=ttr-fuzout2a; perfa=sse(ea); perf1a=mse(ea) vstfuzout2a=evalfis(vu,fismat4a); vea = ttr - vstfuzout2a; verra = sse(vea); verr2a = mse(vea) figure(1); s=(1:A); %plot the graf data vs month(1986-2001) plot(s,out,'r+-',s,fuzout2a,'b.-') title('comparision prediction & actual data ') legend(' = actual',' = prediction') figure(2); s=(1:A); %plot the graf data vs month(1986-2001) plot(s,out,'r+-',s,vstfuzout2a,'b.-') title('comparision prediction & actual data ') legend(' = actual',' = prediction')
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MATLAB code for ANFIS mathematical algorithm function duty = fcn(i,v,step,cor,feed) %#codegen a = 1 - (0.0002435*(feed^(-1))) + (0.000125*(feed^(-2))) ((8.713*10^(-5))*(feed^(-3))) - ((6.861*10^(-5))*(feed^(-4)));
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b1 = -((2.672*10^(-5))*(feed^(-1))) + ((2.759*10^(-5))*(feed^(-2))) - ((3.356*10^(-5))*(feed^(-3))) + ((3.046*10^(-5))*(feed^(-4))); b2 = -((4.358*10^(-8))*(feed^(-1))) + ((9.478*10^(-8))*(feed^(-2))) - ((7.065*10^(-8))*(feed^(-3))) + ((7.875*10^(-8))*(feed^(-4))); b3 = 0.0002531*(feed^(-1)); b4 = (feed^(-1)) - (0.0001218*feed^(-2)) - ((8.097*10^(-5))*(feed^(3))) - ((6.559*10^(-5))*(feed^(-4))); duty = ((b1*i) + (b2*v) + (b3*step) + (b4*cor)) / a;
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APPENDIX B VHDL code for D-FlipFlop LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.numeric_bit.all; ENTITY dflipflop IS PORT( D : IN UNSIGNED (7 DOWNTO 0); Q : OUT UNSIGNED (7 DOWNTO 0); clk : IN STD_LOGIC ); END dflipflop; ARCHITECTURE vhdl_code OF dflipflop IS BEGIN PROCESS (clk) BEGIN IF clk'EVENT AND clk='1' THEN Q
