Advances in Information Science and Computer Engineering
Quantifying Covert Hardware Attacks: using ART Schema FAYEZ GEBALI University of Victoria Electrical and Computer Engineering Victoria CANADA
[email protected]
SAMER MOEIN University of Victoria Electrical and Computer Engineering Victoria CANADA
[email protected]
Abstract: Current embedded system, such as cell phones and smart-cards, in corporate security devices or cryptographic processor. Therefore hardware attacks targets this security devices. In this paper we propose Accessibility/Resources/Time (ART) schema that quantifies hardware attacks. Hardware attacks could be covert or overt based on awareness of the targeted system. In this paper, we provide an overview of covert attack and quantify the attack using our ART schema. Key–Words: Hardware Attack, Side-channel Attack, ART Model, Hardware Security, Covert Attack.
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Introduction
classification. Section 3 classifies the covert hardware attacks according to our ART model. Section 4 makes some concluding remarks.
Securing the hardware of computing and communications systems is now the primary concern of the system designer. Significant research in this area is being done by industry and academia. Cryptographic devices often store private keys or other sensitive data, so compromise of this data or the hardware which guards leads to loss of privacy, forged access, or monetary theft. Even if the attacker failed to gain the secret information that is stored in a hardware, attackers may be able to disrupt the hardware or deny service to lead to other kinds of failures in the security system.
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We are proposing to classify hardware attacks based on three criteria: Accessibility (A), Resources/money (R), and Time/effort/experience (T). These criteria could be represented in 3D space, where each axis represent one of the criteria. as shown in Fig. 1. Time
Hardware attacks aim at physically accessing the system to gain access to stored information, study the internal structure of the hardware, or to inject a fault. Hardware attacks can be classified as overt or covert attack. An overt attack is when the victim is aware that it is taking place [1]. A covert attack is when the victim is not aware that it is taking place. Covert attack occurs when an attacker is able to use some information leaked from the cryptographic device during processing, it was first studied in depth related to cryptographic system was during World War II. That is when Bell Labs employees were working on encryption systems noted that whenever the system activated, spikes appeared on an oscilloscope in another part of the lab, which could be interpreted to recover the plaintext data [3]. The remainder of this paper is structured as follows. Section 2 introduces our proposed ART schema and new covert hardware attacks ISBN: 978-1-61804-276-7
Proposed ART Schema
Long
Medium
Short Resources Limited
Limited
Moderate
Excessive
Partial Full Accessibility
Figure 1: ART Schema in 3D Spaces 85
Advances in Information Science and Computer Engineering
This inequality can be expressed in the general form: when L1 + ∆ ≤ 4 LDA DA when 5 ≤ L1 + ∆ ≤ 7 (4) AL = MDA when L1 + ∆ ≥ 8
Each axis is quantized into three levels for simplicity. Based on this schema, an attack could be quantified as point in this 3D space, whose coordinates are p = (a, r, t) , where 1≤ a, r, t ≤ 3. The quantization levels of A are: {Limited Access, Partial Access, Full Access} ≡ {1, 2, 3}, respectively. Limited access refers to no physical connect to the hardware, while in partial access the attacker can connect to the hardware or scan it, and full access means that the attacker can reach to gate level in a chip. The quantization levels of R are: {Limited Resources, Moderate Resources, Excessive Resources} ≡ {1, 2, 3}, respectively. An attacker needs resources to succeed in his attack. These resources, like equipment and man-power, can be classified according to funds needed. Limited resources (R < $10,000) require equipment such as IC soldering/desoldering Station, Digital Multimeter, Universal chip programmer, Prototyping boards, Power supply, Oscilloscope, Logical analyzer, and/or Signal generator. Moderate resources ($10,000 ≤ R ≤$100,000) require equipment such as Laser microscope , Laser interferometer navigation, Infrared imaging, and/or Photomultiplier tube. Excessive resources (R >$100,000) require equipment such as Laser cutter, Focused-ion beam (FIB), and/or Scanning electron microscope (SEM). The quantization levels of T are: {Short Time, Medium Time, Long Time} ≡ {1, 2, 3}, respectively. This axis refers to amount of time/effort/experiences an attacker needs to accomplish certain type of attack. Short time refers to an attacks that takes less than few days to succeed. Medium time refers to an attacks that succeeds within weeks. Long time refers to an attacks that succeeds within months. We use the L1 - norm of the attack point p in the 3D ART space, to assign an aggregate measure for the attack level (AL). We use three quantization level for the attack L1 value: least demanding attack (LDA), demanding attack (DA), and most demanding attack (MDA). The least demanding attack is associated with L1 norm that satisfies the following inequality: 2 1100 nm. Backside imaging is used to locate failed transistors or interconnects to navigation during focused-ion beam (FIB) work[2]. Also, Laser radiation can ionize semiconductor regions if its photon energy exceeds the semiconductor band gab (> 1.1 eV ). Laser radiation with λ = 1.06 µm (1.17 eV) has a penetration depth of about 700 µm and provides good spatial ionization uniformity for silicon devices. In active photon probing, a scanning beam interacts with an IC [2]. There are two major laser scanned techniques which can be used for hardware security analysis. One is called optical beam induced current (OBIC) and is applied to an unbiased chip to find the active-doped areas on its surface [18]. The other, is called light-induced voltage alteration(LIVA), is applied to chip under operation [19]. The measures for advanced imaging techniques (AIT) attack are [(2, 2, 2), L1 = 6]. A = 2, since the attacker needs to scan the device. R = 2, because the attacker will use advanced imaging scanning device to perform this attack. T = 2, because this type of attack needs more knowledge in hardware layout and takes more time and effort to accomplish.
3.3
References: [1] S. Moein and F. Gebali, Quantifying Overt Hardware Attacks: Using ART Schema, Computer Science and its Applications. Springer Berlin Heidelberg, PP. 511-516, 2015. [2] M. Tehranipoor and C. Wang, Intro. to hardware security and trust. Springer, 2012. [3] J. Friedman, Tempest: a signal problem, nsa cryptologic spectrum, http://www. nsa.gov/public_info/_files/ cryptologic_spectrum/tempest.pdf [4] J. Zhang, D. Gu, Z. Guo and L. Zhang, Differential power cryptanalysis attacks against PRESENT implementation. In Advanced Computer Theory and Engineering (ICACTE), 3rd International Conference on Vol. 6, pp. V6-61. IEEE ,2010. [5] P. Kocher, J. Jaffe and B. Jun, Differential power analysis. In Advances in Cryptology – CRYPTO’99, pp. 388-397. Springer Berlin Heidelberg ,1999. [6] J. Quisquater and D. Samyde, Electromagnetic analysis (ema): Measures and counter-measures for smart cards. In Smart Card Programming and Security, pp. 200-210. Springer Berlin Heidelberg, 2001. [7] Y. Zhou and D. Feng, Side-Channel Attacks: Ten Years After Its Publication and the Impacts on Cryptographic Module Security Testing. IACR Cryptology ePrint Archive, 388, 2005. [8] P. Kocher, Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems. In Advances in Cryptology–CRYPTO’96, pp. 104-113. Springer Berlin Heidelberg, 1996. [9] J. Dhem, F. Koeune, P. Leroux, P. Mestr, J. Quisquater and J. Willems, A practical implementation of the timing attack. In Smart Card Research and Applications, pp. 167-182. Springer Berlin Heidelberg, 2000. [10] Y. Berger, A. Wool and A. Yeredor, Dictionary attacks using keyboard acoustic emanations. In Proceedings of the 13th ACM conference on Computer and communications security, pp. 245-254. ACM, 2006.
Most Demanding Attack (MDA)
Most demanding attacks are those types of attacks that require knowledgable and well equipped attacker to succeed in attacking the chip, by decapsulating a chip and accessing its internal components. Modern chips are multilayer and more complicated, the attacker can decapsulate the chip from the rear side, which only the copper plate under the chip die is the only obstacle.This type of attacks require full access to the chip and its internal component. For all those reasons, this attack can not be classified as covert attack.
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Conclusion
There is a level of security goal for each application according to that application value. Among all hardware attack types, we can say that the covert least demanding attack is the more serious type of attack, because it requires limited access, limited resources, and short time. The DUA will not be aware that it is under an attack attempt. We can observe that most of side-channel attacks are covert attacks because the ISBN: 978-1-61804-276-7
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[11] M. Backes, M. Drmuth, S. Gerling, M. Pinkal and C. Sporleder, Acoustic Side-Channel Attacks on Printers. In USENIX Security Symposium, pp. 307-322, 2010. [12] P. Wright and P. Greengrass, Spycatcher: The candid autobiography of a senior intelligence officer, pp. 111-112. New York: Viking, 1987. [13] A. Shamir and E. Tromer, Acoustic cryptanalysis: on nosy people and noisy machines. Eurocrypt2004 Rump Session, 2004. [14] M. Kuhn, Optical time-domain eavesdropping risks of CRT displays. In Security and Privacy. Proceedings IEEE Symposium, pp. 3-18. IEEE, 2002. [15] J. Loughry and D. Umphress, Information leakage from optical emanations. ACM Transactions on Information and System Security, 5(3), pp. 262-289, 2002. [16] S. Skorobogatov, Low temperature data remanence in static RAM. University of Cambridge Computer Laboratory Technical Report, 536, 12, 2002. [17] S. Skorobogatov, Data remanence in flash memory devices. In Cryptographic Hardware and Embedded Systems, pp. 339-353. Springer Berlin Heidelberg, 2005. [18] K. Wills, T. Lewis, G. Billus and H. Hoang, Optical beam induced current applications for failure analysis of VLSI devices. In Proceedings International Symposium for Testing and Failure Analysis, Vol. 21, 1990. [19] C. Ajluni, Two new imaging techniques promise to improve IC defect identification,1995. [20] S. Skorobogatov, Optically enhanced positionlocked power anal. Cryptographic Hardware and Embedded Systems, pp. 61-75. Springer Berlin Heidelberg, 2006. [21] K. Rosenfeld and R. Karri, Attacks and Defenses for JTAG, 2010. [22] C. Tiu, A New Frequency-Based Side Channel Attack for Embedded Systems. Master degree thesis, Department of Electrical and Computer Engineering,University of Waterloo,Waterloo, Ontario, Canada, 2005.
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