Quasi-Resonant LED Driver With Capacitive Isolation and ... - CiteSeerX

IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 3, NO. 3, SEPTEMBER 2015

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Quasi-Resonant LED Driver With Capacitive Isolation and High PF Doron Shmilovitz, Alexander Abramovitz, and Iser Reichman

Abstract— A simple, efficient, and low-cost quasi-resonant LED driver is presented. The proposed driver relies on capacitive safety isolation barrier and eliminates the need for a bulky isolation transformer. Thus, cost and footprint area can be reduced. This paper describes the topology and presents the theory of operation. Theoretical predictions are verified by simulation and experimental results. Index Terms— Capacitive power transfer, current source, dimming, resonant LED drive.

I. I NTRODUCTION

T

HE recent years have seen a major advancement of LED semiconductor technology, which resulted in improved brightness and color temperature, lower energy consumption, and longer life spans of LED light sources [1], [2]. LED lighting technology is ∼5 times more energy efficient than the incandescent lighting and can offer longer service life [1]–[4]. Hence, LEDs can reduce maintenance cost, and help energy conservation in stationary and automotive applications [5]. Since ∼20% of world’s generated power is consumed by lighting, LEDs can dramatically cut the COx polluting emissions from the power plants. In battery operated systems, the higher efficiency of LEDs and their drivers bear directly on the maximal operation time [6]. LED lamps are also flicker-free, emit directional light, can be dimed, and, for these reasons, are well suited for urban, office, commercial, industrial, and traffic environment. Typically, LEDs are powered by low-voltage source and, therefore, are safe to use in indoor and outdoor settings as well as in emergency applications. To operate an LED lighting fixture, a specialized power converter, referred to as LED driver, is required. Offline LED lighting system presents several challenges. In these applications, the LED driver has to perform ac–dc conversion with large voltage step down, attain low distortion of the line current [7], and, for safety reasons, provide isolation [4], [8], [9]. High efficiency alleviates heat management, helps minimizing the driver’s size, and allows the lighting fixture to be fitted into congested space, where heat removal is difficult. Studies on the issue of characteristics matching Manuscript received November 21, 2014; revised January 15, 2015 and March 1, 2015; accepted March 13, 2015. Date of publication April 8, 2015; date of current version July 30, 2015. This work was supported in part by the Israel Chief Scientist under Grant 0605105421 and in part by General Electric, Fairfield, CT, USA. Recommended for publication by Associate Editor F. J. Azcondo. The authors are with Tel Aviv University, Tel Aviv 69978, Israel (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JESTPE.2015.2419882

between power sources and power converters were presented in several publications [10]–[12], and similar interfacing problematic applies to converter-load matching. Thus, although LED driver with regulated output voltage can do well, LEDs prefer constant current operating conditions. LED driver with current control can also provide precise dimming function. For these reasons, some LED drivers are rather complex and are a major contributor to the cost of LED lighting systems. High performance and small size at acceptable cost can promote widespread use of LED lighting and full realization of its potential benefits. However, lowering the cost usually requires compromises on performance [4], [13]. The space available for LED drivers is, in many cases, very limited (for example, in LED retrofit lamps), this being the motivation to miniaturization of the driver. Miniaturization of the driver circuit calls for high switching frequency and removal of the transformer, yet providing line isolation. In addition, transformers, involving manual procedures, do not comply well with manufacturability. Attaining high efficiency at high switching frequency requires resonant conversion methods to prevent switching losses [14]–[16]. High efficiency being of high importance not only from the perspective of energy saving but also due to the often limited heat removal and most importantly in order to prevent heating of the LEDs by their driver, which may be mounted in close proximity, such as in LED retrofits. Transformer is a popular and widely used device for providing mains isolation. However, satisfactory safety feature can be attained by means of capacitive coupling [17]. Two capacitors (one on each bus line) small enough to block low-frequency current can be connected to provide mains isolation. These series capacitors are also part of the resonant tank [15] and conduct adequate high-frequency current to power an LED string. The capacitive isolation has the merit of eliminating the need for an isolation transformer. Recently, a single stage, single switch, efficient, and low-cost multiresonant offline LED driver with capacitive safety isolation barrier and no transformer was briefly introduced [18]. In addition, [18] demonstrated zero-voltage-switching (ZVS) conditions at switching instances and thus lossless switching. This paper further investigates the idea of LED driver with capacitive isolation. The presented driver can be classified as a zero-current (ZC)-switched quasi-resonant type, whereas the earlier counterpart [18] is a multi-resonant ZV-switched topology. Although these circuits share the common idea of capacitive isolation, they differ in their operational principles. The concept of the quasi-resonant ZC-switched topology was introduced in [19].

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Fig. 1.

IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 3, NO. 3, SEPTEMBER 2015

Proposed QRLEDD topology.

In this paper, a detailed theoretical description of the proposed quasi-resonant LED driver (QRLEDD) for lighting applications is presented. Analytical relationships are verified by simulation and experimental results. Based on the theoretical analysis, a design approach is offered. II. P ROPOSED T OPOLOGY Due to LEDs’ steep current–voltage i D (v D ) characteristics, LEDs should be energized by a current source, whereas the input is a voltage source. This calls for driver circuits with gyrator characteristics (on average) [20]–[23]. The schematic of the proposed QRLEDD is shown in Fig. 1. The circuit uses a full-wave rectifier D1 –D4 , followed by a small high-frequency bypass capacitor, Cb . A series input inductor, L i , is switched at high frequency by the switch, M, to shape and control the magnitude of the input current. Fast input diode, Di , assures discontinuous input current mode. A pair of small series capacitors, 2Cs , constitutes the capacitive isolation barrier. Diodes D5 and D6 are used to steer the capacitor current either into the small resonant inductor L r or into the filter capacitance, CLED , across which a series string of LEDs is connected. In addition, D5 prevents the switch parasitic capacitance oscillating with L r . The QRLEDD possesses several desirable features, such as single active switch, ZVS turn-OFF, ZC turn-ON, which make high-frequency operation possible, resistive input port characteristics, ground referenced gate drive, inherent reset of blocking capacitors, and reduced circulating current. III. M AIN WAVEFORMS Principal waveforms of the proposed QRLEDD on the line frequency and on the switching frequency scale are shown in Fig. 2. The average line current waveform, i ac , shown in Fig. 2(a) appears as a near sinusoidal signal, which manifests that the QRLEDD possesses inherently high power factor and low harmonic content. The high power factor is not attained by a dedicated control (as in [23]) but rather due to the nature of the topology. This makes it a member of the loss-free-resistor family of converters [24], [25]. Examining the switch waveforms in Fig. 2(b) reveals favorable ZVS turn-OFF and ZC-switching (ZCS) turn-OFF lossless switching of the switch, which are a prerequisite to attain high efficiency at high frequency. IV. A NALYSIS A. Basic Assumptions To facilitate the analysis approach, several simplifying assumptions are adopted. First, the rectified ac line

Fig. 2. Simulated waveforms of the proposed QRLEDD. (a) On the line cycle scale: outer-line voltage, Vac , inner-scaled average line current 100 ∗ Iac . (b) On the switching cycle scale: top-switch voltage, vds ; bottom-switch current, ids .

voltage, Vac , is regarded as if frozen in time. This allows representing the line, the line rectifiers, and the bypass capacitor, Cb , by an equivalent dc source, Vi . Second, the LED string in parallel with the filter capacitance, CLED , can be modeled by an equivalent dc voltage source, VLED, determined by the number of diodes in the string. Finally, a pair of series connected isolating capacitors, 2Cs , is represented by their equivalent value, Cs . It is also assumed that all circuit components are ideal. The resulting model is shown in Fig. 3(a), whereas its detailed steady-state waveforms are presented in Fig. 3(b). B. State Analysis Inspection of the waveforms in Fig. 3(b) reveals that the switching cycle of QRLEDD is comprised of five topological states, the equivalent circuits of which are shown in Fig. 4 in the order of their appearance throughout the switching cycle. State A: t0 –t1 [see Fig. 4(a)] starts with ZCS of M1 . Here, L i is charging linearly from the input source, Vi , through Di . Meanwhile, Cs resonates with L r through D5 and discharges. State B: t1 –t2 [see Fig. 4(b)] starts as D6 conducts and allows L r to discharge linearly to the output, VLED , while Cs is clamped to the negative output voltage. During this interval, L i continues its linear charging. State C: t2 –t3 [see Fig. 4(c)] starts when controller terminates switch conduction. ZVS turn-OFF condition is attained due to Cs snubbing the switch voltage, vds .

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Fig. 3. Proposed QRLEDD steady-state model. (a) Simplified equivalent circuit. (b) Simulated waveforms.

Here, also L i and Cs resonate charging Cs to high voltage. The resonant current pulse flows to the output, VLED , via D6 . Meanwhile, L r is clamped and keeps linearly discharging to the output. State C terminates as Di turns OFF at ZC. State D: t3 –t4 [Fig. 4(d)] commences upon ZCS of Di . Here, L r keeps linear discharge to the output, while all the capacitors hold their voltage constant. State D terminates when D5 and D6 turn-OFF under ZCS condition. State E: t4 –Ts [see Fig. 4(e)] is the idle state. Here, no current flows in any of the inductors, whereas the capacitors hold their voltage constant. C. Quantitative Analysis 1) Output Power and Current: Per each switching cycle, Ts , the average output current, ILED , is generated by two charge components qr and qi supplied to the output filter capacitor, CLED , by the output current i o (t) (see Fig. 5). The charge increment qi is contributed by the discharge current i i (t) of the input inductor, L i , during State C, whereas the discharge current of the resonant inductor, L r , which occurs during both States C and D, contributes the charge increment qr . During State A, the capacitor Cs resonates with the resonant inductor L r [Fig. 4(a)]. Consequently, capacitor voltage falls from its peak value, vc (t0 ) = Vm , toward its minimum value vc (t1 ) = −VLED (Fig. 3). Hence, the energy, Er , captured by the resonant inductor, L r , is  1  2 . (1) Er = Cs Vm2 − VLED 2

Fig. 4. Equivalent circuits of the topological states of the proposed QRLEDD. (a) State A. (b) State B. (c) State C. (d) State D. (e) State E.

The energy, Er , is then released by L r to the output during States C and D, depositing the corresponding charge increment, qr , across CLED , which is given by   2 Er Cs Vm2 − VLED qr = = . (2) VLED 2 VLED During State C, the input inductor, L i , resonates with the capacitor, Cs , the voltage of which rises from its lowest value vc (t2 ) = −VLED back to its maximum vc (t3 ) = Vm (Fig. 3). Due to series connection [Fig. 4(c)], the charge, qi , deposited on the output filter capacitor, CLED , equals the

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Fig. 6. Fig. 5.

Approximated V –I characteristic of an LED.

Charge components of the output current, io .

charge increment across the capacitor, Cs qi = Cs (Vm + VLED ).

(3)

The dc output current, ILED , is the total charge supplied to the output (qr + qi ) averaged per switching cycle, Ts ILED =

1 . Ts (qr + qi )

(4)

The output power can now be found plugging (2) and (3) into (4) PLED = ILEDVLED Cs = Ts

VLED (V m



2 V 2 − VLED + VLED) + m 2

 .

(5)

Obtaining the explicit solution calls for finding the maximum voltage, Vm , across the capacitor Cs , as a function of circuit parameters and operating conditions (see the Appendix for details) ⎛ ⎞ 

VLED 2π D 2 ⎠. (6) + 1+ Vm = Vi ⎝1 − Vi fn Substitution of (6) into (5) and further manipulation yields the normalized output power of the QRLEDD ⎡ ⎤ 



2 fn PLED 2π D 2 ⎣1 + 1 + ⎦ . Pn = 2  = (7) 2π fn 1 Vi 2 Z oi

The function Pn is plotted in Fig. 7(a). Here, f s is the switching frequency, Ts = (1/ f s ) is the switching period, TON = t2 − t0 is the switch ON time, D = (TON /Ts ) is the duty cycle, f n = ( f s / f0s ) is the normalized switching frequency relative to the series resonant frequency f 0s = (1/2π(L i Cs )1/2 ), and Z 0i = (L i /Cs )1/2 is the characteristic impedance relative to the input inductor L i . It is further assumed that LED string voltage can be represented by a simple linearized model VLED = n(Vo + RON I LED )

(8)

where n is the number of LEDs in the string, Vo is the LED’s conduction threshold voltage, and RON is the LED’s ON resistance (Fig. 6).

Fig. 7. Calculated indexes of the proposed QRLEDD as a function of the duty cycle, D, and the normalized switching frequency, f n . (a) Normalized power, Pn . (b) Normalized peak switch voltage, Vdsmn .

Hence, using (8), the power of the LED string as a function of string current, ILED , and LED’s parameters can be written as PLED = VLED ILED = n(Vo + RON I LED )ILED .

(9)

Solving (9) yields an approximate solution for the current, ILED 

1 Vo 2 Vo PLED ILED = + + (10) 2R ON 4 RON n R ON where PLED is given by (7).

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2) AC Operation: Hitherto, QRLEDD analysis was conducted under assumption of dc input voltage Vin . However, typical operation condition of QRLEDD is from a rectified utility line, as shown in Fig. 1. Assuming that the amplitude of the rectified √ voltage is Vi and its corresponding rms value is Vrms = (1/ 2)Vi ; the ac power of QRLEDD at the peak of the ac line is about twice the average power, Pav , considering that the current waveform of the QRLEDD has some residual distortion and, its power factor is lower than unity, it was found that a correction factor 0.933 is appropriate. Therefore, (7) yields 2

Vrms Pn = 0.933 ∗ 2Pav = 1.866Pav. (11) PLED = Z oi Fig. 2 reveals that the input port of the QRLEDD has a nearresistive input characteristic. The emulated resistance, Re , seen by the line can be found from Re =

2 Vrms 1.866Z oi = . Pav Pn

(12)

3) Peak Switch Voltage: Fig. 4(d) reveals that the peak switch voltage, Vdsm , is the sum of the peak capacitor voltage, Vm , and the output voltage, VLED: Vdsm = Vm +VLED. Hence, using (6), the normalized peak switch voltage can be obtained 

Vdsm 2π D 2 =1+ 1+ . (13) Vdsmn = Vi fn The normalized output power (2) and the normalized switch peak voltage (3) as a function of the normalized frequency, fn , and duty cycle, D, are plotted in Fig. 7. The plot of the normalized power, shown in Fig. 7(a), reveals that duty cycle or frequency variations have somewhat limited the effect on QRLEDD’s power. Hence, burst control seems as preferred method of control. Such strategy involves feeding the LED string by a chain of discrete pulses, whereas the continuously variable off time can help avoiding quantization of the attainable average power. Since each pulse within the burst delivers same power to the LED, such method helps sustaining LED’s color. V. S IMULATION AND E XPERIMENTAL V ERIFICATION Theoretical derivations of QRLEDD’s key relationships were verified by simulation. Fig. 8(a) shows the comparison of theoretically predicted versus simulated values of the peak switch voltage Vdsm . The calculated power and the simulated power are compared in Fig. 8(b). Excellent agreement is found in both the cases. To further verify the theoretical predictions, a 30 W, 110 V-input experimental QRLEDD prototype based on the schematic in Fig. 1 was built and tested. The circuit parameters were: 1) switching frequency f s = 250 kHz; 2) input inductance L i = 30 μH; 3) resonant inductor L r = 3 μH; 4) capacitors 2Cs = 2 nF/600 V; 5) Cb = 0.5 μF/400 V; and 6) CLED = 1 μF/50 V. The key waveforms of the experimental prototype are shown in Fig. 9(a) and the experimental results are shown in Fig. 9(b).

Fig. 8. Comparison of theoretically predicted versus simulated results. (a) Normalized peak switch voltage, Vdsmn . (b) Normalized power, Pn .

Experiments confirm that ZCS at turn ON of the switch and ZVS at turn OFF of the switch were achieved. Some ringing may be noticed in the Vds waveform due to the parasitic switch capacitance. Stray inductances of the wiring also result in current ringing that can be observed in Ids waveform. The line current of the QRLEDD, shown in Fig. 9(c), is seen to be nearly sinusoidal with a measured PF = 0.99. The measured efficiency and output power of the experimental prototype as a function of the frequency are shown in Fig. 10. The power is seen to be controllable through the switching frequency, indicating potential dimming capability. However, the efficiency is seen to be quite flat (constant) throughout the entire range of 110–190 kHz of switching frequency variation. VI. D ESIGN C ONSIDERATIONS A. ZCS Boundary Examination of the waveform of the resonant inductor current, i r (t), shown in Fig. 11, reveals that during State A t0 −t1 ; the inductor L r resonates with Cs . The maximum value, Irm , of the resonant current can be derived from the energy

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Fig. 10. Experimental efficiency (percentage) as a function of power level, at Vac = 110 Vrms .

Fig. 11.

Fig. 9. Typical experimental waveforms of the proposed QRLEDD. Vertical Scale. (a) Vds − 200 [V/cm], Vgs − [10 V/cm], ir , and ii − 2 [A/cm]. (b) Vds − 100 [V/cm], Vgs − [10 V/cm], ids − 4 [A/cm], and io − 2 [A/cm]. (c) Vac − 100 [V/cm], iac , and ii − 1 [A/cm].

conservation considerations as Irm = Vm

 Cs . Lr

(14)

Some of the energy is then returned to recharge Cs to the negative value of (−VLED). Therefore (Fig. 5), at t = t1 , the output rectifier starts conducting with peak output current, Iom , given by   Cs  2 2 Vm − VLED . (15) Iom = Lr The duration of State A can be approximated to a quarter of a resonant cycle 1 π Cs L r . (16) t 1 = t1 − t0 = TON = 4 2

Typical waveform of the resonant inductor current, ir (t).

During States B, C, and D, the inductor L r discharges toward the output voltage, VLED , assumed constant, and its current, i L r (t), falls linearly to reach zero after 

2  Vdsm Lr t 2 = t4 − t1 = Iom = Cs L r − 1 − 1. VLED VLED (17) To assure ZC turn-OFF condition of the output rectifier, the switching frequency should be limited by a certain maximum value, fsm , given by fsm =

1 1 ⎤. ⎡  =

2 t 1 +t 2 √ V π dsm Cs L r ⎣ + −1 −1 ⎦ 2 VLED

(18)

Here, (16) and (17) were used. Normalizing (18) yields f mn =

f sm 2πr ⎤. = ⎡ 

2 f 0i V dsmn ⎣π + − 1 − 1⎦ 2 VLn

(19)

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frequency simply from PON . (23) E oss (Vdsm ) Either (22) or (23) can be used to find the resonant frequency, f 0i f sm =

f 0i =

fsm . f mn

(24)

According to the desired power level, Pav , and line voltage, Vrms , the characteristic impedance, Z 0i , can be found using 2 Vrms Pn ( f mn ). (25) 2P av After f 0i and Z 0i are established, the key parameters of QRLEDD can be calculated 1 Cs = (26) 2π Z oi f 0i Z oi (27) Li = 2π f 0i Li Lr = 2 . (28) r

Z 0i =

Fig. 12. ZCS boundary of the output rectifier for selected values duty cycle, D, and the inductor ratio, r. ZCS regime prevails at the left of the crossover points, where f n < f mn .

Here,√VLn = (VLED /Vi is the normalized LED voltage and r = L i /L r is the inductor’s ratio. The trajectory of the maximum normalized switch voltage, Vdsmn , as a function of the highest normalized switching frequency, f mn can be derived from (19) ⎡ ⎤ 

2 1 2r ⎦. Vdsmn = VLn ⎣1 + 1 + π 2 − (20) f mn 2 The solutions of (13) and (20) are plotted in Fig. 12 for selected values of the duty cycle, D, and the inductor ratio, r , for VLn = 30/155 = 0.19355. The crossover points mark the output rectifier ZCS mode boundary. The desired ZCS region lies to the left of the crossover points, where fn < f mn . B. Design Approach QRLEDD can attain ZV turn-OFF and ZC turn-ON conditions. Although ZV turn-OFF is lossless, the ZC turn-ON losses are associated with the discharge of switch parasitic capacitance, Coss , which is highly nonlinear and strongly depends on the OFF-state voltage, Vds . The turn-ON switching loss, PON , of a power MOSFET can be estimated by [14] 2 2 Coss Vdsm fs . (21) 3 The turn-ON loss is frequency dependent, limits the efficiency of the ZCS converters and becomes dominant at low-power level. Hence, the highest switching frequency of QRLEDD can be established from (21) as a function of an acceptable switching power loss, PON PON =

f sm =

3PON . 2 2Coss Vdsm

(22)

Some manufacturers provide plots of the energy, E oss (Vds), stored in switch parasitic capacitance Coss [26]. This provides an alternative approach to obtain the highest switching

C. QRLEDD Design Example As an example, the proposed QRLEDD is designed to power a 30 V/30 W LED string from 110-Vrms line. Since the QRLEDD is designed for Pav = 30 W, according to the peak LED power is PLED = 56 W. To attain the lowest peak switch voltage, Vdsmn , QRLEDD should be operated at the lowest possible duty cycle, D, and the highest switching frequency, f mn (see Fig. 7). Therefore, the first step in QRLEDD design is using Fig. 12 to choose the desired D and r and noting the corresponding normalized frequency fmn at the borderline condition. For instance, for D = 0.15 and L i /L r = 4 (r = 2), Fig. 12 reads f mn = 0.95 and Vdsmn = 2.458. Using the established value of f mn , the corresponding values of Pn = 0.877 and Z oi = 189 can be found applying (7), respectively. The expected value of the peak switch voltage is Vdsm = √ 2 ∗ 110 = 382 [V]. Just as an example, 2.458 ∗ SPA11N60C3 MOSFET, with E osm (400 V) = 3.9 [uJ] [12], was chosen to implement the switch. Assuming switching loss of PON = 1 W, the actual switching frequency f s = 256 kHz was estimated by (23), and the resonant frequency as f 0i = ( fs / fmn ) = 270 kHz. Then, the key circuit parameters: 1) Cs = 3.1 nF; 2) L i = 112 uHy; and 3) L r = 28 uHy were found using (26)–(28). To verify the design, the LT SPICE simulation program was run. The simulator used realistic model of the switch and took account of parasitic effects. The key simulated waveforms of the QRLEDD design example are shown in Fig. 13. As expected, the QRLEDD operates at the vicinity of the ZCS boundary of the output rectifier. The simulated peak switch voltage at the peak of the line is Vdsm = 376 V, matching the expected value of Vdsm = 382 V. The simulated average power throughout the line cycle was Pav = 29.97 W. The simulated average line current amplitude (Fig. 13) is Iac = 0.374 A,

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A PPENDIX The peak voltage across the series capacitor, Cs , can be found analyzing the equivalent circuit of State C shown in Fig. 4(c). By the state plane approach (see [27] for a brief review of the method), the normalized peak voltage, Vmn , can be calculated as Vm Vmn = = MT + R (29) Vi where the normalized voltage, MT , applied to the series resonant tank L i − Cs is Vi − VLED MT = (30) Vi and R is defined by R 2 = (m 2 − MT )2 + j22.

Fig. 13. Simulated waveforms of the QRLEDD design example. (a) On the line frequency scale: switch voltage, Vds , and average line current, 0.001 ∗ Iac . (b) On the switching frequency scale: switch gating signal, Vgs , switch voltage, Vds , input current, ii , and output current, io .

so that the resulting emulated resistance of the QRLEDD can be approximated Re = 155/0.374 = 414 , as compared with Re = 402  predicted by (12) using the obtained above values of Pn and Z oi . The simulation results closely match the design objectives and verify the theory and the proposed design approach. VII. C ONCLUSION This paper described the key features and the theory of a single switch QRLEDD for lighting applications. Primary advantages of the proposed topology are capacitive isolation, ZV switching turn-OFF, ZC turn-ON, high-frequency operation, inherently low input current distortion, high power factor, and high efficiency. Theoretical predictions were verified by simulation and experiment. Design guidelines were also presented. In a limited range, LED dimming can be attained by adjusting the switch duty cycle and the switching frequency. Better performance, however, can be attained energizing the LED at full power and applying burst control strategy with variable off time to create dimming effect. The prototype described in the experiment was constructed to validate the proposed concept and theory. No optimization was attempted. Yet, it exhibited a typical efficiency of ∼85%. Several options exist to improve the QRLEDD efficiency. One possible approach is the application of a synchronous rectifier to replace the output rectifier diode, D6 . Improving the efficiency beyond 90% is the focus of ongoing research and will be reported elsewhere. The topology presented in this paper is subject of patent application by GE and Tel Aviv University.

(31)

According to the state analysis above at the beginning of State C, at t = t2 , the normalized initial voltage of the capacitor, Cs , is VLED m2 = − . (32) Vi The input inductor L i is linearly charged during both States A and B [see Fig. 4(a) and (b)], so that at the end of State B, the input current is Vi DTs . (33) I2 = i i (t2 ) = Li From (33), the normalized initial current is 

Vi DT s I2 Li j2 =  =  Vi Z 0i

Vi Z 0i

(34)

where Z 0i is the characteristic impedance as defined above. Combining (29)–(34) yields the normalized peak capacitor voltage 

Vm VLED 2π D 2 =1− + 1+ . (35) Vmn = Vi Vi fn ACKNOWLEDGMENT The authors would like to thank N. Shapira of GE Lighting Israel for technical assistance and for providing the experimental results. R EFERENCES [1] J. Y. Tsao, “Solid-state lighting: Lamps, chips, and materials for tomorrow,” IEEE Circuits Devices Mag., vol. 20, no. 3, pp. 28–37, May/Jun. 2004. [2] M. G. Craford, “LEDs challenge the incandescents,” IEEE Circuits Devices Mag., vol. 8, no. 5, pp. 24–29, Sep. 1992. [3] P. S. Almeida, J. M. Jorge, D. Botelho, D. P. Pinto, and H. A. C. Braga, “Proposal of a low-cost LED driver for a multistring street lighting luminaire,” in Proc. 38th Annu. Conf. IEEE Ind. Electron. Soc. (IECON), Oct. 2012, pp. 4586–4590. [4] A. Ayachit, V. P. Galigekere, and M. K. Kazimierczuk, “Power electronic circuitry in LED modules: An overview,” in Proc. Elect. Manuf. Coil Winding Expo, Dallas, TX, USA, Oct. 2010, pp. 153–158. [Online]. Available: http://www.emcwa.org/home/EMCW% 2010-13%20Proceedings%20R0.pdf

SHMILOVITZ et al.: QRLEDD WITH CAPACITIVE ISOLATION AND HIGH PF

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Doron Shmilovitz (M’98) received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from TelAviv University, Tel-Aviv, Israel, in 1986, 1993, and 1997, respectively. He was with the Research and Development, Israel Air-Force, from 1986 to 1990, where he developed power processing topologies for avionic systems. From 1997 to 1999, he was a Post-Doctorate Fellow with New York Polytechnic University, Brooklyn, NY, USA. Since 2000, he has been with the Faculty of Engineering, Tel-Aviv University, where he is currently the Head of the Power Electronics and Electric Energy Group. He has authored or co-authored over 130 papers, of which over 40 are in refereed journals. His current research interests include general circuit theory, switchedmode converters, power quality, special applications of power electronics, such as for alternative energy sources, powering of autonomous sensor networks, and implanted medical devices.

Alexander Abramovitz (M’05) was born in Kishinev, USSR, and repatriated to Israel. He received the B.Sc., M.S., and Ph.D. degrees from Ben-Gurion University in the Negev, Beer-Sheva, Israel, in 1987, 1993, and 1997, respectively, all in electrical engineering. He was a Post-Doctoral Fellow with the University of California at Irvine, Irvine, CA, USA, in 2004. He was with the Electrical Engineering and Computer Science Department, University of California at Irvine, Department of Electrical and Computer Engineering, Ben Gurion University in the Negev, and the Department of Electrical and Electronics Engineering, Sami Shamoon College of Engineering, Beer-Sheva. He is currently with the Department of Physical Electronics, Tel Aviv University, Tel Aviv, Israel. He also served as a Consultant to commercial companies in the areas of analog and power electronics. His current research interests include switch mode and resonant power conversion, active power factor correction, grid connected alternative energy sources, fault current limiters, electronic instrumentation, and engineering education.

Isar Reichman was born in Israel. He received the Electronic Practical Engineer degree from the ORT Hermelin Academic College of Engineering and Technology, Netanya, Israel, in 1998, and the B.Sc. degree in electrical engineering from Ben-Gurion University in the Negev, Beer-Sheva, Israel, in 2008. He is currently pursuing the M.A. degree with the Department of Physical Electronics, Tel Aviv University, Tel Aviv, Israel. He was with Sandisk, Kfar Saba, Isreal, Intel, Haifa, Isreal, and some other commercial companies working in the area of high-speed board design, and as a Teaching Assistant with the Department of Physical Electronics, Tel Aviv University. His current research interests include switch mode and resonant power conversion, grid connected alternative energy sources, signal power integrity, high-speed circuits, and electronic instrumentation.