Improved GaAs PHEMT T/R Switches Performance with Multi-Gate/Islands Configuration HUNG-TSAO HSU, YUE-MING HSIN, C. H. YEN*, K. G. PERNG*, H. C. YEH*, and J. H. HUANG* Department of Electrical Engineering, National Central University Chung-Li, Taiwan 320, Republic of China E-mail:
[email protected] *Global Communication Technology Corporation, Hsinchu, Taiwan, R.O.C. Single Pole Double Throw (SPDT) switches with negative control voltage (-3V) were designed and fabricated using 0.6µm gate length pHEMTs with different gate configuration. The switch circuit consists of multi-gate FETs with/without islands in which multiple gate electrodes are arranged between source and drain electrodes. The multi-gate FETs demonstrated the improved power handling and isolation. In addition, devices with gate-islands demonstrated lower insertion loss than those without gate-islands. At 2.4 GHz, the switch with quadruple-gate with islands configuration had an insertion loss around 0.6 dB, an isolation remained greater than 20 dB, and a handling power over 30dBm. However, for output power of 30 dBm at 2.4 GHz application, a pHEMT switch with triple-gate configuration is the optimum design to compromise layout-space and switch performance.
1.
Introduction
A transmit/receive (T/R) switch is needed in transceiver application to connect the antenna to the receiver chain (receive mode) or the transmit chain (transmit mode). It is important for the switch to have very low insertion loss and high isolation. However, there are further requirements for the circuits to achieve more compact size and higher output power in mobile communications. To obtain higher output power, the circuit usually has a switch block of n stacked FETs connected in series [1]. However, this method requires a large chip size [2]. This paper presents SPDT switches IC with different gate configuration operating at –3/0V. The multi-gate configuration can not only increase handling power, but can also reduce the chip size of the IC.
2.
Device and circuit design
The switch ICs were fabricated using GaAs PHEMTs process. Fig. 1(a) and (b) describe the schematic cross-section of PHEMTs with the dual-gate with island and dual-gate without island, respectively. The device structure presented here uses an N+ cap-layer to decrease insertion loss between gates. There are 6 different gate configurations in this SWITCH report, (1) dual-gate with island, (2) dual-gate without island, (3) triple-gate with island, (4)
triple-gate without island, (5) quadruple-gate with island, and (6) quadruple-gate without island.
(a)
(b) Fig. 1: Schematic cross-section of multi-gate PHEMT (a) with island and (b) without island.
All switches were designed based on Single Pole Double Throw (SPDT) with Negative control voltage (-3V). Fig. 2 shows the circuit schematic of the SPDT switch in this study, which uses a combination of series and shunt switch pHEMTs in etch leg. In transmit mode, when the transistor (M2) from transmitter to antenna is turned on and the transistor (M3) from the antenna to the
receiver is turned off. At the same time, the transistor (M1) from the transmitter to ground is turned off and the transistor (M4) from the receiver to the ground is turned on. The maximum transmit power and linearity of conventional series/shunt T/R switches are limited by the rf-voltage swing across the drain/source and gate of the off-state FET’s: M1 and M3 [3]. Fig.3 shows a photograph of the manufactured switch (gate width of 6 × 250 µm). The chip dimensions are 0.8 mm × 0.5 mm.
More difference could be observed on the devices with quadruple-gate with island. However, the difference is not significant due to the well defined passivation process. Figure 5 shows the measured isolation (input to output) versus frequency. An isolation of more than 20 dB is obtained in the frequency range from DC to 4 GHz. The gate-configuration has almost no effect on isolation due to the basic operation of isolation being turned off PHEMT. However, an improvement can be obtained by increasing number of gates but not significantly.
Fig. 2 : Schematic of the proposed T/R switch.
Fig. 4 Measured Insertion Loss characteristics for the SPDT switches with different PHEMT gate-configuration.
Fig. 3 : Photograph of the manufactured switch. The chip dimensions are 0.8 mm x 0.5 mm.
2.
Measured results
The small signal performance of SWITCH including insertion-loss, isolation, and input/ output VSWR were measured by HP8510C from 0.05 to 10 GHz. Fig. 4 shows the measured insertion loss from DC (0.05 GHz) to 3.0 GHz. More gates increase drain to source distance, which causes the higher resistance to result in higher loss. An approximate 0.1 dB loss is observed from increasing gate fingers. Devices with gate-islands demonstrated lower insertion loss than those without gate-islands. The difference results from the gate-island protection to channel compared to the exposed surfaces.
Fig. 5 Measured Isolation characteristics for the SPDT switches with different PHEMT gateconfiguration. Figure 6 demonstrates the power performance of switch at 2.4 GHz. P1dB for switch with dual-gate configuration is around 29 dBm. But P 1dB for switch with triple- and quadruple-gate FETs can reach 30 dBm without compression. The
maximum output-power value is limited by measurement setup.
Fig. 6 Measured power transfer characteristics for the SPDT switches with different PHEMT gate-configuration (f = 2.4 GHz).
4
Conclusion
Single Pole Double Throw (SPDT) switches with negative control voltage (-3V) were designed and fabricated using 0.6µm gate length pHEMTs with different gate configuration (multi-gate with/without island). The measured results demonstrate the pHEMTs devices with multi-gate structure enhance the handling power, and improve the power linearity. For output power of 30 dBm at 2.4 GHz application, a pHEMT switch with triplegate configuration is the optimum design to compromise layout-space and switch performance.
References [1] M.Shifrin, “High Power Control Component Using A New Monolithic FET Structure”, IEEE Monolithic and Millimeter -wave Monolithic Symp. Digest, 1989, pp.51-56. [2] T. Yamaguchi, “Ultra-Compact 1W GaAs SPDT Switch IC”, IEEE MTT-s Digest, 1999, pp. 315-318. [3] T. Tokumitsu, “A Low-Voltage, HighPower T/R-Switch MMIC Using LC Resonators,” IEEE Trans. Microwave Theory and Techniques, Vol. 43, No. 5, May 1995, pp.997-1003.
[4] K. Numata, “A +2.4/0 V Controlled High Power GaAs SPDT Antenna Switch IC For GSM Application”, IEEE RFIC Symp. 2002, pp.141-144. [5] F. Mcgrath, “Novel High Performance SPDT Power Switches Using Multi-Gate FETs”, IEEE MTT-s Digest, 1991, pp.839842.
