J. of Active and Passive Electronic Devices, Vol. 4, pp. 35–53 Reprints available directly from the publisher Photocopying permitted by license only
©2009 Old City Publishing, Inc. Published by license under the OCP Science imprint, a member of the Old City Publishing Group
Realization of CMOS Current Controlled Current Conveyor Transconductance Amplifier (CCCCTA) and Its Applications Montree Siripruchyanun1, Phamorn Silapan2 and Winai Jaikla3 1 Department of Teacher Training in Electrical Engineering, Faculty of Technical Education, King Mongkut’s University of Technology North Bangkok, THAILAND. E-mail:
[email protected] 2 Electric and Industrial Program, Faculty of Industrial Technology, Uttaradit Rajabhat University, THAILAND 3 Electric and Electronic Program, Faculty of Industrial Technology, Suan Sunandha Rajabhat University, THAILAND. E-mail:
[email protected]
This article presents a basic building block for analog signal processing, namely current controlled current conveyor transconductance amplifier (CCCCTA). Its parasitic resistance at current input port can be controlled by an input bias current. It is very suitable to use in either current-mode or voltage-mode signal processing systems. The proposed element was realized in a CMOS technology and was examined the performances through PSPICE simulations. They display usabilities of the new active element, where the maximum bandwidth is 107.34 MHz. The supply voltages can be as low as ±1.5 V and maximum power consumption is 899 µW. The CCCCTA performs tuning over a wide current range. In addition, some examples as a voltage and current-mode universal biquad filter and a grounded inductance simulator are included. They occupy only single CCCCTA. Keywords: CMOS, CCCCTA, Current-mode, Voltage-mode, Filter, Oscillator, Inductance simulator.
1 Introduction There has been much effort to reduce the supply voltage of electronic circuits in last decade. This is due to the command for portable and battery-powered equipment. Since a low-voltage operating circuit becomes necessary, the current–mode technique is ideally suited for this purpose more than the voltage*Corresponding author:
[email protected]
35
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mode one. Consequently, there is a growing interest in synthesizing the current-mode circuits because of more their potential advantages such as larger dynamic range, higher signal bandwidth, greater linearity, simpler circuitry and lower power consumption [1–2]. Many active elements able to function in current-mode such as OTA, current conveyor and current differencing buffered amplifier (CDBA), have been introduced to response these demands. Recently, a reported 5-terminals active element, namely current conveyor transconductance amplifier (CCTA) [3], seems to be a versatile component in the realization of a class of analog signal processing circuits, especially analog frequency filters [3–5]. It is supposed for usage mostly in current-mode circuits, but it is also choice in case of voltage mode and/or hybrid (voltage-current) circuits (e.g. V/I converters). In addition, it can also be adjusted the output current gain. However, from our investigations, there are seen that the CCTA can not be controlled by the parasitic resistance at input port so when it is used in some circuits, it must unavoidably require some external passive components, especially the resistors. This makes it not appropriate for IC implementation due to occupying more chip area. In addition, the mentioned CCTA has the third-generation current conveyor (CCIII) as an input stage which has flexibility for applications less than a second-generation current conveyor (CCII). The purpose of this paper is to design and synthesize a modified-version CCTA, which is newly named current controlled current conveyor transconductance amplifier (CCCCTA). The parasitic resistance at current input port can be controlled by an input bias current, and then it does not need a resistor in practical applications. Even it can be implemented by employing secondgeneration current controlled current conveyor (CCCII) and OTA, it would be more very convenient and useful if the CCCCTA is realized in monolithic chip. Some example applications as voltage and current-mode universal filters, grounded inductance simulator and oscillator are comprised. They confirm that only single CCCCTA is employed for each application.
2 Circuit Configuration 2.1 Basic Concept of CCCCTA CCCCTA properties are similar to the conventional CCTA, except that the CCCCTA has finite input resistance Rx at the x input terminal. This parasitic resistance can be controlled by the bias current IB1 as shown in the following equation
I y 0 Vx Rx = I z 1 0 I o
0 0 0 I x 1 0 0 Vy , 0 0 0 Vz 0 ± gm 0 Vo
(1)
Realization of CMOS CCCCTA and Its Applications
where
1
Rx =
37
,
(2)
g m = βn I B 2 .
(3)
8βn I B1
and
gm is the transconductance of the CCCCTA, βn = µnCox (W / L ) is the physical parameter of MOS transistor and VT is the thermal voltage. The symbol and the equivalent circuit of the CCCCTA are illustrated in Figs. 1(a) and (b), respectively. 2.2 A Second Generation Current Controlled Current Conveyor (CCCII) Fig. 2 displays a class AB translinear loop, which is used as input section. By straightforward analysis, we will obtain the parasitic resistance at input terminal as gm 2 gm 4 I B1 1 . Rin = − − (4) ( gm 2 + gm 4 ) I in ( gm 2 + gm 4 ) gm1 gm 3 From Eq. (4) if gm1 = gm 3 and gm 2 = gm 4 = gm , we will get
Rin =
1 1 . = 2 gm 8βn I B1
(5)
Based on the use of the finite input resistance input stage of Fig. 2, the second generation current controlled current conveyor can be shown in Fig. 3. When Vy is grounded, the output current Iz can be expressed as I z = αI x + ε,
IB2
I B1
Vy i y Vx ix
y x
(6)
CCCCTA
±io Vo
o
iz Vz
z
(a)
y
x
1 R ix x
± g mVZ ix (b)
FIGURE 1 CCCCTA (a) Symbol (b) Equivalent circuit.
o z
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M. Siripruchyanun et al.
I B1
VDD
I4
M3
M4 Vin
I B1
I in
M2
M1 VSS
I2
FIGURE 2 Class AB translinear loop.
FIGURE 3 A CMOS-based second generation current controlled current conveyor.
where α and ε are current gain and error terms, respectively. By straightforward analysis of circuit in Fig. 3, we will obtain the α and ε as
α=
gm 4 gm13 gm 2 gm 9 , + gm12 ( gm 2 + gm 4 ) gm 8 ( gm 2 + gm 4 )
(7)
and
I B1 gm 4 gm13 I B1 gm 2 gm 9 − + gm 3 gm12 g m1 g m 8 ε= . I B1 gm 2 − gm 4 gm 4 gm13 + gm 2 gm 9 gm 8 ( gm 2 + gm 4 ) gm1 gm 3 gm12
(8)
Realization of CMOS CCCCTA and Its Applications
39
If gm1 = gm 4 , gm 2 = gm 4 , gm 8 = gm 9 and gm12 = gm13 , then the output current can be found to be I z = I x .
(9)
The output resistance looking into the z terminal (rz) can be respectively expressed as r r rz ≅ o 9 o13 , (10) ro 9 + ro13 where ro is the drain-source resistance seen at the mentioned output terminal. 2.3 Transconductance Amplifier In this section, a simple differential pair amplifier [6] is employed to achieve simpler circuit description of the proposed CCCCTA as shown in Fig. 4. From Fig. 4, transistors M14 and M15 function as a differential amplifier to convert an input voltage to an output current. M16 and M17 work as a simple current mirror when IB2 is an input bias current. When Vin is applied, this makes ID14 and ID15 flowing in M14 and M15, respectively. The relationship of Io and Vinof the transconductance amplifier is given by
I O = β1 gm14V1 − β2 gm15V2 + ,
(11)
where β1 and β2 are transconductance ratios. By straightforward analysis of circuit in Fig. 4, we will obtain the β1 and β2 as
β1 =
gm17 ( gm15 gm16 − gm14 gm17 ) + , gm16 gm16 ( gm14 + gm15 )
FIGURE 4 The simple transconductance amplifier.
(12)
40
M. Siripruchyanun et al.
β2 = 1 −
( gm15 gm16 − gm14 gm17 ) , gm16 ( gm14 + gm15 )
(13)
and
=−
I B ( gm15 gm16 − gm14 gm17 ) gm16 ( gm14 + gm15 )
.
(14)
If gm14 = gm15 = gm and gm16 = gm17 , Eq. (11) can be expressed as
I O = gm (V1 − V2 ) ,
(15)
where gm = βn I B 2 . The output resistance looking into the x terminal (ro) can be respectively expressed as
rO ≅
ro15ro17 . ro15 + ro17
(16)
2.4 Proposed Current Controlled Current Conveyor Transconductance Amplifier The proposed CCCCTA consists of two principal blocks: a current controlled second generation current conveyor (CCCII) circuit and an operational transconductance amplifier (OTA) circuit. The proposed realization of the CCCCTA in a CMOS technology to achieve a wide-range of frequency responses is shown in Fig. 5. The circuit implementation consists of mixed translinear loop (M1-M4). The mixed loop is DC biased by using current mirrors (M5-M7 and M10-M11). The Rx can be obtained by Eq. (2). The output z-terminal that generates the current from x terminal is realized using transistors (M8-M9 and M12-M13). The simple-version transconductance amplifier is
FIGURE 5 Completely proposed current controlled current conveyor transconductance amplifier.
Realization of CMOS CCCCTA and Its Applications
41
realized using transistors (M14-M17), whose transconductance gain can be adjusted by IB2. 3 Simulation results To prove the performances of the proposed CCCCTA, the PSPICE simulation program was used. The PMOS and NMOS transistors employed in the proposed element in Fig. 2 were simulated by respectively using the parameters of a 0.35 µm TSMC CMOS technology [7] with ±1.5 V supply voltages. The aspect transistor ratios of PMOS and NMOS are listed in Table 1. Fig. 6 depicts the parasitic resistance Rx at input terminal when IB1 has varied. Fig. 7 shows the transconductance value when IB2 was varied from 1µ A − 200µ A . Fig. 8 displays DC transfer characteristic of the proposed CCCCTA, when I B1 = 10µ A, 50µ A and 100µA. So it is seen that it is linear in range of −7mA ≤ I x ≤ 7mA . Moreover, the bandwidths of output terminals are shown in Fig. 9. We found that the –3dB bandwidth of I z / I x , Vx / Vy , I o / I x and I o / Vy are respectively located at 333.48 MHz, 4.12 GHz, 107.34 MHz and 115.22 MHz. The summarized properties of the CMOS CCCCTA are shown in Table 2. Table 1 Dimensions of the MOS transistors. CMOS Transistors
W(µm) / L(µm)
M1-M2 M3-M4
12/1 4/1 10/1 8/1 10/5 30/1 30/5 30/5
M5, M7 M6 M8-M9 M10-M11 M12-13 M14-M17
10M RX(Ω)
1.0M
1.0k 10 1.0n
10n
100n
IB1(A)
FIGURE 6 Parasitic resistance at x terminal relative to IB1.
1.0µ
10µ
100µ 300µ
M. Siripruchyanun et al.
Transco nducta nce (mS)
42 1 0 .8 0.5 0.4 0.2
20
0
40
80
100 120 I B2(µA )
140
-0.2
0 0.2 Ix (mA)
0.4
60
160 180 200
FIGURE 7 Transconductance value relative to IB2. 1.0
Iz (m A)
I B1 =10µA IB 1=50µA IB 1=100µA
0
-1.0 -1.0
-0.8
-0.6
-0.4
0.6
0.8
1.0
FIGURE 8 DC transfer characteristic of the CCCCTA. 10
Gai n(dB)
0 I Z/I X VX/VY I B1=50 µA
-20
-40 1.0k
10k
100 k
1.0M 10M Frequency(Hz)
100M
1.0 G
100 M
1.0G
10 G
(a)
Gain (dB)
40
0
-40
IO /IX I O /V Y IB1 =50 µA I B2=100µA
- 80 1.0k
10k
100 k
1.0M 10M Frequency(Hz)
(b) FIGURE 9 Frequency responses at output terminals.
10 G
Realization of CMOS CCCCTA and Its Applications
43
Table 2 Conclusions of the CMOS CCCCTA parameters. Parameters
Values
Power supply voltages
±1.5 V
Power consumption
899 µW
3dB Bandwidth
333.48 MHz(Iz/Ix), 4.12 GHz(Vx/Vy), 107.34 MHz(Io/Ix), 115.22 MHz(Io/Vy)
Input current linear range
–0.7 mA to 0.7 mA
Rx range
491.09 Ω-15.76 MΩ
Input bias current range for controlling Rx
1nA-95.29 µA
Transconductance range
0.28 mS–1 mS
Input bias range for controlling transconductance amplifier
1 µA–180 µA
Rz
140.16 kΩ
Ro
207.87 kΩ
Ry
9.32 MΩ
4 Application examples 4.1 Digitally-programmable current-mode universal biquad filter The first application of the proposed CCCCTA is a current-mode biquad filter shown in Fig. 10. It employs only one active element and 2 grounded capacitors, which is easy to fabricate, differing from previous circuits [8–9]. The CCCCTA in Fig. 10 is slightly modified from the proposed CCCCTA in Fig. 5 by using dual-output CCCCTA which can be easily achieved by using the current mirrors to copy current from z1 to z2 terminal to extend the usability of the CCCCTA. Straightforwardly analyzing the circuit in Fig. 10 and using CCCCTA properties in section 2, the transfer functions of the network can be obtained as 2nd
IO =
I in1 sC2 + gm I in 2 − I in 3 (s 2C1C2 Rx + sC2 + gm ) s 2C1C2 Rx + sC2 + gm
.
(17)
From Eq. (17), the magnitudes of current inputs Iin1, Iin2 and Iin3 are chosen as in Table 3 to obtain a standard function of the 2nd order network. The circuit for selection can be seen in [10]. From Eq. (17), the pole frequency (ω0) and quality factor (Q0) of each filter response can be expressed as
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M. Siripruchyanun et al.
I B1
I in1
C1
IB2
o CCCCTA y z2 z1
x
I in 2
IO I in 3
C2
FIGURE 10 Current-mode universal biquad filter based on the CCCCTA.
TABLE 3 The Iin1, Iin2 and Iin3 value selections for each filter function response. Filter Responses
Input
Io
Iin1
Iin2
Iin3
BP
1
0
0
HP
1
1
1
LP
0
1
0
BR
1
0
1
AP
2
0
1
ω0 =
gm , C1C2 Rx
(18)
Q0 =
C1 Rx gm . C2
(19)
and
Substituting the intrinsic resistance and transconductance as depicted in Eqs. (2) and (3) into Eqs. (18) and (19), it yields 1/ 2
I I ω0 = 8βn B1 B 2 , C1C2
(20)
Realization of CMOS CCCCTA and Its Applications
45
and 1/ 2
C I Q0 = 1 B 2 . C I 2 B1
(21)
From Eqs. (20) and (21), by maintaining the ratio of IB1 and IB2 constant, the pole frequency can be adjusted by IB1 and IB2 without affecting the quality factor. To prove the performances of the proposed circuit, the PSPICE simulation program was used. C1= C2= 1nF, IB1 = 50 µA, IB2= 150 µA are chosen to obtain resistance and transconductance values of 2.59 kΩ and 0.236 mS, respectively. This yields the pole frequency of 53.70 kHz. Calculated value of this parameter from Eq. (18) is 48.06 kHz. The results shown in Fig. 11 are the gain and phase responses of the proposed biquad filter obtained from Fig. 11. There are clearly seen that the proposed biquad circuit can provide lowpass, high-pass, band-pass, band-reject and all-pass functions dependent on selections as shown in Table 3, without modifying circuit topology. Fig. 12 displays magnitude responses of band-pass function for different IB values. It is shown that the pole frequency of the responses can be adjusted by the input bias current IB1. 4.2 Grounded Inductance Simulator The grounded inductance simulator based on the CCCCTA is shown in Fig. 13. It employs only single CCCCTA, which contrasts to ordinarily proposed circuits [11–12]. From routine analysis and using the CCCCTA properties, an input impedance of the circuit can be written as
Z in =
Vin sCRx = . I in gm
(22)
From Eq. (22), it is obvious that the circuit shown in Fig. 13 performs a grounded inductance with a value
Z in =
Vin sCRx = . I in gm
(23)
From Eq. (23), the inductance value Leq can be adjusted electronically by either IB1 or IB2. The impedance and phase of the simulator relative to frequency, which are compared to ideal inductor are also shown in Fig. 14 where C = 1nF, IB1 = 30 µA and IB2 = 100 µA. Fig. 15 shows impedance values relative to frequency of the simulator for different IB2.
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M. Siripruchyanun et al.
Pha se -100d
40 Gain (dB)
0
0
-40
-200d -801.0k
Gain Phase
3.0
10k
30k 100k Frequency (Hz)
300k
1.0M 3.0M
300k
1.0M
300k
1.0M 3.0M
300k
1.0M
300k
1.0M 3.0M
(a) Pha se -100d
Gain (dB)
0 40 0
Gain Phase
-40 -200d -801.0k
3.0k
10k
30k 100k Frequency (Hz)
3.0M
(b) 0
Gain (dB)
P hase
100d
0 -20
-100d -401.0k
Gain Phase
3.0k
10k
30k 100k Frequency (Hz)
(c)
0
Gain (dB)
Phase
100d 20 0
-20
-100d -40 1.0k
Gain Phase
3.0k
10k
30k 100k Frequency (Hz)
3.0M
(d) 180d
5
0
Gain (dB)
Phase
100d 0
-100d -180d
-51.0k
Gain Phase
3.0k
10k
30k 100k Frequency (Hz)
(e) FIGURE 11 Gain and phase responses of the biquad filter in Fig. 10 (a) LP (b) HP (c) BP (d) BR (e) AP.
Realization of CMOS CCCCTA and Its Applications
47
10 Gain (dB)
0
-25
IB 1 =I B2 =5μA I B1 =I B2 =20μA IB 1=IB 2 =120μA C1 =1nF, C2 =0.1nF
-503.0k
10k
30k
100k 300k Frequency (Hz)
1.0M
3.0M
FIGURE 12 Band-pass responses for different values of IB.
FIGURE 13 Grounded inductance simulator based on the CCCCTA.
100 d Ideal Simulated Impedance Phase IB1 =30 µA I B2=100µA
50 d 10k
Pha se
Impedan ce (Ω)
10M
0d
-50d 10
-100 d 1.0 k
3.0 k
10 k
30k
100k 300k Frequency(Hz)
1 .0M
10M
3.0M
FIGURE 14 The impedance and phase relative to frequency of the grounded inductance simulator.
10M
Imped ance (Ω )
1.0M
IB2 =100 µA I B2=200µA
10k
I B2=300µA
100 10 1.0 k
10 k
100k 1.0 M Frequency (Hz)
10 M
100 M
FIGURE 15 The impedance values relative to frequency of the simulators with different IB2.
48
M. Siripruchyanun et al.
4.3 Sinusoidal Oscillator The sinusoidal oscillator based on the CCCCTA is shown in Fig. 16. It consists of single output CCCCTA and 2 grounded capacitors. Considering the circuit in Fig. 16 and using the CCCCTA properties, it yields characteristic equation of this circuit as
s 2C1C2 Rx + s (C1 − C2 ) + gm = 0.
(24)
From Eq. (24), it can obviously seen that the proposed circuit can be set to be a sinusoidal oscillator if C1 = C2 .
(25)
Eq. (25) is called as the condition of oscillation. Then the characteristic equation of the system becomes s2 +
gm = 0. C1C2 Rx
(26)
From Eq. (26), the oscillation frequency of this system can be obtained as 1/ 2
I I gm ω0 = = 8βn B1 B 2 . C1C2 Rx C1C2
(27)
It can be seen that, from Eq. (27), the oscillation frequency (ω0) can be controlled by bias current. The confirmed result of the oscillator can be seen in Fig. 17. They show the responses of oscillator with bias currents: IB1 and IB2 are respectively set to 50 µA and 100 µA. Fig. 18 shows the simulated output spectrum, where the total harmonic distortion (THD) is about 1.07%.
FIGURE 16 Oscillator based on the CCCCTA.
Realization of CMOS CCCCTA and Its Applications
49
4.4 Voltage-mode Universal Biquad Filter The final application of the proposed CCCCTA depicted in this paper is a voltage-mode universal biquad filter shown in Fig. 19. For straightforward analysis of the circuit in Fig. 19 and using CCCCTA properties in section 2, the transfer functions of the network can be obtained as VO =
Vin1 s 2 C1C2 + Vin 2 sC2 G1 + Vin 3Gx gm . s 2C1C2 + sC2 G1 + Gx gm
(28)
V O (mV)
200
0 C1 =0.1nF C2 =0.11nF
-2000
10
20
30
40
50 60 Time (µs)
70
80
90
FIGURE 17 The output waveform obtained from the oscillator in Fig. 16.
V O (m V)
200
100
00
C1 =0.1nF C2 =0.11nF THD=1.07%
100k
200k
300k
400k 500k 600k Frequency (Hz)
700k 800k 900k 1M
FIGURE 18 The simulation result of output spectrum.
FIGURE 19 Voltage-mode universal biquad filter based on the CCCCTA.
100
50
M. Siripruchyanun et al. Table 4 The Vin1, Vin2 and Vin3 value selections for each filter function response. Filter Responses
Input
V0
Vin1
Vin2
Vin3
BP
0
1
0
HP
1
0
0
LP
0
0
1
BR
1
0
1
AP
1
-1
1
From Eq. (28), the magnitudes of input voltages: Vin1, Vin2 and Vin3 are chosen as in Table 4 to obtain a standard function of the 2nd order network. From Eq. (28), the pole frequency (ω0) and quality factor (Q0) of each filter response can be expressed as 1/ 2
I I gm ω0 = = 8βn B1 B 2 . C1C2 Rx C1C2
(29)
and 1/ 2
Q0 = R1
C1 Rx gm C1 I B 2 = . C I C2 2 B1
(30)
It is either found that, from Eqs. (29) and (30), the quality factor can be adjusted by R1 without affecting the pole frequency. Reversely, the pole frequency can be controlled via Rx or gm. To prove the performances of the proposed circuit, the PSPICE simulation program was also used. C1 = C2 = 1nF , I B1 = 50µ A, I B 2 = 150µ A and R1 = 4.7kΩ are chosen. The results shown in Fig. 20 are the gain and phase responses of the proposed biquad filter obtained from Fig. 19. It is seen that the proposed biquad circuit can provide low-pass, high-pass, band-pass, band-reject and all-pass functions dependent on selection as shown in Table 4, without modifying circuit topology. Fig. 21 displays gain responses of band-pass function for different R1 values. It is shown that the quality factor can be controlled by R1 without affecting the pole frequency.
Realization of CMOS CCCCTA and Its Applications 40
Ph ase -100 d
Gain (dB)
0
0
-40 -200d -801 .0k
Gain Phase
3.0
10k
30k 100k Frequency (Hz)
300 k
1 .0M 3.0M
(a)
90d
Gain (dB)
Ph ase
180 d 40 Gain Phase
0
-40 0d -801.0k
3.0k
10 k
30 k 100 k Frequency (Hz)
300k
1.0M 3.0M
300k
1 .0M 3.0M
300k
1.0M 3.0M
300 k
1 .0M 3.0M
Ph ase
Gain (dB)
(b) 100 d
0 Gain Phase
0 -20
-100d
401.0k
3 .0k
10k
30 k 100 k Frequency (Hz)
(c)
0
Gain (dB)
P hase
100d 20 0
-20
-100 d -40 1.0k
Gain Phase
3.0 k
10 k
30 k 100k Frequency (Hz)
(d) 5
180d
Gain Phase
0
-100 d
Gain (dB)
Phase
100d 0
-180 d -51.0 k
3.0k
10k
30k 100k Frequency (Hz)
(e) FIGURE 20 Gain and phase responses of the biquad filter in Fig. 19 (a) LP (b) HP (c) BP (d) BR (e) AP.
51
M. Siripruchyanun et al.
Gain (dB)
52 0
-25
-501.0k
R1 =2kΩ R 1=4.7kΩ R1 =10kΩ
3.0k
10k
30k 100k Frequency ( Hz)
300k
1.0M
3.0M
FIGURE 21 Band-pass responses for different values of R1.
5 Conclusion The new basic building block, called CCCCTA, has been introduced via this paper. The usabilities have been proven by the simulation and application examples. They consume few numbers of components while electronic controllability is still available, which differs from the recently proposed elements. This modified element is very appropriate to realize in commercially-purposed integrated circuit. Our future work is to find more applications of the CCCCTA, emphasizing on analog signal processing circuits such as multiplier/divider, rectifier, etc.
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[10] Y. Maruyama, A. Hyogo, and K. Sekine, “A digitally programmable CMOS biquad filter using current-mode integrators,” IEICE Transactions on fundamentals, vol. E85-A, pp. 316–323, 2002. [11] J. S. Pena-Finol and J. A. Connelly, “Novel lossless floating immittance simulator employing only two FTFNs,” Analog Integrated Circuits and Signal Processing, vol. 29, no. 3, pp. 233–235, 2001. [12] I. A. Khan and M. H. Zaidi, “A novel ideal floating inductor using translinear conveyors,” Active and Passive Electronic Components, vol. 26, no. 2, pp. 87–89, 2003.