Reliability Estimation of Three Single-Phase Topologies ... - IEEE Xplore

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 7, JULY 2011

2683

Reliability Estimation of Three Single-Phase Topologies in Grid-Connected PV Systems Freddy Chan and Hugo Calleja, Senior Member, IEEE

Abstract—This paper presents the reliability estimation of the power stages in three grid-connected photovoltaic systems. The circuits analyzed are an integrated topology, a two-stage configuration, and a three-stage one, all commutating in the hard-switching mode. The reliability-related parameters, such as the failure rate, are calculated following the procedure outlined in MIL-HDBK 217. A comparison between the topologies is performed, and both the components and the stress factor with the highest contribution to the failure rate are identified. The methods to calculate junction temperature variations are included. Index Terms—Photovoltaic (PV) inverters, reliability.

I. I NTRODUCTION

I

N A TYPICAL photovoltaic (PV) system for residential applications, the PV cells have an operational life in excess of 20 years. The power stage, however, usually has a much shorter operational life [1]. The great majority of electronic components do not have any mechanism that will cause degradation or failure during storage or use, provided that they are properly selected and applied (in terms of performance, stress, and protection), not defective or damaged when assembled into the circuit, and not overstressed or damaged in use [2], [3]. Nevertheless, electrolytic capacitors have been singled out as the most troublesome component, and topologies without large capacitors have been developed [4]–[7]. It is assumed that the avoidance of electrolytic capacitors provides, by itself, a higher reliability, regardless of the total number of components employed, the switching modes, and the stresses. Recently, methodologies to upgrade the power converter reliability have been presented. Several factors (duty cycle limits, isolation requirements, electromagnetic interference, switching mode, continuous or discontinuous conduction mode, etc.) should be taken into account during the design cycle [8]–[11]. The first step to achieve a high-reliability converter is to select a suitable topology [12]–[18]. Quite often, reliability and low cost are mutually excluding requirements. The reliability can be improved in a number of ways. The simplest one is to overrate the components used to build the inverter. A second approach is to use redundancy. A third one is to gather information about the operational environment and failure modes

and to use this information to redesign the inverter. Clearly, the first two options produce a rise in cost. The third option requires information from a large number of inverters, collected throughout a period sometimes spanning several years. This paper is a step toward identifying the most reliable topologies for single-phase PV systems and takes advantage of computational tools to reduce both time and cost. It presents the reliability-based analysis of three hard-switching inverters previously reported: a two-stage PV system, a three-stage one, and an integrated topology. The reliability-related parameters, such as the failure rate, are calculated following the procedure outlined in MIL-HDBK 217 [19]. A comparison between the topologies is performed, and both the components and the stress factor with the highest contribution to the failure rate are identified. II. BACKGROUND The MIL-HDBK 217 handbook lists the failure rates λb for electronic devices. To predict the reliability of an electronic assembly, it is necessary to first calculate the actual failure rates λp of the components involved. The actual values are obtained multiplying the listed λb values by the π factors that take into account the stresses. The actual failure rate is given by n λp = λb πi (1) i=1

where n is the number of π factors for each device. The mean time between failures (MTBF) is given by MTBF = λ−1 p . The reliability R can be calculated as R = e−λp t .

(3)

Unless some kind of redundancy is included, the reliability RP of the power stage in a PV system (of m items) is calculated as Rp =

Manuscript received October 30, 2009; revised March 28, 2010; accepted May 12, 2010. Date of publication July 23, 2010; date of current version June 15, 2011. F. Chan is with the University of Quintana Roo, Chetumal 77019, México (e-mail: [email protected]). H. Calleja is with Cenidet, Morelos 62490, Mexico (e-mail: hcalleja@ cenidet.edu.mx). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIE.2010.2060459

(2)

m

Rj

(4)

j=1

where the term Rj corresponds to the individual reliabilities of the components in the power stage. It follows then that a soft-switching topology does not necessarily provide a better reliability than a hard-switching approach, particularly if soft switching is achieved at the expense of a larger number of devices.

0278-0046/$26.00 © 2010 IEEE

2684


TABLE I S TRESS FACTORS

TABLE IV A PPLICATION FACTOR

TABLE II T EMPERATURE S TRESS FACTORS

TABLE V M ETHODS TO C ALCULATE J UNCTION T EMPERATURE VARIATIONS

calculated as TABLE III Q UALITY FACTORS πQ

πV =

S 0.6

5 + 1.

(6)

The factor πS depends on the ratio Vs between the reverse voltage applied to a diode and its rated reverse voltage. In can be calculated as πs = Vs2.43 . Power electronics apparatus are usually built with transistors, diodes, capacitors, and inductors. The stress factors for these devices are listed in Table I. The factor πT is related to temperature [19]. It can be calculated with the expressions listed in Table II. The term Tj is the junction temperature, for transistors and diodes, or the hot-spot temperature for inductors and capacitors. Section III explains how it can be calculated. The quality factor πQ has a direct effect on the failure rate. Many parts are covered by specifications that have several quality levels. Hence, the part models have πQ values that are keyed to these levels. The quality designators and the corresponding numerical values are listed in Table III. JANTX and JANTXV are high-quality devices in sturdy packages. The factor πE depends on the operational environment: ground (G), seaborne (N ), airborne (A), missile (M ), etc. In this case, it is assumed that the environment is ground benign (GB ) and πE = 1. The application factor πA basically depends on the power handled by the device, as listed in Table IV. The factor πC depends on the capacitance value, expressed in microfarads, according to πC = C 0.23 .

(5)

The factor πV depends on the ratio S between the voltage applied to the capacitor and its rated voltage. This factor is

(7)

III. T HERMAL M ANAGEMENT The operating temperature is a matter of concern from the device selection perspective. Therefore, it is important to have an accurate value of the junction temperature Tj in the actual application. In some cases, either Tj or the temperature rise ΔT can be directly measured. In other cases, Tj can be estimated using other experimental data or information provided by the device manufacturer. In the rare occasion when nothing at all is known about the junction temperature, a standardized temperature rise is used, i.e., ΔTdefault . The Reliability Analysis Center (RAC) provides five different methods to estimate the temperature in semiconductors (diodes, transistors, and thyristors), as listed in Table V. Method I. This method is appropriate when the junction temperature is unknown, and cannot be estimated. Depending on the type of device, RAC assigns a standard value to the temperature rise ΔTdefault . Method II. This method can be used if, through an examination of the devices, the actual temperature rise ΔTactual is known. It is not necessary to introduce any other information. Method III. If both the losses dissipated by the device Pd and the thermal resistance θja between junction and ambient are known, then the junction temperature can be estimated as directed by this method.

CHAN AND CALLEJA: RELIABILITY ESTIMATION OF THREE SINGLE-PHASE TOPOLOGIES IN PV SYSTEMS

Method IV. An alternative way to estimate the junction temperature is by using the thermal resistance between junction and case θjc , instead of θja . It is advisable to use this method when the device is mounted on a heatsink, or some kind of liquid cooling or forced ventilation is used. Care should be taken to ensure that the case temperature TC is properly measured. Method V. This method evaluates the temperature in a device by using its temperature rise, and the electrical stress. It can be applied when the differential temperature (ΔT ) between the component and its environment is known (taking into account the proximity from other heat sources or heatsinks). The stress is the ratio between the actual current and its rated value. The reliability prediction models should be flexible in the way in which Tj is calculated, and the particular method to be applied depends on the data available. The method applied herein is Method III Tj = Ta + Pd ∗ θja

(8)

θja = θjc + θcs + θsa

(9)

where θja junction–ambient thermal resistance; θjc junction–case thermal resistance; θcs case–sink thermal resistance1 ; θsa sink–ambient thermal resistance. Combining (8) and (9), an expression for θsa is obtained θsa =

Tj − Ta − (θcs + θjc ). Pd

(10)

The maximum junction temperature should be used to calculate the maximum sink-to-ambient thermal resistance. That is θsa,max =

Tj,max − Ta − (θcs + θjc ). Pd

(11)

IV. M ETHODOLOGY To perform a fair comparison among the different topologies, they must be designed for the same operating point, and assume that the operating conditions are similar. Thus, all the PV systems were designed with a 500-VA output rating. The inverters were designed using the equations included in the papers that described its operation or, for well-known configurations, the standard procedures described in text books. Once the values of the passive elements were calculated, similar criteria were applied to select the particular components used in the three designs. Once the component types and values are known, the failures rates λb can be readily obtained from MIL-HDBK 217, but the stress factor must be calculated for the particular application. These factors depend on the maximum voltages and currents 1 For

the adhesive of the heatsink, θcs is between 0.5 ◦ C/W and 0.7 ◦ C/W.

2685

Fig. 1. Two-stage PV system.

in the components. In turn, these parameters were obtained by simulating the power circuits in SPICE and PSIM. The actual reliability calculations were performed using RELEX [20], a commercial software package that includes a database with the component failure rates and executes the procedure in MIL-HDBK 217. It calculates the stress factors when maximum voltage, current, and power dissipation for each component are provided. It also calculates and plots reliability parameters, such as failure rate or MTBF, and its behavior over temperature or time. It should be noted that the calculations only included the elements in the power stage. The control circuitry and other elements, such as the transistor drivers, were not included in the analysis. V. R ELIABILITY C ALCULATIONS A. Two-Stage PV System The two-stage configuration is shown in Fig. 1. The first stage is an interleaved boost converter that draws a low-ripple current from a dc source [21]. The second stage is a singlephase bridge inverter. The system specifications are as follows: fS(boost) = 75 kHz, fS(inverter) = 5 kHz, VIN = 170 V, V grid = 220 V @ 60 Hz, T 1−T 2 = SPP04N50C3, D1− D2 = 15ETX06, L1−L2 = 6.93 mH, and C = 1.096 μF @ 400 V (polypropylene, metalized film). The stress factors are calculated according to the procedures already described. The results for the three PV systems analyzed are shown in Table VI. With these data, it is possible to compute the reliability parameters. Fig. 2 shows the percentage contributions from the individual components to the overall failure rate. Clearly, the most failure-prone devices are the power transistors. Fig. 3 shows the reliability over time for the overall PV system and the individual contributions from each stage at an ambient temperature equal to 55 ◦ C. The failure rate of the inverter stage is higher than that of the boost converter (59% versus 41%). This behavior occurs because the inverter includes twice the number of MOSFETs than the boost converter. It can be seen in Table VI that the highest contribution to the failure rate is due to πT , which is related to the temperature. In turn, this factor depends on the power dissipated by the transistors. It makes sense then to reduce the dissipation in order to increase the reliability. One way to achieve this reduction is by using transistors with a lower on-resistance RON . Fig. 4 shows the failure rates associated with the MOSFETs in the inverter stage when the PV system is built with different transistors belonging to the same family, but with increasingly higher current ratings: 4.5,

2686


TABLE VI S TRESS FACTOR FOR THE T OPOLOGIES A NALYZED

Fig. 2. Percentage contributions from the individual components to the overall failure rate.

Fig. 4.

Failure rates for different stress factors and level quality. TABLE VII L OSS E STIMATION FOR D IFFERENT T RANSISTORS

Fig. 3. Reliability results.

8, 12, 16, and 21 A (from left to right). All transistors are in the TO220 package, regardless of the current rating. It can be noticed that increasing the current rating, from 4 up to 16 A, provides a 6% maximum reduction in the failure rate. A further increment, to 21 A, does not translate into higher reliability. The reason is that a transistor with a higher current rating is manufactured using a larger silicon area, therefore yielding a lower on-resistance and, consequently, lower conduction losses Pc . The drawback is that as the area becomes larger, so does the input capacitance CISS , which accounts for higher gate drive losses Pxc . The relation between Pxc and CISS is given by: Pxc = CISS ∗ (VIN )2 ∗ fs .

(12)

Table VII lists the overall losses dissipated by the device Pd , the conduction losses Pc , the switching losses Psw , and losses associated to gate drive Pxc for each transistor analyzed. The difference in the loss distribution for two transistors (third and sixth rows, Table VII) is shown in Fig. 5. Another factor with a large contribution to the failure rate is πQ . This factor can be improved by using better quality components. Fig. 4 also shows the failure rates attained with different quality transistors. SPP04N50C3 and IRF730A are commercial quality devices in a TO-220 package. JANTX2N6760 and JANTXV2N6760 are high-quality devices in a TO-3 package. The four transistors share similar ratings: VDS = 400 V, ID = 5 A, and RON = 1 Ω.


Fig. 5.

2687

Loss distribution for (a) SPP08N50C3 and (b) SPP21N50C3.

Fig. 7. Reliability results.

Fig. 6.

Three-stage PV system.

B. Three-Stage PV Systems The three-stage PV system is shown in Fig. 6 [22]. The first stage is a boost dc/dc converter, used to raise the solar panel voltage up to 200 V. This stage is also used to ensure that the panel is operating at the maximum power point. The second stage is a push–pull dc/dc converter that generates a full-wave rectified voltage. The third stage is a bridge inverter that behaves as a polarity inverter, switching at the mains frequency. The system specifications are as follows: fS = 100 kHz, VIN = 170 V, V grid = 220 V @ 50 Hz, T 1 = IRFP254, T 2−T 3 = IRFP460, D1 = BYV29400, D2−D5 = BYR29800, SW 1−SW 4 = BT152800, L1 = 68 μH (RM10), L2 = 4 mH (E42/15), C1 = 3.3 μF @ 250 V (polypropylene, metalized film), and C2 = 550 μF @ 380 V (electrolytic, aluminum). The push–pull converter exhibits the highest failure rate (70%) because it includes two MOSFETs. The inverter exhibits the lowest failure rate (2%), although it includes four switching devices. These devices are thyristors, which are a very mature technology, and therefore have a much higher reliability than MOSFETs. Fig. 7 shows the reliability over time at an ambient temperature equal to 55 ◦ C. Fig. 8 shows the percentage contributions from the individual components to the overall failure rate. In this configuration, the inductor contribution to the failure rate is too small to be noticeable. In addition, and as in the previous case, the transistors have the lowest reliability. The system includes an electrolytic capacitor at the PV panel terminals. Since capacitors have often been blamed as a major failure source, it is instructive to explore the effect of this element on the overall reliability. Looking at the stress factors for this case, the highest contribution is due to πV , which is related to the voltage rating. The effect is shown in Fig. 9, which corresponds to the overall failure rate, for three different voltage ratings, at TA = 55 ◦ C. Electrolytic capacitors are often considered the most failure-prone component. In this case, however,

Fig. 8. Percentage contributions from the individual components to the overall failure rate.

Fig. 9. Overall failure rate for different capacitor voltage rating.

the MOSFETs exhibit the highest failure rate. Similar trends have been found in other analysis [23], [24]. According to capacitor manufacturers, the explanation is that reliability was previously estimated using models based on temperature alone. In addition, new technologies have dramatically improved the operational life.

2688


Fig. 10. Boost inverter.

Fig. 12.

Failure rate over temperature for the three systems.

Fig. 13.

MTBF over temperature for the three systems.

Fig. 11. Reliability results for the boost inverter.

C. Boost Inverter An integrated boost inverter [25] is shown in Fig. 10. This is a symmetrical circuit formed by two bidirectional dc/dc converters. Each one generates a dc output, plus an alternating voltage at the mains frequency, and is 180◦ out of phase from each other. The output is obtained in a differential manner, between the outputs, and each converter provides half the output power. The system specifications are as follows: PO = 500 W, fS = 30 kHz, VIN = 48 V, V grid = 220 V @ 60 Hz, T 1−T 4 = SPP08N50C3, L1−L2 = 424 μH, and C1−C2 = 17 μF @ 250 V (electrolytic, aluminum). Looking at the failure rate contributions, it is found that the transistors are, by far, the most failure-prone devices (96%). Fig. 11 shows the relationship between reliability and time, at different ambient temperatures. It can be readily confirmed that reliability is highly dependent on temperature. D. PV System Comparison Fig. 12 shows the failure rates over temperature for the three PV systems analyzed. Fig. 13 corresponds to the MTBF over temperature. It can be seen that the two-stage configuration has the highest failure rate. This behavior occurs because this topology includes six MOSFETs, with fairly high stresses, while the other configurations include fewer transistors. The most complex configuration is the three-stage one; nevertheless, it exhibits the best failure rate. This can be explained by two reasons. The first one is that the circuit was simulated with

the devices listed in the reference where it is reported, and the transistors are overrated. The second reason is that the third stage is implemented with thyristors, switching at a very low frequency; therefore, this stage has a high reliability. For temperatures above 60 ◦ C–70 ◦ C, some topologies could have MTBFs lower than 40 000 h (about five years). This is an important issue to ponder when the PV system is to be installed in hot-weather areas. VI. C ONCLUSION Analyzing the results obtained, the following conclusions can be drawn. 1) The complexity of the circuit, in terms of the number of devices, is not necessarily related to its reliability, although it might become important when some other issues, such as the efficiency or volume, are taken into account. 2) The capacitor is not necessarily the weakest link in the circuit. In the three circuits analyzed, the switching transistors were the weakest link. Other components, such as the inductors, do not contribute significantly to the failure rate.


3) The stress factor with the highest contribution to the failure rate is πT . Therefore, the thermal design is a critical issue and must be carefully performed. Overrating the transistors might help increase the reliability, but only to a certain point. As shown in Fig. 4, using too large transistors can be counterproductive. This is particularly true when high-frequency switching is used. 4) The capacitor contribution to the failure rate was quite small. Nevertheless, some improvements can be obtained by using capacitors with a higher voltage rating. In addition, to avoid overheating, it is of paramount importance to use low equivalent series resistance capacitors. 5) Reliability can be compromised when the design is dictated by parameters such as volume, usually involving higher frequency switching, and corresponding higher losses. It should be noted that the conclusions apply only to the configurations analyzed, the three operating in hard-switching mode. It remains to investigate the reliability behavior of softswitching configurations and other more complex topologies such as multilevel inverters that have already been proposed for single-phase grid-connected PV systems. In any case, identifying the stress factors with the highest contribution to the failure rate will always help improve the overall reliability. To use an inappropriate method to estimate the junction temperature could lead not only to a wrong numerical result but also to an incorrect reliability analysis. The estimation method must be selected taking into account the thermal parameters and data available for the device. R EFERENCES [1] G. Petrone, G. Spagnuolo, R. Teodorescu, M. Veerachary, and M. Vitelli, “Reliability issues in photovoltaic power processing systems,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2569–2580, Jul. 2008. [2] J. Jones and J. Hayes, “A comparison of electronic-reliability prediction models,” IEEE Trans. Rel., vol. 48, no. 2, pp. 127–134, Jun. 1999. [3] P. O’Connor, Practical Reliability Engineering. Chichester, U.K.: Wiley, 2002, pp. 247–289. [4] T. Shimizu, K. Wada, and N. Nakamura, “Flyback-type single-phase utility interactive inverter with power pulsation decoupling on the DC input for an AC photovoltaic module system,” IEEE Trans. Power Electron., vol. 21, no. 5, pp. 1264–1272, Sep. 2006. [5] J. Kinght, S. Shirsavar, and W. Holderbaum, “An improved reliability Cuk based solar inverter with sliding mode control,” IEEE Trans. Power Electron., vol. 21, no. 4, pp. 1107–1115, Jul. 2006. [6] A. Ristow, M. Begovic, A. Pregelj, and A. Rohatgi, “Development of a methodology for improving photovoltaic inverter reliability,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2581–2592, Jul. 2008. [7] A. Shukla, A. Ghosh, and A. Joshi, “Flying-capacitor-based chopper circuit for DC capacitor voltage balancing in diode-clamped multilevel inverter,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2249–2261, Jul. 2010. [8] F. Chan and H. Calleja, “Design strategy to optimize the reliability of grid-connected PV systems,” IEEE Trans. Ind. Electron., vol. 56, no. 11, pp. 4465–4472, Nov. 2009. [9] G. Chen, R. Burgos, Z. Liang, F. Lacaux, F. Wang, D. Boroyevich, J. D. Van Wyk, and W. G. Odendaal, “Reliability oriented design considerations for high power converter modules,” in Proc. IEEE Power Electron. Spec. Conf., 2004, pp. 419–425. [10] X. Tian, “Design for reliability and implementation of power converters,” in Proc. IEEE Rel. Maintainability Symp., 2005, pp. 89–95. [11] J. L. Agorreta, L. Reinaldos, R. Gonzalez, M. Borrega, J. Balda, and L. Marroyo, “Fuzzy switching technique applied to PWM boost converter operating in mixed conduction mode for PV system,” IEEE Trans. Ind. Electron., vol. 56, no. 11, pp. 4363–4373, Nov. 2009.

2689

[12] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005. [13] S. B. Kjaer, Z. Chen, and F. Blaabjerg, “Power electronics as efficient interface in dispersed power generation systems,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1184–1194, Sep. 2004. [14] Y. Xue, L. Chang, S. B. Kjaer, J. Bordonau, and T. Shimizu, “Topologies of single-phase inverters for small distributed power generator: An overview,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1305–1314, Sep. 2004. [15] G. Velasco-Quesada, F. Guinjoan-Gispert, R. Pique-Lopez, M. Roman-Lumbreras, and A. Conesa-Roca, “Electrical PV array reconfiguration strategy for energy extraction improvement in gridconnected PV systems,” IEEE Trans. Ind. Electron., vol. 56, no. 11, pp. 4319–4331, Nov. 2009. [16] F. Blaabjerg, R. Teodorescu, M. Liserre, and A. V. Timbus, “Overview of control and grid synchronization for distributed power generation systems,” IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1398–1409, Oct. 2006. [17] W. Xiao, W. G. Dunford, P. R. Palmer, and A. Capel, “Regulation of photovoltaic voltage,” IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1365–1374, Jun. 2007. [18] J.-M. Kwon, K.-H. Nam, and B.-H. Kwon, “Photovoltaic power conditioning system with line connection,” IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1048–1054, Jun. 2006. [19] Reliability Prediction of Electronic Equipment, Military Handbook 217-F, Dept. Defense, Arlington, VA, 1991, section 4. [20] [Online]. Available: http://www.relex.com/ [21] U. Herrmann, H. G. Langer, and H. Van der Broeck, “Low cost DC to AC converter for photovoltaic power conversion in residential applications,” in Proc. IEEE Power Electron. Spec. Conf., 1993, pp. 588–594. [22] D. Hirschmann, D. Tissen, S. Schroder, and R. De Doncker, “Reliability prediction for inverters in hybrid electrical vehicles,” in Proc. IEEE Power Electron. Spec. Conf., 2006, pp. 1–6. [23] F. Chan, H. Calleja, and I. Uribe, “Reliability-oriented assessment of a DC/DC converter for photovoltaic applications,” in Proc. IEEE Photovoltaic Spec. Conf., 2007, pp. 1210–1215. [24] M. Aten, G. Towers, C. Whitley, P. W. Wheeler, J. C. Clare, and K. J. Bradley, “Reliability comparison of a matrix and others converter topologies,” IEEE Trans. Aerosp. Electron. Syst., vol. 42, no. 3, pp. 867– 875, Jul. 2006. [25] R. O. Cáceres and I. Barbi, “A boost dc-ac converter: Analysis, design, and experimentation,” IEEE Trans. Power Electron., vol. 14, no. 1, pp. 134–141, Jan. 1999.

Freddy Chan received the B.S. degree in electronic engineering from Mérida Institute of Technology, Mérida, México, in 1996 and the M.S. and Ph.D. degrees in electronic engineering from the National Center for Research and Development of Technology, Cuernavaca, México, in 1999 and 2008, respectively. He is currently a Professor with the Department of Sciences and Engineering, University of Quintana Roo, Chetumal, México. His research interests include energy conversion and reliability issues in photovoltaic systems.

Hugo Calleja (M’90–SM’01) received the Ph.D. degree in electrical engineering from the National Center for Research and Development of Technology, Chetumal, México, in 2000. He worked for six years at the Engineering Faculty, National Autonomous University of Mexico, Mexico City, Mexico, and nine years at the Institute for Electrical Research, where he was in charge of the development of metering equipment. Since 1993, he has been a full-time Professor with Cenidet, where he is currently engaged in the design of photovoltaic (PV) systems. He is the author of a book on electronic circuits for data acquisition. His research interests include electronic instrumentation for power electronics and reliability issues in PV systems.