Reliable and Scalable Architecture for Internet of ...

Reliable and Scalable Architecture for Internet of Things for Sensors Using Soft-Core Processor U. V. Rane, V. R. Gad, R. S. Gad*, G. M. Naik ALTERA SoC laboratory, Department of Electronics, Goa University, Goa , India {[email protected], [email protected], [email protected], [email protected]}

Abstract. With significant technological developments as well as advances in sensors, wireless communications and Internet – a lot of research areas have emerged, such as wearable computing, context-aware homes, mobile phone sensing and smart vehicle systems. From those emerging areas, there is a clear trend to augment the physical devices/objects with sensing, computing & communication capabilities, connect them together to form a network and make use of the collective effect of networked smart things − the Internet of Things(IoT). This paper proposes the IoT architecture ―Kaivalyam1‖ for sensors/actuator. The configurable interface generates the identity of the ‗Thing‘ and stores in 32-bit datagram. The various configuration of the 32-bit datagram from 4,8,12 and 16-bit device data and respective 14, 12, 10 and 8-bits duplicate identifier can scale the number of devices connected to design platform. These datagram‘s read into FIFO of the Triple Speed Ethernet (TSE) for transmission using Low Density Parity Check (LDPC) encoder. Simulation studies for the system were performed for block length 512 bits, which is the minimum Ethernet frame length of 64 bytes. AWGN(Additive White Gaussian Noise) is introduced in the channel and BER(Bit Error Rate) is computed for different (1dB to 6dB) SNR(Signal to Noise Ratio) showing BER of 10-4 -4 to 10-5 can be achieved for SNR of 2.5 dB indicating the secured and reliable data transmission. Keywords: Index Terms— Internet of Things, Architecture, Scheduling, Ethernet and LDPC.

* Dr. R. S. Gad ,Associate Professor, Department of Electronics, Goa University , Goa, India 403206 . Kaivalyam1: Kaivalyam, is the ultimate goal of yoga; and means "Mukti" or "detachment‖ for absolute freedom. It is said in Vedas / Upanishads that there re 4 types of Mukthi/Kaivalyam. Namely: Saalokya, Saaroopya, Saameepya, & Saayujya. Which can be explain as when person worships a Deity he attains to the world of that Deity called ‗Saalokya‘; further he attains ‗Saaroopya‘ i.e. form of that Deity; then he attains ‗Saameepya‘ i.e. proximity to that Deity and finally he becomes one with that Deity i.e. ‗Saayujya‘ (http://www.namadwaar.org/nibbles/?p=150). This way the person attains the absolute freedom which is similar to ‗Thing‘ in IoT getting freedom in space

1

INTRODUCTION

―All things appear and disappear because of the concurrence of causes and conditions. Nothing ever exists entirely alone; everything is in relation to everything else‖ is what said by Prince Gautama Siddharta[1], which has direct relevance with the idea of Internet of Things (IoT) introduced in the PCANS Model[2]. The PCANS model suggests that ―all systems are structured along these three domains, Individuals, Tasks, and Resources‖ and also introduces the concept that networks occur across multiple domains and that they are interrelated. Network science studies complex networks such as engineered, information, biological, cognitive, semantic and social networks. The field draws on theories and methods including graph theory from mathematics, statistical mechanics from physics, data mining and information visualization from computer science, inferential modeling from statistics and social structure from sociology. A telecommunications network is a collection of terminals, links and nodes which connect to enable telecommunication between users of the terminals. Each terminal in the network has a unique address so messages or connections can be routed to the correct recipients. The links connect the nodes together and are themselves built upon an underlying transmission network which physically pushes the message across the link; using circuit switched, message switched or packet switched routing. Examples of telecommunications networks are: computer networks, the Internet, the telephone network, the global Telex network, the aeronautical ‗ACARS‘ network. IoT works has been proposed in several application scenarios, such as environmental monitoring, e-health, intelligent transportation systems, military, and industrial plant monitoring. Technically this requires embedding sensing, actuation, processing, securing, and reliable networking into common objects. Sensors device availability and decreased cost of hardware has triggered the era of new computing systems to integrate the vehicles, devices, goods and everyday‘s object to be a part of IoT[3]. This paper proposes IoT architecture based on the extended Ethernet MAC approach providing various communication front-ends interfaces to reconfigure them for the propose common ‗Kaivalyam1‘ interface which explore novel way for person to object and object to object communication like the sensors or actuator network interface on IoT platform sensors/actuator. Further it elaborates the capabilities of architectures for scalability for nodes and reliability of data using Error Correction Coding with LDPC coding schemes.

2

Architecture of IoT and related enabling technologies and standardizations

There are three IoT components which enables seamless ubicomp: (a) Hardware— made up of sensors, actuators and embedded communication hardware (b) Middle-

3 ware—on demand storage and computing tools for data analytics and (c)Presentation—novel easy to understand visualization and interpretation tools which can be widely accessed on different platforms and which can be designed for different applications. Gartner 2012 Hype Cycle of expected emerging technologies indicates the IoT will take 10-12 years to reach to plateau of productivity[4] . The claims of the Gartner are justified by the ongoing status of standardization activities of EPCglobal, GRIFS, M2M, 6LoWPAN, ROLL and other stakeholders of IoT. Most of them are supporting the data rate of 102 kbps over 1- 100 meters range of communication. 2.1

Enabling Technologies IoT

Development of certain enabling technologies such as nano-electronics, communications, sensors, smart phones, embedded systems, cloud computing and software technologies will be essential to support important future IoT product innovations affecting the different industrial sectors. In addition, systems and network infrastructure (Future Internet) are becoming critical due to the fast growth and advanced nature of communication services as well as the integration with the healthcare systems, transport, energy efficient buildings, smart grid, smart cities, and electric vehicles initiatives. 2.1.1 More Than Moore (MtM) Since 2007, the ITRS (The International Technology Roadmap For Semiconductors: 2012 Update) has addressed the concept of functional diversification under the title ―More than Moore‖ (MtM). The MtM approach typically allows for the non-digital functionalities which don‘t scale as per ‗Moor‘s Law‘ (e.g., RF communication, power control, passive components, sensors, actuators) to migrate from the system boardlevel into a particular package-level (SiP) or chip-level (SoC) system solution. The basic idea of MtM is the pervasive presence around us of a variety of things or objects which, through unique addressing schemes, are able to interact with each other and cooperate with their neighbors to reach common goals [5]. With regards to the IoT paradigm at large, a very interesting standardization effort is now starting in ETSI [6] (the European Telecommunications Standards Institute), that has purpose of conducting standardization activities relevant to M2M systems and sensor networks (in the view of the IoT). The goals of the ETSI M2M committee include: the development and the maintenance of an end-to-end architecture for M2M (with end-to-end IP philosophy behind it), strengthening the standardization efforts on M2M, including sensor network integration, naming, addressing, location, QoS, security, charging, management, application, and hardware interfaces [7]. Presently, Micro-electromechanical systems (MEMS) technologies can fabricate micrometer-sized mechanical structures (suspended bridges, cantilevers, membranes, fluid channels, etc.) that are often integrated with analog and digital circuitry. MEMS can act as sensors, receiving information from their environment, or as actuators, responding to a decision from a control system to change the environment. It also reviews emerging MEMS applica-

tions, including optical filters, picoprojectors, the electronic nose, microspeakers, and ultrasound devices. 2.1.2 Communication technologies Internet Protocol is used in network technology for connecting smart objects around the world. According to the Internet Protocol for Smart Objects (IPSO) vision, the IP stack is a light protocol that already connects a huge amount of communicating devices and runs on tiny and battery operated embedded devices. This guarantees that IP has all the qualities to make IoT a reality. By reading IPSO whitepapers, it seems that through a wise IP adaptation and by incorporating IEEE 802.15.4 into the IP architecture, in the view of 6LoWPAN [8], the full deployment of the IoT paradigm will be automatically enabled. We have proved the same for smart system control platform for Ethernet enabled devices [9]. As this represents only a partial functional requirement in the IoT, similar to the role of communication technology in the Internet and equaling communication technologies such as WiFi, Bluetooth, ZigBee, I2C, CAN, 6LoWPAN, ISA 100, WirelessHart /802.15.4, 18000-7, LTE to the Internet of Things is too simplistic. The 6LoWPAN concept originated from the idea that low-power devices with limited processing capabilities should be able to participate in the Internet of Things. Wireless sensor network and MANET is capable of performing various mechanisms [10] such as self-configuration , multi hop communication , energy efficient operations, in network processing, data centric and content-based networking, exploiting location and activity pattern , positioning, scheduling, time synchronization topology control and routing. However, we can say that these technologies certainly might be part of Internet of Things. 2.1.3 Addressing and networking issues The IoT will include an incredibly high number of Nodes. Currently, the IPv4 protocol identifies each node through a 4-byte address and these addresses are depleting rapidly and will soon reach zero. IPv6 addressing has been proposed for low-power wireless communication nodes within the 6LoWPAN context. IPv6 addresses are expressed by means of 16 bytes to define 1038 addresses, which should be enough to identify any object which is worth to be addressed. IPv6 addresses are assigned to organizations in much larger blocks as compared to IPv4 address assignments—the recommended allocation is a /48 block which contains 280 addresses, being 248 or about 2.8×1014 times larger than the entire IPv4 address space of 232 addresses and about 7.2×1016 times larger than the /8 blocks of IPv4 addresses, which are the largest allocations of IPv4 addresses. The total pool, however, is sufficient for the foreseeable future, because there are 2128 or about 3.4×1038 (340 trillion trillion trillion) unique IPv6 addresses. This address space is many times that of the world population of 7 billion which will accommodate the generation of huge quantities of data over IoT, between 1.000 and 10.000 per person per day [11].

5 2.1.4 Embedded devices: RFID or wireless sensor networks (WSN), may be part of the Internet of Things, but as standalone applications (intranets) they miss the back-end information infrastructures necessary to create new services. The IoT has come to mean much more than just networked RFID systems. While RFID systems have at least certain standardized information architectures to which all the Internet community could refer, global WSN infrastructures have not yet been standardized. An IoT vision statement, which goes well beyond a mere ‗‗RFID centric‖ approach, is also proposed by the consortium CASAGRAS [12]. With regards to the RFID technology, it is currently slowed down by fragmented efforts towards standardization, which is focusing on a couple of principal areas: RFID frequency and readers-tags (tags-reader) communication protocols, data format placed on tags and labels. The major standardization bodies dealing with RFID systems are EPCglobal, ETSI, and ISO. 2.2

Internet of Things Architecture Technology

RFID-installations in production and logistics today can be considered as an Intranet of Things or Extranet of Things. Traditional communication means, such as EDIFACT (Electronic Data Interchange For Administration, Commerce and Transport ), are used to communicate with a limited number of preferred partners. These early approaches need to be extended to support open Internet architectures. Most of the RFID installations introduce a novel read-out method for a hierarchical wireless master slave RFID reader architecture of multi standard Near Field Communication (NFC) and Ultra High Frequency (UHF) technologies. This can be used to build a smart home service system those benefits in terms of cost, energy consumption and complexity [13]. There are several projects and standardization initiatives on sensor networks, which may eventually converge with the IoT. The core objective of the COBIS project was to provide the technical foundation for embedded and wireless sensor network technology in industrial environments. SENSEI creates an open, business-driven architecture that fundamentally addresses the scalability problems for a large number of globally distributed wireless sensors and actuator devices. It provides network and information management services to enable reliable and accurate contextual information retrieval and interaction with the physical environment. Likewise, other smaller research projects exist, such as GSN[14], SARIF[15], and MoCoSo, that combine concepts of object identification, sensor data and the Internet. Sensor networks can be integrated in the IoT for example, by integration with the EPCglobal Architecture Framework. Although the EPCglobal Network does not yet provide adequate support for the inclusion of sensor values in the streams of data, the Action Groups inside the GS1/EPCglobal community are actively researching issues such as ‗Active Tagging‘ and ‗Sensor and Battery Assisted Passive Tags‘. The EPC Sensor Network[16] is an effort of the Auto-ID Lab in Korea to incorporate Wireless Sensor Networks (WSN) and sensor data into the EPCglobal Network architecture

and standards. While identification, sensing and actuator integration are core functionalities in an IoT, there are further requirements such as scalability and robustness that need to be addressed.

3

Architecture ‘Kaivalyam’ for IoT using Ethernet MAC backbone

Open standards are required to use and extend its functionality. It will be a huge network, considering that every object has its virtual representation. Therefore, scalability is required. The Internet of Things will need to be flexible enough to adapt to changing requirements and technological developments. Proposed architecture (Fig. 1.) support the flexibility as one can add as many communication interfaces developing in near future. Also the protocols can be coded decoded at the Kaivalyam platform. The architecture for the sensor integration should address issue like Unique Identity, Integration of dynamic data, Support for non-IP devices, Integration of an actuator interface, Data synchronization for offline support, Optional Interface for software agents etc. Our architecture supports almost all these features except the last. The Optional interface (Fig. 2.) can be also provided using the soft-core NIOS processor System on Chip (SoC) solution by adding the respective lightweight IP protocols in the system software of the SoC[9]. We have proposed here the 4-port switch having soft-core processor for monitoring and routing the packets. The data is encoded using LDPC (Low Density Parity Check) codes which are transmitted over usually the Gaussian channel after modulation. The data transmitted is demodulated and then decoded for errors corrections, if any. 3.1

Extended MAC Network Interface Card Architecture ‘Kaivalyam’ for IoT.

Wireless sensor network solutions are based on the IEEE 802.15.4 standard, which defines the physical and MAC layers for low-power, low bit rate communications in wireless personal area networks(WPAN) [17].WSN is capable of performing various mechanisms such as self-configuration, multi-hop communication, energy efficient operations, in-network processing, data centric and content based networking, scheduling, time synchronization topology control and routing. IEEE 802.15.4 does not include specifications on the higher layers of the protocol stack, which is necessary for the seamless integration of sensor nodes into the Internet. This is a difficult task for several reasons, the most important are given below: Sensor networks may consist of a very large number of nodes. This would result in obvious problems as today there is a scarce availability of IP addresses. The largest physical layer packet in IEEE 802.15.4 has 127 bytes; the resulting maximum frame size at the media access control layer is 102 octets, which may further decrease based on the link layer security algorithm utilized. Such sizes are too small when compared to typical IP packet sizes.In many scenarios sensor nodes spend a large part of their

7 time in a sleep mode to save energy and cannot communicate during these periods. This is absolutely anomalous for IP networks. In other words, between two different objects communicating, the communication path may be broken into different sections [18-19]. And how will all these products manage to talk to each other? The 'language' will be based on a type of protocol, similar to the built-in formula that enables our mobile phones to talk using WiFi, ISA100, ZigBee or BlueTooth[20]. Hence such an intelligent, configurable network interface is an effective solution. A reconfigurable NIC (Network Interface Card) allows rapid prototyping of new system architectures for network interfaces [21]. The architectures can be verified in real environment, and potential implementation bottlenecks can be identified. Thus, what is needed is a platform, which combines the performance and efficiency of special-purpose hardware with the versatility of a programmable device. Hence we have proposed the platform which is processor-based implemented using a configurable hardware [22]. An FPGA (Field Programmable gate array) with an embedded processor is a natural fit with this requirement. Also, the reconfigurable NIC must have different memory interfaces including high capacity memory and high speed memory for adding new networking services. This is SGMII interface (Fig. 2.) to support the various speed over Ethernet and Physical media. 3.2

Scalability for nodes with ‘Kaivalyam’ packet.

The ‗Kaivalyam‘ packet is optimized for the smaller size of 256- bits due to limited resources on node. The design is such that the 128-bits of IPv6 address are allocated for Things unique universal address. It is desirable to program the node for smart features which could be exercise through proper control register. The status of the Thing could be read through the status register for sleeping, hibernation etc. for energy minimization of node. Here small overhead of 16-bit is kept for the parity information with proper hamming distance windows for data error checking. The remaining 96-bits corresponding to 12-bits of data payloads are kept for the node. Such small size packets are very much possible on MtM sensors nodes. The unique universal ID‘s, data, status and parity information of the node transmitted over like RFID, , CAN, SPI, Zigbee, Bluetooth, WiFi, Wireless etc.; could be extracted over front-end interfaces during the segregation with help of configurable computing node having integrated N x 4 switch. Thus one can generate the 256-bits of ‗Kaivalyam‘ packets as shown in Figure 3. Data-synchronization for offline support feature can be program in the soft-core processor (NIOS) built on SoC using FPGAs to store the data of the devices over banks in the limited Flash memory ( or may be over SAN‘s) in the offline mode and the same data can be transmitted during active mode. Also the optional integration of software agents feature can be programmed in the scenarios like complex global supply networks requiring more decentralized and automated decision making. Software-agents have been researched broadly.

The Figure 4, shows a simplified high-level block diagram of the Triple Speed Ethernet (TSE) design [23]. The design integrates two Altera TSE MegaCore functions (MAC + PCS + PMA). The design uses the Stratix II GX PCI Express Development Kit as a hardware platform, which includes two SFP (Small Form Pluggable) cages. This design interfaces the TSE MegaCore function with a Copper or Optical Fibre SFP module via a 1.25 Gbps serial transceiver that enables all 10, 100, and 1000 Mbps Ethernet operations. The design sends stream of Ethernet packets to the TSE MegaCore function. The TSE MegaCore function [24] in turn sends out those packets to the SFP modules (which serve the purpose of SGMII interface) connected to physical media here a optical fiber where the Ethernet packets are looped back externally via SFP modules with an Ethernet cable assembly or through an Ethernet switch. The design can demonstrate the operation of the TSE MegaCore function in various modes with live traffic upto the maximum throughput rate and show the error rate in the receiver, if any. Front-end For Data Acquisition System for RFID,CAN, SPI, Wireless, Zigbee, Bluetooth, WiFi nodes of Things.

Computing node for segregating front-end data packets over protocols to ‗Kaivalyam‘ packet

LDPC encoding

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BER Calculation Calculation ER Calculation Front-end For Data Acquisition System for RFID, CAN, SPI, Wireless, Zigbee, Bluetooth, WiFi nodes of Things.

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Computing node for segregating front-end data packets over protocols to ‗Kaivalyam‘ packet

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Fig. 1. The system details of the ‗Kaivalyam‘ Architecture of IoT.

decod-

9 3.3

LDPC Codes for Reliability of the Data.

An LDPC (Low Density Parity Check) code is a linear block code characterized by a very sparse parity-check matrix. This means that the parity check matrix has a very low concentration of 1‘s in it, hence the name ―low-density parity-check‖ code. The sparseness of LDPC codes is what has interested researchers, as it can lead to excellent performance in terms of bit error rates.

Computing Node with N x 4 switch

Ethernet Packet generator & monitor

Standard Gigabit Media Independent Interface (SGMII/RGMII) to

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Media

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Fig. 2. Computing node for segregating data packets over protocols. Table 1. Protocols of popular physical communication interfaces exploited by communicationenabled objects.

Physical Communication interface type Zigbee,Bluetooth, RFID,etc. WiFi UWB Sensor network busses (CAN, Profibus) Serial USB

Communication type Wireless Wireless Wireless Fixed

DeviceNet

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Power line (KNX, LonWorks)

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Fig. 3. 256-bits of ‗Kaivalyam‘ packet datagram details for ‗Thing‘ on IoT. 128-bit address parity of things(IPv6)

96-bits data

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TSE - A NIOS Soft-core processor as computing node

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Fig. 4. Simplified block diagram of Triple Speed Ethernet (TSE) reference design.

LDPC Codes are characterized by the sparseness of ones in the parity-check matrix. This low number of one‘s allows for a large minimum distance of the code, resulting in improved performance. Although proposed in the early 1960‘s by Gallager, it has not been since recently that codes have emerged as a promising area of research in achieving channel capacity. This is part due to the large amount of processing power required to simulate the code. In the case of any coding scheme larger block length codes provide better performance, but require more computing power. Performance of a code is measured through its bit error rate (BER) vs. signal to noise ratio Eb/No in dB. The curve of a good code will show a dramatic drop in BER as SNR improves. The best codes have a cliff drop at an SNR slightly higher than the Shannon‘s limit (0.18dB).In addition to presenting his seminal work in 1960, Gallager also provided a

11 decoding algorithm that is effectively optimal. The algorithm iteratively computes the distributions of variables in graph-based models and comes under different names, such as ‗Message Passing Algorithm‖, ―Sum-Product Algorithm (SPA)‖ or ―belief propagation Algorithm‖. SPA-Logdomain and SPA-Min Sum Algorithm are the simplified algorithms and easy to implement in an embedded environment[25] .

4

Results and Discussion

We have conceptualized the computing node using the NIOS-II soft-core processor as a processing element having 8-bit interface with 4x4 I/O switch (Figure 2). The design is implemented with ALTERA Inc. Quartus-II software (Ver. 8.0). The computing node is a switch embedded with soft-core IP NIOS-II processor having processing capabilities. Presently the features of generating and receiving ATM packets programs are tested on the NIOS IDE of Quartus-II environment. Table 2: Details of Input packets

Input data byte stream 1st 2nd 3rd byte byte byte 72 75 6C A9 A5 BE DF EB 9E 15 10 20

4th byte 95 DC 02 48

5th byte

6-53 bytes

76 AD E3 1A

11 22 33 44

Table 3.: Details of Output packets

Output data byte stream 1st 2nd 3rd byte byte byte 72 72 72 A9 A9 A9 DF DF DF 15 15 15

4th byte 72 A9 DF 15

5th byte

6-53 bytes

72 A9 DF 15

72 A9 DF 15

Functional simulations were performed using QUARTUS II software. Here the computing node use the router static look-up table Virtual Channel Identifier (VCI) information obtained for the shortest path optimization computation. This VCI information can be altered for the Nx4 switch in the proposed ‗Kaivalyam‘ Architecture to route the Kaivalyam packets on to duplex mode Ethernet Packets Generator and Monitor for transmission over Ethernet backbone. Hence , depending on the look-up table information the packets VCI information is altered for the specific route. The functional simulation results are demonstrated in the input ‗Table 2‘ and output ‗Table 3‘ for routing of the packets over 4x4 I/O port switch. The scheduler circuit in the switch schedules the packets available in the ‗VOQ_input_x‘to the appropriate output

through crossbar fabric(Voq_fabric). The scheduling of the packets is implemented using combination of priority based round robin diagonal propagation over the five I/P ports and four O/P ports of the computing node design. Diagonal propagation has advantage of dependencies over crossover fabric.

Fig. 5. Computing Node embedded with 4x4 I/O switch.

Simulation studies were performed (using MATLAB Simulink) for block length 512 bits, which is the minimum Ethernet frame length of 64 bytes. AWGN(Additive White Gaussian Noise) is introduced in the channel and BER(Bit Error Rate) is computed for different SNR(Signal to Noise Ratio). The SNR is increased from 1dB to 6dB. Figures 6(a) to 6(f) indicate that a BER of 10 -4 to 10-5 can be achieved for SNR of 2.5 dB. Also increasing the number of iterations decreases the BER. However for considerable improvement in BER, you need to increase the block length. Also SPALogdomain Algorithm is showing better performance than SPA-Min Sum Algorithm. LDPC can be used for LANs since the normal noise level involved in optic fiber cables would range from 3 to 4 dB. Concept that IoT has primarily to be focused on the ‗‗Things‖ and that the road to its full deployment has to start from the augmentation in the Things‘ intelligence. This is possible through proposed ‗Kaivalyam‘ packets which is in line of ‗spime‘. The spime are defined as object that can be tracked through space and time throughout its lifetime and that will be sustainable, enhanceable, and uniquely identifiable [26]. Although quite theoretical, the spime definition finds some real-world implementations in so called Smart Items. These are a sort of sensors not only equipped with usual wireless communication, memory, and elaboration capabilities, but also with new potentials.

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Fig. 6. BER vs SNR for 512 bytes block size for 100 frame over 1 to 30 iteration with logdoman(a-c) and logdomainSimple(d-f) algorithms.

Inputs are particularly expected from the Machine-to-Machine Workgroup of the European Telecommunications Standards Institute (ETSI) and from some Internet Engineering Task Force (IETF) Working Groups. 6LoWPAN [27], aiming at making the IPv6 protocol compatible with low capacity devices, and ROLL [28], more inter-

ested in the routing issue for Internet of the Future scenarios, are the best candidates. The multi sensor fusion algorithms like estimation (Non recursive, Recursive) classification (parametric, cluster, K-means), inference (Baysian, Dempster-shafer) and ANN (Expert, Adaptive, Fuzzy) methods [29] integrated in the MtM could give diver scope and potential application in the areas of co-operative, community sensing applications for IoT in areas of self-assembly and self-organization system. IEEE 802.11 is a set of media access control (MAC) and physical layer (PHY) specifications for implementing wireless local area network (WLAN) computer communication in the 2.4, 3.6, 5 and 60 GHz frequency bands. The IEEE 802.11 can be extended for higher data rates with the multiple-antenna also known as spatial multiplexing with multiple input multiple-output (MIMO) system design, wherein data for transmission is divided into independent data streams to be transmitted through multiple antennas. In a multi-antenna system the adjacent antennas must be separated by a minimum distance, around half a wavelength (27 mm for 802.11ac), to reduce the coupling between antennas as well as correlation between streams. For applications where size matters, this requirement limits the number of antennas and consequently the number of streams and maximum bit rate. At 60 GHz the carrier wavelength is only 5 mm, so relatively high gain antennas can be implemented in a small package with MtM technology in place. For example, a 13 dB patch array antenna printed on Duroid substrate (r = 2.2) occupies an area of 5 mm × 6 mm [30]. On web front, we moved from www (static pages web) to web2 (social networking web) to web3 (ubiquitous computing web), the need for data-on-demand using sophisticated intuitive queries increases significantly. Another interesting paradigm which is emerging in the Internet of the Future context is the so called Web Squared, which is an evolution of the Web 2.0. It is aimed at integrating web and sensing technologies [31] together so as to enrich the content provided to users. Presently, this is obtained by taking into account the information about the user context collected by the sensors (microphone, cameras, GPS, etc.) deployed in the user terminals. Such Web Squared could be enhances for functionalities using more nodes for better virtualization applications running over the IoT. Anyway, proprietary industrial approaches ignoring international standardization approaches as well as political discussion will try to set their own de-facto-standards. A recent malware attack (Stuxnet), aiming to spy on and reprogram Supervisory Control And Data Acquisition (SCADA) systems, has revealed once more the need for security in a future IoT. The Internet has been misused to manipulate the virtual world, such as stock markets; and hence IoT will have direct implications on the physical world. Measures ensuring the architecture‘s resilience to attacks, data authentication, access control and client privacy need to be established[32]. Nevertheless, there are also certain threats and issues of governance, security, and privacy that need to be considered. Open governance in an IoT remains an important issue. However, it may be assumed that the ongoing discussions between different regions and countries will lead to a federated structure in the longer term, similar to the domain structures we know from the Internet today. Among the possible applica-

15 tions, we may distinguish between those either directly applicable or closer to our current living habitudes and those futuristic, which we can only fancy of at the moment, since the technologies and/or our societies are not ready for their deployment.

Acknowledgment Authors would like to acknowledge financial assistance from University Grant Commission (UGC, New Delhi) and ALTERA Inc.USA for the support under University Program.

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U. V. Rane, M.Sc. ;Associate Professor, Dept. of Computer Science, D.M.‘s College of Arts, Science and commerce, Assagoa,Bardez, Goa, India. Completed M.Sc. in Electronics from Goa university. He has 14 years of teaching experience. He is a co-ordinator for BCA course He is a

17 Research student in the Department of Electronics ,Goa University, Goa, India. His current research interest includes Computer Networks and embedded system

V. R. Gad, M.Sc., M.Phil. Ph. D.; Head, Dept. of Computer Science, G. V. M.‘s G. G. P. R. College of Com. & Eco, Ponda, Goa, India. Completed M.Sc. in Electronics from Goa University in 1994 and 1996 respectively and obtained M.Phil. in Electronics from Bharathidasan University, Tiruchirapalli in 2008. She has 14 years of teaching experience. She has worked on the University Grants Commission Minor Research Project ―Design and Development of Computerised ID Card System‖. She is a Research student in the Department of Electronics, Goa University, Goa, India. Her current research interest includes Computer Networks, Error Control Coding and embedded system Dr. R. S. Gad, M.Sc., Ph.D.; Associate Professor,Dept.of Electronics, Goa University, Goa, India. Associated with ALTERA Inc. USA under the MOU with ALTERA University program. Attended summer training at CEDT IISc, Bangalore for two months from April 27, 1998. Dr. Gad, was a winner in Mentor Graphics Design contest ‗ Design and verification of LC3 processor‘ for year 2010 in India. He is also recipient of the Indian National Science Academy Fellowship for the year 2012-13. Prof. G. M. Naik , M.Sc., Ph.D.; Professor & Head, Dept. of Electronics, Goa University, Goa, India. Prof. Gourish Naik obtained his Ph.D ( Physics) from Indian Institute of Science, Bangalore (1987) and served the institute as research associate in the areas Communication till 1993. Has co- authored two books on Embedded Systems and Programming published by Springer (Holland). Books: 1)J. S. Parab, G. M. Naik et al ; ―Exploring C For Microcontrollers: A Hands On Approach‖ Publisher: Springer Verlag, 2008.2) J. S. Parab, G. M. Naik et al ; ―Practical Aspects Of Embedded System Design Using Microcontrollers‖ Publisher: Springer Verlag, 2008.