Energies 2015, 8, 338-355; doi:10.3390/en8010338 OPEN ACCESS
energies SSN 1996-1073 www.mdpi.com/journal/energies I
Article
Simulation of Standby Efficiency Improvement for a Line Level Control Resonant Converter Based on Solar Power Systems Ming-Tse Kuo * and Ming-Chang Tsou Department of Electrical Engineering, National Taiwan University of Science and Technology, No. 43, Section 4, Keelung Road, Da’an District, Taipei 106, Taiwan; E-Mail:
[email protected] * Author to whom correspondence should be addressed; E-Mail:
[email protected]; Tel.: +886-2-2730-3288; Fax: +886-2-2737-6699. Academic Editor: Andrés G. Muñoz Received: 13 September 2014 / Accepted: 22 December 2014 / Published: 5 January 2015
Abstract: This paper proposes a new scheme to improve the standby efficiency of the high-power half-bridge line level control (LLC) resonant converter. This new circuit is applicable to improving the efficiency of the renewable energy generation system in distributed power systems. The main purpose is to achieve high-efficiency solar and wind power and stable output under different load conditions. In comparison with the traditional one, this novel method can improve standby efficiency at standby. The system characteristics of this proposed method have been analyzed through detailed simulations, which prove its feasibility. Keywords: line level control (LLC) resonant converter; holdup time; standby efficiency; distributed generation (DG)
1. Introduction In most countries, the traditional power-supply system is dominated by large power generators that deliver electricity to each client through the power grid. However, energy supply sources should not rely merely on fuel because of the increasing energy crisis. If a portion of a household’s electricity is supplied by way of renewable energy, shortfalls can be covered by electricity companies; when there is surplus renewable energy, it can be fed back into the power grid, adding to the energy supply. Additionally, if most of the households are equipped with recovery apparatus for renewable energy to
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reduce power consumption, the power company can also minimize the amount of fossil fuel required to satisfy the load capacity and thereby control environmental pollution. Small distributed generation (DG) systems can generally be categorized into three types, as shown in Figure 1. The first type is the grid-connection system [1]. The power provided by solar power modules is delivered to the load, and excess electricity can be fed into power grid; when the locally provided power is insufficient, the power grid compensates for the inadequacy. The second type is the stand-alone system [2]. Grid Solar or wind power is often treated as renewable energy resource.SW For example, solar power can PV Converter Inverter charge batteries for contingent use withSystem excess energy; when the electricity from solar power cannot Modules SW PV power insufficiency. Converter meet the immediate power demand, batteries back up the Third, there is the Inverter Modules System hybrid system that combines these two types [3,4]. When the power grid is normal, it functions as a Load grid-connection system; when there is(a)some interference with the power grid, it becomes a Grid-connection system Load stand-alone system. (a) Grid-connection system PV Modules
Converter System
PV Modules Inverter
Converter SW System Grid
Load (a) Grid-connection system
(a)
PV Modules
Converter WTG、DGSystem
PV Modules
(b) Stand-alone system WTG、DG
Converter System
Battery
(b) Stand-alone system SW
Converter Load System
Load
Battery
Inverter
Battery
(b) Stand-alone (b)system
Converter System
WTG、DG
PV Modules
Battery
Load
PV Modules
SW
Grid
Inverter
Load
Load
Battery (c) Hybrid system
(c) Hybrid (c) system SW Grid
Converter
Figure 1. Classification ofInverter small generation systems with renewable energy: System (a) grid-connection system; (b) stand-alone system; and (c) hybrid system. PV: photovoltaic; PV WTG: wind turbine generator; DG: distributed generation; and SW: switch. Load
Modules
Grid
Battery
The development of distributed power systems and renewable energy generation makes power (c) Hybrid system converters an important interface [5]. Taking an independent wind power generation system (Figure 2) as an example, wind turbines generate AC input which is rectified into DC for a line level control (LLC) converter system. Then it supplies energy to load demand and charge batteries. Although LLC converters have high conversion efficiency under heavy load condition, the large switching loss of LLC converters still results in poor standby power loss; even more, it might consume stored power from batteries in a distributed system [6,7]. The aforementioned conversion systems are adapted for renewable energy power converters, and the limitations of those prior studies are as follows: (1) renewable energy is obtained from natural environment sources, but surely they do not provide a stable energy supply, whereas these prior methods are designed based on situations in which renewable energy can stably carry out its tasks; and (2) LLC converters have issues of standby energy loss, which must be minimized to avoid unnecessary influence on battery energy.
Grid
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Battery z
LLC Converter
PMG
Load
Figure 2. Stand-alone distributed wind power generation system. PMG: permanent magnet generator; and LLC: line level control. Among several converter types, the LLC converter is the most popular one because it features a wide input range, high conversion efficiency, and high power density, it has been widely applied as a DC/DC power converter [8–10]. For common applications, LLC converters feature high full-load efficiency but provide poor system efficiency during standby because of their large switching losses. They are also compatible with daily-increasing stringent energy regulations and provide fabulous standby efficiency [11–14]. The novel idea of controlling an LLC converter proposed in this paper can reduce the switching losses during standby and allow a wider input range. Under situations with an unstable input source, it can maintain a relatively long period of normal output. The following sections discuss the features and operation principles of this proposed control scheme. 2. Conventional Schemes The circuit of a typical LLC resonant converter is shown in Figure 3. Its control circuit contains a voltage detector, voltage control oscillator (VCO), and dead-time generator. During this control flow, the partial voltage on the output side receives a voltage feedback signal from the voltage detector. It is then transmitted to the VCO to generate a switching frequency corresponding to the voltage feedback signal, and the dead-time generator generates the dead-time interval to send the switching frequency signal to the power switches. When the output partial voltage is greater than the reference voltage, the voltage detector outputs a relatively high output signal to VCO to push it to generate a correspondingly higher switching frequency; on the other hand, when the divided voltage is smaller than the reference voltage, the voltage detector delivers a relatively low output signal to VCO generating a lower switching frequency. The influence of the switching frequency during standby is highly significant, and therefore how to deal with it in an appropriate control scheme becomes an indispensable need. To facilitate the analysis, we can transform an LLC resonant converter into a primary-side equivalent model. As shown in Figure 4, from this equivalent model, the transfer function is derived as shown in Equation (1): 1
𝐺(ω) = ||
1 ω2r1 ( 𝑘 ω2r2
−
ω2r1 ) ω2s
||
ω ω + 𝑗𝑄r ( s − r1 ) ωr1 ωs
(1)
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𝐿
where 𝑄r =
√𝐶r
r
𝑅o
is the Q-factor, 𝑘 =
inductance, ωr1 =
1 √𝐿r 𝐶r
𝐿m
is the ratio between magnetizing inductance and leakage
𝐿r
is the first resonance frequency, and ωr2 =
1 √(𝐿r + 𝐿m )𝐶r
is the second
resonance frequency. D
3
Q
1
D C 1
a
V
i
i
L
r
r
cos s 1
i
C
D3
p
R
L
o
V
o
i
DC
m
Q
L
v
2
m
D
Cr
b
D C 2
Dead-time Generator
C
cos s 2
4
i
n :1:1
r
D4
Voltage Detector
VCO
Figure 3. Schematic of LLC resonant converter with basic functional blocks. VCO: voltage control oscillator. Lr
Vin
Ro
Lm
Cr
Figure 4. Primary-side equivalent model of LLC resonant converter. Equation (1) is plotted as the characteristic curve of voltage gain relative to frequency, as shown in Figure 5. By means of two resonant frequencies of ωr1 and ωr2, it can designate three regions: (1) Region 1 is the zero voltage switching (ZVS) region in the right half-plane of ωr1; (2) Region 2 is the ZVS region between ωr1 and ωr2; and (3) Region 3 is the zero current switching (ZCS) region in the left half-plane of ωr2. fr 2 / fr
f r1 / f r
Region 2 ZVS
Region 1 ZVS
n pVo nsVin Q0
Region 3 ZCS
Q 1.5
Figure 5. Characteristic curves of voltage gain of LLC resonant converter with respect to frequency.
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Metal-oxide-semiconductor field-effect transistor (MOSFET) operation performs relatively well in ZVS mode, and therefore LLC resonant converters mostly work in Regions 1 and 2. 2.1. Operation of the Line Level Control Resonant Converter in Region 1 (Zero Voltage Switching) The waveform when switching frequency is located at Region 1, as shown in Figure 6. In this region, the magnetizing inductance Lm is clamped by the output voltage, and the entire duty cycle Lm is not included in the resonance. Therefore, the operation mode at this condition acts similar to SRC with ZVS characteristics.
VGS1
VGS 2
VDS1 VDS 2
Ir Im
VCr I D1 I D2
t0
t1 t2 t3
t4 t5 t6
Figure 6. Schematic diagram of LLC resonant converter operated in Region 1 (zero voltage switching, ZVS). 2.2. Operation of the Line Level Control Resonant Converter in Region 2 (Zero Voltage Switching) When the switching frequency is located in Region 2, the waveform is shown in Figure 7. The resonance in this region is divided into two stages. In the first stage t0–t3, the magnetizing inductance Lm is clamped by the output voltage, with Lm non-inclusive in resonance, and the resonant inductance Lr resonates with capacitor Cr; in the second stage t3–t4, when the resonant current ir is equal to the side magnetizing inductance current iLm, there is no current flowing into transformer, and the secondary side of the converter is tantamount to an open circuit when the magnetizing inductance Lm will resonate with the resonant inductance Lr and the resonant capacitor Cr. Because Region 2 has two resonance frequencies, it is a multi-resonant converter. The control mode of typical LLC converters is that the output voltage provides feedback to VCO to adjust output power by changing the switching frequency. However, shortcoming of LLC converters is the inferior standby efficiency and relatively high output voltage during no-load. Thus, it causes
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no-load switching frequency increases to two to four times than full-load switching frequency, and results in double switching loss.
VGS1
VGS 2
VDS1 VDS 2
Ir Im
VCr I D1 I D2
t0 t1
t2
t3 t4 t5 t6
t7
t8 t9 t10
Figure 7. Schematic diagram of LLC resonant converter operated in the mode of Region 2 (ZVS). To solve the issue of high switching frequency and low efficiency of LLC resonant converters operated at standby, a large number of studies have focused on how to improve standby efficiency, such as burst mode, output saturation inductance, and dummy load regulation. The mostly common approach is burst mode control. When entering burst mode, it blocks the originalV high-frequency switching signal by the control circuit, causing episodic high-frequency switching frequency and reducing unnecessary switching loss. Figure 8 shows the burst mode schematics. GS
(a) Normal mode
t
Vo
VGS VGS
(a) Normal mode
t
Vo (b) Burst mode
t
Figure 8. Diagram of burst mode: (a) normal mode; and (b) burst mode. VGS
The typical control block diagram is shown in Figure 9, and the output signal of VCO sent to logic circuits determines time interval for the switchingt signal needing masked. However, the drawback is (b) Burst mode that ripples grow relatively large, and prone to generating audio noise.
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VGS 2 Control Circuit
MOSFET Driver
VCO
Dead time Generator
Logic Control
VSENSE Output Voltage Feedback Error Amplifier
Figure 9. Block diagram of typical control circuit with burst mode. MOSFET: metal-oxide-semiconductor field-effect transistor. In the next section, SIMPLIS simulation supports establishing behaviors of a typical LLC circuit. For the purpose of making simulation results match the real circuit, the simulated system needs to take parasitic devices into consideration, which probably affects the resonant frequency and voltage gain, and parasitic capacitance especially affects the operating frequency. To simplify the analysis and make simulation converged easily, the revised paper moves all secondary parasitic capacitance to primary side and merges overall parasitic capacitance as equivalent parallel capacitance CP [11].
VGS_1
5
0 10
VGS_2
5
0 300
VDS_1
200 100 0 300
VDS_2
200 100 0 4
Ir&Im
2 0 -2 -4 4 2
Ip
0 -2
-400
-0.1
VCr
50
IDo1 / A
16
IDo1
8
IDo2 / A
0 16
IDo2
8
0
86.428
86.43
86.432
86.434
86.436
(a)
86.438
86.44
86.442
VCr / V
250
IDo2 / mA IDo1 / mA
VCr / V
-4 350
150
10
Ir&Im / mA VDS_2 / V VDS_1 / V VGS_2 / V VGS_1 / V
10
Ip / mA
Ip / A
Ir&Im / A
VDS_2 / V VDS_1 / V VGS_2 / V VGS_1 / V
Simulation condition 1: Figure 10 shows simulated waveforms of a typical LLC circuit under 480 W/48 V, which adopts VCO to adjust the power. Therefore, the switching frequency varies with load. VGS_1
5
0 10
VGS_2
5
0 300
VDS_1
200 100 0 300
VDS_2
200 100 0 400
Ir&Im
0
0.1
Ip
0
194
VCr
190 186
0.1
IDo1
0 -0.1
0.1
IDo2
0 -0.1 18.245
18.25
18.255
Time/ms
18.26
18.265
Time/ms
(b)
Figure 10. Simulation waveforms for typical LLC circuit at 480 W/48 V: (a) 100% load; and (b) 0% load.
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10
VGS_1
5
0 10
VGS_2
5
0 300
VDS_1
200 100 0 300
VDS_2
200 100 0 8 4
Ir&Im
0 -4 -8
Ir&Im / A VDS_2 / V VDS_1 / V VGS_2 / V VGS_1 / V
Ir&Im / A VDS_2 / V VDS_1 / V VGS_2 / V VGS_1 / V
Simulation condition 2: to observe differences between middle and high power, typical LLC circuit for 1200 W/48 V plays the role of comparable prototype. Figure 11 shows simulations waveform of 1200 W/48 V.
0 10
VGS_2
5
0 300
VDS_1
200 100 0 300
VDS_2
200 100 0 1.5
Ir&Im
0.5 0 -0.5
Ip
0 -4
Ip / A
0.5
4
-0.5
500
230
300
VCr
100 0 -100
Ip
0
-8
VCr / V
Ip / A
VGS_1
5
-1.5
8
VCr / V
10
200
VCr
180 150
IDo1
20 10 0 40
2
IDo1
1 0
30
IDo2
20 10 0
IDo1 / A
30
IDo2 / A
IDo2 / A
IDo1 / A
40
1.5
IDo2
1 0.5 0
99.054
99.056
99.058
99.06
99.062
99.064
99.646
99.648
99.65
99.652
99.654
Time/ms
(a)
99.656
99.658
99.66
Time/ms
(b)
Figure 11. Simulation waveforms for a typical LLC circuit at 1200 W/48 V: (a) 100% load; and (b) 0% load. This section describes the operation principles of typical LLC circuits and provides some analysis for different loads. It shows that switching frequency at standby is approximately twice than full-load switching frequency. 3. Novel Line Level Control Circuit To solve problems of high switching loss upon standby, a novel LLC control circuit is proposed as shown in Figure 12. When the proposed circuit operates in full-load, the power switch Q3 of the auxiliary control circuit can be synchronously conducted with the frequency of the primary oscillator and stops as it reaches the condition of the feedback signal of output voltage, which causes the auxiliary switch Q3 operating with the synchronized pulse-width-modulation (PWM) mode. If the load declines, the duty cycle of the auxiliary switch also decreases; when operated in no-load situations, the duty cycle of the auxiliary switch Q3 is equal to 0, and makes Q3 closed. Figure 13 plots main waveforms when the new LLC control circuit operates in full-load situations, which can be divided into four working states.
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D
9
C
1
cos s 1
V
D
n :1:1
L
in
r
1
D
D
5
C
3
O
O
L
Q
m
2
D
D
2
4
D C 8
cos s 2
C
D
r
D
7
Q
6
3
Dead-time Generator
V
C
cos s 3
TS
CG
Oscillator
Auxiliary Control Circuit
CS
Voltage Detector Circuit
FB
Figure 12. Structural diagram of a novel LLC control circuit.
VGS 1
VGS 2 VDS 1 VDS 2
VGS 3 iDS 3 ir im ip
vCr
t0 t1 t2
t3
t4
Figure 13. Main waveforms of novel LLC control circuit. 3.1. Working State 1 (t0 ≤ t ≤ t1) In Working State 1, shown in Figure 14, the upper-bridge switch parasitic capacitor Ccoss1 has been discharged to zero, whereas the voltage of the lower-bridge parasitic capacitor Ccoss2, VDS2, has been charged from 0 to Vin. The upper-bridge parasitic diode D9 is conducted, reaching the condition for the ZVS of the upper-bridge switch Q1. The auxiliary switch Q3 is synchronously conducted along with the state transfer of VDS2. At this time, the circuit is operated in the current enhancement mode, and the secondary converter is shorted out by auxiliary switch Q3. No energy is delivered to the load end, and the energy for the load is provided by the output capacitor Co. Because the secondary converter is
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shorted out, the voltage over the two ends of the magnetizing inductance Lm is clamped at zero, and the magnetizing current im is maintained at im(t0) without changing. The voltage across the resonant inductance Lr also increases due to the secondary short circuit when only the resonant inductance Lr and resonant capacitor Cr participate in resonance. However, due to the secondary short circuit, the resonant circuit ir(t) is forced to undergo a relatively rapid linear increase. At t = t1, the upper-bridge switch Q1 is conducted to complete the zero-voltage switching. At this instant, the resonant current ir(t) increases to zero, and this mode ends. D
Q
9
C
1
V
cos s 1
i L
in
r
D
n :1:1
r
1
D
i
C
3
O
V
O
m
Q
i
L
2
m
p
D
D
2
4
D C 8
C
cos s 2
r
i
DS 3
Q
3
C
cos s 3
D
7
Figure 14. Working State 1 of novel LLC control circuit. 3.2. Working State 2 (t1 ≤ t ≤ t2) In this working state, the two ends of magnetizing inductance Lm are still clamped at zero by the secondary short circuit, and the magnetizing current im is maintained at im(t0) without changing; at this time, only the resonant inductance Lr and resonant capacitance Cr participate in the resonance, whereas the resonant current ir continues to undergo a rapid linear increase. The state of the circuit is shown in Figure 15. At t = t2, the auxiliary circuit stops the auxiliary switch Q3, and this mode ends. Q
D
9
C
1
V
cos s 1
i L
in
r
n :1:1
r
i
i
m
Q
L
2
m
8
cos s 2
C
1
D
C
3
O
V
O
p
D
4
D C
D
i
D
2
DS 3
r
Q
3
C
cos s 3
D
7
Figure 15. Working State 2 of novel LLC control circuit.
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3.3. Working State 3 (t2 ≤ t ≤ t3) In Working State 3, shown in Figure 16, the two ends of the magnetizing inductance Lm are clamped at nVo by the output voltage, and therefore, the magnetizing current im continues to increase linearly; only the resonant inductance Lr and the resonant capacitor Cr still participate in the resonance, but the resonant current ir restores to increase as a sinusoidal waveform. When t = t3, the resonant current ir is equal to the magnetizing current im. The current through the output rectifier diode D1, iD1, resonates to zero and stops, completing ZCS, and this mode is over. Q
D
9
C
1
V
cos s 1
i L
in
r
r
i
i
m
Q
D1
D
1
D
C
3
O
m
8
C
cos s 2
O
D
D
2
4
D C
V
p
L
2
i
n :1:1
r
Q
3
C
cos s 3
D
7
Figure 16. Working State 3 of novel LLC control circuit. 3.4. Working State 4 (t3 ≤ t ≤ t4) In Working State 4 in Figure 17, because the output rectifier diode is turned off, the power on the input end cannot be delivered to the secondary load, and the converter is in the decoupled state. At this time, the resonant inductance Lr and resonant capacitance Cr resonate with the magnetizing inductance Lm; because the magnetizing inductance Lm is much larger than the resonant inductance Lr, the resonance frequency decreases, and the resonant current waveforms ir becomes relatively flat. Because the resonant current through the resonant inductance Lr, ir, is continuous, the resonant current ir continues to charge the resonant capacitor Cr. At t = t4, upper-bridge switch Q1 turns off, and this state ends. Q
D
9
C
1
V
cos s 1
i L
in
r
i
i
m
Q
L
2
D
n :1:1
r
m
1
D
C
3
O
D
8
cos s 2
C
r
O
D
2
4
D C
V
p
Q
3
C
cos s 3
D
7
Figure 17. Working State 4 of novel LLC control circuit.
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Now that operation principles is clarified, first presume that input voltage Vo and output voltage Vo are both constant in one switching period. Furthermore, to simplify analysis, assume that the magnetizing inductance Lm is very large, and therefore magnetizing current im is zero. It can be derived that the equation for voltage gain is given by Equation (2):
𝑛𝑉o = 𝑉in 2
𝑇s 𝑇 2 𝐷𝑇 𝑇 + √( s ) + 4 [1 − cos2 (ωr1 s )] s 𝐶r 𝑅ac 𝐶r 𝑅ac 2 𝐶r 𝑅ac 2𝑛 [1 + cos (ωr1
𝐷𝑇s 𝑇 )] s 2 𝐶r 𝑅ac
(2)
nVo Normalized Gain： Vin 2
Voltage gain curves are plotted based on above equations, as shown in Figure 18. It indicates the auxiliary switch Q3 plays a role in increasing resonant current ir. Along with the duty cycle D of auxiliary switch Q3 increasing, higher voltage gains can be obtained. Gain characteristic at resonant frequency 100% Load 75% Load 50% Load 25% Load 1% Load
Duty cycle of Q3
Figure 18. Characteristic plots of system gain that changes with load. From the perspective of the resonant tank, Figure 19 shows the characteristic relationship curve between resonant tank parameters and system gain with fixed magnetizing inductance. Moreover, it also indicates the lower resonant inductance Lr induces the higher system gain during the same operation period D. It means that the lower design resonant inductance Lr adopts, the higher current gain the system gets.
nVo Normalized Gain： Vin 2
Gain characteristic according to resonant tanks
Lr:66uH Cr:40nF Lr:40uH Cr:63.33nF Lr:30uH Cr:84.43nF Lr:20uH Cr:126.7nF Lr:10uH Cr:253.3nF Duty cycle of Q3
Figure 19. Characteristic plots of system gain changing with resonant tank.
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By means of the auxiliary control circuit shown in Figure 20, the above functions are achieved, and the auxiliary control circuit also has the function of sequential detection and voltage detection. Buffer TS
Gate Driver
SR Flip-Flop
VA
VB
S
VC
Q
VD Di
R
CG CS
R1 R2 VE
VG
Ct Comparator
VF FB
Figure 20. Block diagram of auxiliary control circuit. Figure 21 shows waveforms of the auxiliary control circuit. VA Vth VB
VD VC VF VE
VG
Figure 21. Principle waveforms of auxiliary control circuit. The next section will report simulation results and analysis for novel LLC control circuits. 4. Simulation Results and Analysis Based on the theoretical analysis above, feasibility of the method proposed in this paper can be verified with the help of SIMPLIS simulation, and the performances acquired by simulation obviously demonstrates it getting overwhelming superior positions in comparison of conventional type circuit:
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(1) The simulated circuit and function block diagram are built and behaves following proposed operation principles truly, as shown in Figure 22. Iin
LLC Series Resonant Topology
HG
VDS
IC = 1
S 7
R 3
_1
C 12 100 p
IQH 380 V 1
R 12
R 14
Ir
IDo 1 &
L1
ILm
Ip
IQL
IC = 1
VDS IC = 1
S 2
R 7
S 1
C 6
_2 VCr
C 13
R 4
R 21
TX 1
P 1
LG
Vo
R 8
R 11
C 13
L2
IDo 2
IC = 1
IC = 1
100 p
C 5 S 2 R 2
IC = 1
U 24
U 12 S
Q
Czero
QN
IC = 1
IC = 1
R 13
R 23
Auxiliary Control Circuit
U 31 S
R
U 32 A B
U 27
Vth
U 23 U 28
U 4 FB
U 30
U 37
IQ 3
V 5
Q
R
QN
VDS
U 3
U 25
S
D
SIC 3= 1
C
_3
C 16
R 31
U 35 IC = 1
R1
Voltage Detector
U 36 E
F
Czero
Ct
V 7
V 11 U 29
R 5
FB R 10 R 17
Dead time Generator
F1
TL 431
X 1
C 1
R 9 R 18
FREQ 0 = 100 k
U 2
U 15 HG
VGS
U 1
_1
RAMP
VCO _ BB VFREQ
CLK
OFF
U 19
U 18
RTN
U 17
Rdead
U 16
U 14 LG
VGS
_2
U 21 V 8 C 11
V freq
U 20
Figure 22. Novel LLC simulation circuit.
Fixed Frequency Oscillator
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Simulation condition 3 (novel LLC control circuit): Pomax = 480 W, Vo = 48 V, Lm = 264 μH, Lr = 30 μH, Cr = 100 nF, and CP = 12.28 nF. Simulation condition 4 (novel LLC control circuit): Pomax = 1200 W, Vo = 48 V, Lm = 264 μH, Lr = 20 μH, Cr = 130 nF, and CP = 30.72 nF. Table 1 lists simulation result comparisons between the novel LLC control circuits and typical LLC circuits. This table shows that switching frequency of typical LLC resonant converters at standby tends to reach even twice than that at full-load, whereas the novel LLC control circuit still operates at fixed frequency regardless of whether in standby or full-load conditions. By attributions from power switch of the auxiliary control circuit keeping in cut-off state, switching loss degrades accompanied with a relatively large peak input current, Iin_peak. Table 1. Comparison between the simulation results for typical LLC circuit and new LLC circuit. 480 W/48 V@100% load Conventional LLC Proposed LLC 480 W/48 V@0% load Conventional LLC Proposed LLC 1200 W/48 V@100% load Conventional LLC Proposed LLC 1200 W/48 V@0% load Conventional LLC Proposed LLC
fSW 98.89 kHz 99 kHz fSW 285.15 kHz 95 kHz fSW 96.52 kHz 96 kHz fSW 258.47 kHz 96 kHz
Iin_peak 4.521 A 6.827 A Iin_peak Iin_rms 0.688 A 0.327 A 1.018 A 0.486 A Iin_peak 12.016 A 23.791 A Iin_peak Iin_rms 1.810 A 0.824 A 2.360 A 1.076 A
fQ3 N/A 198 kHz fQ3 N/A 0 Hz fQ3 N/A 186 kHz fQ3 N/A 0 Hz
According to the formulas for the LLC resonant converter operated under no load conditions, the dominant power loss is roughly divided into four parts, such as switching loss and conduction loss on power switches, copper loss and core loss on the transformer. Besides, the material of cores and temperature-related parameters on transformers cannot be rebuilt accurately in a simulated system, which makes it not convincing if core loss is taken into consideration in the simulation. Thus, this paper ignores core loss estimation: 𝑃turn−off_loss =
1 × 𝑉DS × 𝐼DS_Peak × 𝑡f × 𝑓s 2
𝑃conduction_loss = 𝐼DS_RMS × 𝑅DS_on 𝑦
(3) (4)
𝑃core = 𝐶m × 𝑓 𝑥 × 𝐵peak × (𝑐𝑡0 − 𝑐𝑡1 × 𝑇 + 𝑐𝑡2 × 𝑇 2 )
(5)
𝑃Copper = 𝐼in_rms 2 × 𝑅pri + 𝐼sec_rms 2 × 𝑅sec
(6)
Proved by Figures 23 and 24 and Tables 1 and 2, LLC systems with the novel control circuit perform better efficiency at standby.
353 VGS_1
5
0 10
VGS_2
5
0 300
VDS_1
200 100
10
VGS_1 / V
10
0
200
Ir&Im / A
6
Ir&Im
-6
VDS_2 / V
0
Ir&Im / A
VDS_2
200
Ip / A
VDS_2 / V
300
200
0 0.6
-0.6
-4
Ip / A
Ip
240
VCr
200 160
VCr / V
VCr / V
Ip
0 -0.5
-8
8
VGS_3
4 0 6
IDS_3
3 0
34.776
34.778
34.78
34.782
34.784
34.786
IDo1&IDo2 A
0
VCr
185
1
IDo1&IDo2
0 -1 30
VGS_3 / V
IDo1&IDo2
10
IDS_3 / uA
20
200
170
120
IDo1&IDo2 A
Ir&Im
0.2 0 -0.2
0.5
4
VGS_3 / V
VDS_2
300
100
8
IDS_3 / A
VDS_1
300
100 0
100
0
VGS_2
5
0
2 0 -2
VGS_1
5
0 10
VDS_1 / V VGS_2 / V
VDS_1 / V VGS_2 / V
VGS_1 / V
Energies 2015, 8
VGS_3
20 10 0 180
IDS_3
120 60
34.788
0
94.294
94.296
94.298
94.3
94.302
94.304
94.306
Time/ms
Time/ms
(a)
(b)
VGS_1
5
0 10
VGS_2
5
0 300
VDS_1
200 100
VGS_1 / V
10
VDS_1 / V VGS_2 / V
VDS_1 / V VGS_2 / V
VGS_1 / V
Figure 23. Simulation waveforms for novel LLC control circuit at 480 W/48 V: (a) 100% load; and (b) 0% load.
VDS_2
200 100 0 20 12 4 0 -4 -12
Ir&Im
VDS_2 / V
300
VGS_2
5
0 300
VDS_1
200 100
VCr
200 100
12
8 4
6
56.974
56.976
56.978
56.98
56.982
56.984
0.5
Ip
0 -0.5 200
VCr
190 180
VGS_3 IDS_3
0 18 12
-1.5
0.4
0
Ir&Im
0.5 0 -0.5
300
IDo1&IDo2
24
0 1.5
IDo1&IDo2 A
36
VDS_2
200 100
VGS_3 / V
48
Ip / A
Ip
VCr / V
4 0 -4 -8 300
300
IDS_3 / uA
IDS_3 / A
VGS_3 / V
IDo1&IDo2 A
VCr / V
Ip / A
-20 8
0
VGS_1
5
0 10
0
Ir&Im / A
Ir&Im / A
VDS_2 / V
0
10
IDo1&IDo2
200 100 0
VGS_3
0.2 0 -0.2 -0.4 600
IDS_3
400 200 0
97.732
97.734
97.736
97.738
Time/ms
(a)
97.74
Time/ms
(b)
Figure 24. Simulated waveform for typical LLC control circuit under 1200 W/48 V: (a) 100% load; and (b) 0% load.
Energies 2015, 8
354 Table 2. Overall power loss at standby.
Specification 480 W/48 V 1200 W/48 V
Type MOS-FDP12N50 MOS-FDA28N50
Rpri 0.2 Ω Rpri 0.08 Ω
Conventional LLC 2.0305 W 10.9608 W
Novel LLC 1.1846 W 5.4568 W
5. Conclusions The purpose of this paper is mainly to focus on renewable energy generation system at standby. A novel control scheme for LLC converters is introduced to optimize switching loss and improve standby efficiency. Features between typical LLC circuit and proposed LLC control circuit get analyzed in detail. From SIMPLIS simulation results and standby power loss evaluation, some overall conclusions can be derived as follows: (1) Systems with proposed control schemes achieve optimal standby power consumptions. (2) Even though the magnetizing inductance remains unchanged, the resonant inductance is permitted with a relatively small design, bringing advantages such as smaller volumes of magnetic components and improving power density. (3) This system can also enhance current gain and operate in a wide input range. The hold-up time increases, which reduces capacitance size and improves power density; additionally, operating range of wind generators gets improved. (4) The control loop at system input and output side is independent, and therefore, isolation between control circuits is naturally accomplished. Acknowledgments This work was supported by the Ministry of Science and Technology of Taiwan under Contracts 103-3113-E-194-003 and 104-3113-E-194-003. The authors would like to thank Leadtrend Technology Corp. for the support on chip fabrication, measurement, and verifications. Author Contributions Both of the authors played important roles during the design of standby efficiency improvement and partially wrote the paper. Ming-Chang Tsou ran the simulation and Ming-Tse Kuo reviewed and revised the manuscript. Conflicts of Interest The authors declare no conflict of interest. References 1.
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