Most of the information of these slides were based in [1] (Tanenbaum, A.S.:
Structured Computer Organization, Fifth Edition, Prentice Hall, Upper Saddle.
River, NJ.). ... alternatively from: http://www.cs.bham.ac.uk/~vlm/introCS2010/
Exer01.pdf ...
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Fundamentals: Intro to Computer Science Module Assembly Language V. Landassuri-Moreno
[email protected]
School of Computer Science University of Birmingham
December, 2010
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Outline Introduction The Instruction Set Architecture Level Introduction to PII/P4 Instruction Format Addressing Procedure The Assembly Language Level Macros The Assembly Process and linking
Procedure
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Resources
Tutorials: I
Here is presented an overview of Assembly Language.
I
Most of the information of these slides were based in [1] (Tanenbaum, A.S.: Structured Computer Organization, Fifth Edition, Prentice Hall, Upper Saddle River, NJ.).
I
From this part, you will have an exercise which will be submitted to Dr. Behzad Bordbar.
I
You can download the exercise from the web page of the module, or alternatively from: http://www.cs.bham.ac.uk/~vlm/introCS2010/Exer01.pdf
Intro
Instruction Set
Instruction Format
Addressing
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI EDI EBP ESP
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
Procedure
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI EDI EBP ESP
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
The P4 has similar registers to the PII
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI EDI EBP ESP
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
The P4 has similar registers to the PII In P4 the words are stored in little endian format (the low order byte has the lowest address)
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI
The P4 has similar registers to the PII In P4 the words are stored in little endian format (the low order byte has the lowest address)
EDI EBP ESP
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
EAX, EBX, ECX and EDX are 32-bit general purpose registers
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI
The P4 has similar registers to the PII In P4 the words are stored in little endian format (the low order byte has the lowest address)
EDI EBP ESP
EAX, EBX, ECX and EDX are 32-bit general purpose registers * EAX arithmetic register
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
* EBX good for holding address (memory addresses) * ECX for looping * EDX for multiplication and division, together with EAX, it holds 64-bit products and dividends
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI
The P4 has similar registers to the PII In P4 the words are stored in little endian format (the low order byte has the lowest address)
EDI EBP ESP
EAX, EBX, ECX and EDX are 32-bit general purpose registers * EAX arithmetic register
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
* EBX good for holding address (memory addresses) * ECX for looping * EDX for multiplication and division, together with EAX, it holds 64-bit products and dividends Configuration: 16 bits high order, 16 for lower order. The last one it is divided into two parts (8 bits)
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI EDI EBP ESP
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
ESI, EDI and EBP like general purpose registers with some special characteristics:
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI EDI EBP ESP
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
ESI, EDI and EBP like general purpose registers with some special characteristics: ESI and EDI pointer into memory -> for hardware string manipulation
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI, EDI and EBP like general purpose registers with some special characteristics: ESI and EDI pointer into memory -> for hardware string manipulation
ESI EDI
* EDI point to the destination string
ESP
* EBP is also a pointer register -> points to the base of the current stack frame
CS SS DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
* ESI points to the source string
EBP
* ESP is the stack pointer
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI, EDI and EBP like general purpose registers with some special characteristics: ESI and EDI pointer into memory -> for hardware string manipulation
ESI EDI
* ESI points to the source string
EBP
* EDI point to the destination string
ESP
* EBP is also a pointer register -> points to the base of the current stack frame
CS SS
* ESP is the stack pointer
DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
CS through GS are segment registers, old registers that continue in the present, the 8088 attempted to address 2020 bytes of memory using 16-bit addresses.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI, EDI and EBP like general purpose registers with some special characteristics: ESI and EDI pointer into memory -> for hardware string manipulation
ESI EDI
* ESI points to the source string
EBP
* EDI point to the destination string
ESP
* EBP is also a pointer register -> points to the base of the current stack frame
CS SS
* ESP is the stack pointer
DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
CS through GS are segment registers, old registers that continue in the present, the 8088 attempted to address 2020 bytes of memory using 16-bit addresses. * EIP is the program counter
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Registers Bits
16
8 AH BH CH DH
8 A X B X C X D X
AL
EAX
BL
EBX
CL
ECX
DL
EDX
ESI, EDI and EBP like general purpose registers with some special characteristics: ESI and EDI pointer into memory -> for hardware string manipulation
ESI EDI
* ESI points to the source string
EBP
* EDI point to the destination string
ESP
* EBP is also a pointer register -> points to the base of the current stack frame
CS SS
* ESP is the stack pointer
DS ES FS GS
EIP
EFLAGS
Figure 5-3. The Pentium II’s primary registers.
CS through GS are segment registers, old registers that continue in the present, the 8088 attempted to address 2020 bytes of memory using 16-bit addresses. * EIP is the program counter * Finally, there is the flags (EFLAGS)
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Instruction Format An instruction consist of an opcode, usually with additional information: where the operands come from and where results go.
OPCODE (a)
OPCODE
ADDRESS1 ADDRESS2 (c)
OPCODE
ADDRESS (b)
OPCODE ADDR1 ADDR2 ADDR3 (d)
Figure 5-9. Four common instruction formats: (a) Zeroaddress instruction. (b) One-address instruction (c) Twoaddress instruction. (d) Three-address instruction.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing Addressing modes I Immediate addressing. Uses immediate operands: they are automatically fetched from memory at the same time the instruction itself is fetched. This mode do not require an extra memory reference to fetch the operand.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing Addressing modes I Immediate addressing. Uses immediate operands: they are automatically fetched from memory at the same time the instruction itself is fetched. This mode do not require an extra memory reference to fetch the operand. I Direct addressing. A way to specify an operand in memory (giving its address): like global variables, the value can change but not the address.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing Addressing modes I Immediate addressing. Uses immediate operands: they are automatically fetched from memory at the same time the instruction itself is fetched. This mode do not require an extra memory reference to fetch the operand. I Direct addressing. A way to specify an operand in memory (giving its address): like global variables, the value can change but not the address. I Register addressing (register mode). Like direct addressing but specifies a register instead of a memory location. Useful for variables that will be accessed frequently, e.g. loops.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing Addressing modes I Immediate addressing. Uses immediate operands: they are automatically fetched from memory at the same time the instruction itself is fetched. This mode do not require an extra memory reference to fetch the operand. I Direct addressing. A way to specify an operand in memory (giving its address): like global variables, the value can change but not the address. I Register addressing (register mode). Like direct addressing but specifies a register instead of a memory location. Useful for variables that will be accessed frequently, e.g. loops. Recall that a registers have a fast access and short addresses.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing Addressing modes I Immediate addressing. Uses immediate operands: they are automatically fetched from memory at the same time the instruction itself is fetched. This mode do not require an extra memory reference to fetch the operand. I Direct addressing. A way to specify an operand in memory (giving its address): like global variables, the value can change but not the address. I Register addressing (register mode). Like direct addressing but specifies a register instead of a memory location. Useful for variables that will be accessed frequently, e.g. loops. Recall that a registers have a fast access and short addresses.
22222222222222222222222222222 1122222222222222222222222222222 11 11 MOV R1 4 11 Figure 5-16. An immediate instruction for loading 4 into register 1.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing Note that there are several different kinds of addressing, here we are considering just a few of them.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Reverse Polish notation infix notation: x + y
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Reverse Polish notation infix notation: x + y postfix or reverse Polish notation: x y +
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Reverse Polish notation infix notation: x + y postfix or reverse Polish notation: x y +
I Postfix advantages:
Formulas without parenthesis
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Reverse Polish notation infix notation: x + y postfix or reverse Polish notation: x y +
I Postfix advantages:
Formulas without parenthesis Convenient for the stack (in computers)
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Reverse Polish notation infix notation: x + y postfix or reverse Polish notation: x y +
I Postfix advantages:
Formulas without parenthesis Convenient for the stack (in computers) There are precedences in infix notation, postfix does not have them !!!
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Addressing
I
I
Note that there are several different kinds of addressing, here we are considering just a few of them. Stack addressing. Making the machine instructions as short as possible is highly desirable. The idea is to have no address at all, here is where the stack can help us out.
Reverse Polish notation infix notation: x + y postfix or reverse Polish notation: x y +
I Postfix advantages:
Formulas without parenthesis Convenient for the stack (in computers) There are precedences in infix notation, postfix does not have them !!!
+
Exist diverse algorithms to convert from infix to postfix
+
The order of the variables is the same in both. But the order of the operators is not always the same
22222222222222222222222222222222222222222222222222222222222222 122222222222222222222222222222222222222222222222222222222222222 1 Infix Reverse Polish notation 1 1 1 1 A+B×C 122222222222222222222222222222222222222222222222222222222222222 1 ABC×+ 1 122222222222222222222222222222222222222222222222222222222222222 1 AB×C+ 1 A×B+C 1 A×B+C×D 1 AB×CD×+ 1 122222222222222222222222222222222222222222222222222222222222222 1 1 (A + B) / (C − D) 122222222222222222222222222222222222222222222222222222222222222 1 AB+CD−/ 1 1 A×B/C 1 AB×C/ 1 122222222222222222222222222222222222222222222222222222222222222 1 1 ((A + B) × C + D)/(E + F + G) 122222222222222222222222222222222222222222222222222222222222222 1 AB+C×D+EF+G+/ 1 Figure 5-22. Some examples of infix expressions and their reverse Polish notation equivalents.
Intro
Instruction Set
Instruction Format
Addressing
Evaluation of Reverse Polish notation Evaluation of (8 + 2 x 5) / (1 + 3 x 2 - 4)
Procedure
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Evaluation of Reverse Polish notation Evaluation of (8 + 2 x 5) / (1 + 3 x 2 - 4) 2222222222222222222222222222222222222222222222222222222222222222 1 Instruction 1 1 Step 1 Remaining string Stack 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 1 1 825×+132×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 8 1 8 1 12222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 2 1 8, 2 1 2 1 25×+132×+4−/ 1 1 5×+132×+4−/ 1 BIPUSH 5 1 8, 2, 5 1 3 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 4 1 ×+132×+4−/ 1 IMUL 1 8, 10 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 5 +132×+4−/ IADD 18 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 6 1 132×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 1 1 18, 1 1 1 BIPUSH 3 1 18, 1, 3 1 7 1 32×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 8 1 2×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 2 1 18, 1, 3, 2 1 12222222222222222222222222222222222222222222222222222222222222222 1 IMUL 1 18, 1, 6 1 9 1 ×+4−/ 1 10 1 + 4 − / 1 IADD 1 18, 7 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 11 1 4 − / 1 BIPUSH 4 1 18, 7, 4 1 21 222222222222222222222222222222222222222222222222222222222222222 1 12 1 − / 1 ISUB 1 18, 3 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 13 1 / 12222222222222222222222222222222222222222222222222222222222222222 1 IDIV 1 6 1 Figure 5-23. Use of a stack to evaluate a reverse Polish notation formula.
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Evaluation of Reverse Polish notation Evaluation of (8 + 2 x 5) / (1 + 3 x 2 - 4) 2222222222222222222222222222222222222222222222222222222222222222 1 Instruction 1 1 Step 1 Remaining string Stack 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 1 1 825×+132×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 8 1 8 1 12222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 2 1 8, 2 1 2 1 25×+132×+4−/ 1 1 5×+132×+4−/ 1 BIPUSH 5 1 8, 2, 5 1 3 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 4 1 ×+132×+4−/ 1 IMUL 1 8, 10 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 5 +132×+4−/ IADD 18 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 6 1 132×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 1 1 18, 1 1 1 BIPUSH 3 1 18, 1, 3 1 7 1 32×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 8 1 2×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 2 1 18, 1, 3, 2 1 12222222222222222222222222222222222222222222222222222222222222222 1 IMUL 1 18, 1, 6 1 9 1 ×+4−/ 1 10 1 + 4 − / 1 IADD 1 18, 7 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 11 1 4 − / 1 BIPUSH 4 1 18, 7, 4 1 21 222222222222222222222222222222222222222222222222222222222222222 1 12 1 − / 1 ISUB 1 18, 3 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 13 1 / 12222222222222222222222222222222222222222222222222222222222222222 1 IDIV 1 6 1 Figure 5-23. Use of a stack to evaluate a reverse Polish notation formula.
I
In reverse polish notation: 825x+132x+4-/
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Evaluation of Reverse Polish notation Evaluation of (8 + 2 x 5) / (1 + 3 x 2 - 4) 2222222222222222222222222222222222222222222222222222222222222222 1 Instruction 1 1 Step 1 Remaining string Stack 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 1 1 825×+132×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 8 1 8 1 12222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 2 1 8, 2 1 2 1 25×+132×+4−/ 1 1 5×+132×+4−/ 1 BIPUSH 5 1 8, 2, 5 1 3 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 4 1 ×+132×+4−/ 1 IMUL 1 8, 10 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 5 +132×+4−/ IADD 18 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 6 1 132×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 1 1 18, 1 1 1 BIPUSH 3 1 18, 1, 3 1 7 1 32×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 8 1 2×+4−/ 21 222222222222222222222222222222222222222222222222222222222222222 1 BIPUSH 2 1 18, 1, 3, 2 1 12222222222222222222222222222222222222222222222222222222222222222 1 IMUL 1 18, 1, 6 1 9 1 ×+4−/ 1 10 1 + 4 − / 1 IADD 1 18, 7 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 11 1 4 − / 1 BIPUSH 4 1 18, 7, 4 1 21 222222222222222222222222222222222222222222222222222222222222222 1 12 1 − / 1 ISUB 1 18, 3 1 21 222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 13 1 / 12222222222222222222222222222222222222222222222222222222222222222 1 IDIV 1 6 1 Figure 5-23. Use of a stack to evaluate a reverse Polish notation formula.
I
In reverse polish notation: 825x+132x+4-/
I
Algorithm to evaluate it using the stack
1 Scan the postfix notation from left to
right 2 When an operand is encountered, push
it onto the stack 3 When an operator is encountered,
execute the corresponding instruction
Intro
Instruction Set
Instruction Format
Addressing
Procedure
The Pentium II/4 instructions Transfer of control
Moves MOV DST,SRC
Move SRC to DST
JMP ADDR
Jump to ADDR
PUSH SRC
Push SRC onto the stack
Jxx ADDR
Conditional jumps based on flags
POP DST
Pop a word from the stack to DST
CALL ADDR
Call procedure at ADDR
XCHG DS1,DS2
Exchange DS1 and DS2
RET
Return from procedure
LEA DST,SRC
Load effective addr of SRC into DST
IRET
Return from interrupt
CMOV DST,SRC
Conditional move
LOOPxx
Loop until condition met
INT ADDR
Initiate a software interrupt
INTO
Interrupt if overflow bit is set
Arithmetic ADD DST,SRC
Add SRC to DST
SUB DST,SRC
Subtract DST from SRC
MUL SRC
Multiply EAX by SRC (unsigned)
LODS
Load string
IMUL SRC
Multiply EAX by SRC (signed)
STOS
Store string
DIV SRC
Divide EDX:EAX by SRC (unsigned)
MOVS
Move string
IDIV SRC
Divide EDX:EAX by SRC (signed)
CMPS
Compare two strings
ADC DST,SRC
Add SRC to DST, then add carry bit
SCAS
SBB DST,SRC
Subtract DST & carry from SRC
INC DST
Add 1 to DST
DEC DST
Subtract 1 from DST
STC
Set carry bit in EFLAGS register
NEG DST
Negate DST (subtract it from 0)
CLC
Clear carry bit in EFLAGS register
CMC
Complement carry bit in EFLAGS
Binary coded decimal
STD
Set direction bit in EFLAGS register
DAA
Decimal adjust
CLD
Clear direction bit in EFLAGS reg
DAS
Decimal adjust for subtraction
STI
Set interrupt bit in EFLAGS register
AAA
ASCII adjust for addition
CLI
Clear interrupt bit in EFLAGS reg
AAS
ASCII adjust for subtraction
PUSHFD
Push EFLAGS register onto stack
AAM
ASCII adjust for multiplication
AAD
ASCII adjust for division
POPFD
Pop EFLAGS register from stack
LAHF
Load AH from EFLAGS register
SAHF
Store AH in EFLAGS register
SWAP DST
Change endianness of DST
CWQ
Extend EAX to EDX:EAX for division
CWDE
Extend 16-bit number in AX to EAX
ENTER SIZE,LV
Create stack frame with SIZE bytes
LEAVE
Undo stack frame built by ENTER
NOP
No operation
HLT
Halt
IN AL,PORT
Input a byte from PORT to AL
OUT PORT,AL
Output a byte from AL to PORT
WAIT
Wait for an interrupt
Boolean AND DST,SRC
Boolean AND SRC into DST
OR DST,SRC
Boolean OR SRC into DST
XOR DST,SRC
Boolean Exclusive OR SRC to DST
NOT DST
Replace DST with 1’s complement
SAL/SAR DST,#
Shift DST left/right # bits
SHL/SHR DST,#
Logical shift DST left/right # bits
Shift/rotate
ROL/ROR DST,#
Rotate DST left/right # bits
RCL/RCR DST,#
Rotate DST through carry # bits
Test/compare TST SRC1,SRC2
Boolean AND operands, set flags
CMP SRC1,SRC2
Set flags based on SRC1 - SRC2
Strings
Scan Strings
Condition codes
Miscellaneous
SRC = source DST = destination
# = shift/rotate count LV = # locals
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Pentium II/4 instructions Transfer of control
Moves MOV DST,SRC
Move SRC to DST
JMP ADDR
Jump to ADDR
PUSH SRC
Push SRC onto the stack
Jxx ADDR
Conditional jumps based on flags
POP DST
Pop a word from the stack to DST
CALL ADDR
Call procedure at ADDR
XCHG DS1,DS2
Exchange DS1 and DS2
RET
Return from procedure
LEA DST,SRC
Load effective addr of SRC into DST
IRET
Return from interrupt
CMOV DST,SRC
Conditional move
LOOPxx
Loop until condition met
INT ADDR
Initiate a software interrupt
INTO
Interrupt if overflow bit is set
Arithmetic ADD DST,SRC
Add SRC to DST
SUB DST,SRC
Subtract DST from SRC
MUL SRC
Multiply EAX by SRC (unsigned)
LODS
Load string
IMUL SRC
Multiply EAX by SRC (signed)
STOS
Store string
DIV SRC
Divide EDX:EAX by SRC (unsigned)
MOVS
Move string
IDIV SRC
Divide EDX:EAX by SRC (signed)
CMPS
Compare two strings
ADC DST,SRC
Add SRC to DST, then add carry bit
SCAS
SBB DST,SRC
Subtract DST & carry from SRC
INC DST
Add 1 to DST
DEC DST
Subtract 1 from DST
STC
Set carry bit in EFLAGS register
NEG DST
Negate DST (subtract it from 0)
CLC
Clear carry bit in EFLAGS register
CMC
Complement carry bit in EFLAGS
Binary coded decimal
STD
Set direction bit in EFLAGS register
DAA
Decimal adjust
CLD
Clear direction bit in EFLAGS reg
DAS
Decimal adjust for subtraction
STI
Set interrupt bit in EFLAGS register
AAA
ASCII adjust for addition
CLI
Clear interrupt bit in EFLAGS reg
AAS
ASCII adjust for subtraction
PUSHFD
Push EFLAGS register onto stack
AAM
ASCII adjust for multiplication
AAD
ASCII adjust for division
POPFD
Pop EFLAGS register from stack
LAHF
Load AH from EFLAGS register
SAHF
Store AH in EFLAGS register
SWAP DST
Change endianness of DST
CWQ
Extend EAX to EDX:EAX for division
CWDE
Extend 16-bit number in AX to EAX
ENTER SIZE,LV
Create stack frame with SIZE bytes
LEAVE
Undo stack frame built by ENTER
NOP
No operation
HLT
Halt
IN AL,PORT
Input a byte from PORT to AL
OUT PORT,AL
Output a byte from AL to PORT
WAIT
Wait for an interrupt
Boolean AND DST,SRC
Boolean AND SRC into DST
OR DST,SRC
Boolean OR SRC into DST
XOR DST,SRC
Boolean Exclusive OR SRC to DST
NOT DST
Replace DST with 1’s complement
SAL/SAR DST,#
Shift DST left/right # bits
SHL/SHR DST,#
Logical shift DST left/right # bits
Shift/rotate
ROL/ROR DST,#
Rotate DST left/right # bits
RCL/RCR DST,#
Rotate DST through carry # bits
Test/compare TST SRC1,SRC2
Boolean AND operands, set flags
CMP SRC1,SRC2
Set flags based on SRC1 - SRC2
Strings
Scan Strings
Condition codes
Miscellaneous
SRC = source DST = destination
# = shift/rotate count LV = # locals
I P4 instructions reference one or two
operands
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Pentium II/4 instructions Transfer of control
Moves MOV DST,SRC
Move SRC to DST
JMP ADDR
Jump to ADDR
PUSH SRC
Push SRC onto the stack
Jxx ADDR
Conditional jumps based on flags
POP DST
Pop a word from the stack to DST
CALL ADDR
Call procedure at ADDR
XCHG DS1,DS2
Exchange DS1 and DS2
RET
Return from procedure
LEA DST,SRC
Load effective addr of SRC into DST
IRET
Return from interrupt
CMOV DST,SRC
Conditional move
LOOPxx
Loop until condition met
INT ADDR
Initiate a software interrupt
INTO
Interrupt if overflow bit is set
Arithmetic ADD DST,SRC
Add SRC to DST
SUB DST,SRC
Subtract DST from SRC
MUL SRC
Multiply EAX by SRC (unsigned)
LODS
Load string
IMUL SRC
Multiply EAX by SRC (signed)
STOS
Store string
DIV SRC
Divide EDX:EAX by SRC (unsigned)
MOVS
Move string
IDIV SRC
Divide EDX:EAX by SRC (signed)
CMPS
Compare two strings
ADC DST,SRC
Add SRC to DST, then add carry bit
SCAS
SBB DST,SRC
Subtract DST & carry from SRC
INC DST
Add 1 to DST
DEC DST
Subtract 1 from DST
STC
Set carry bit in EFLAGS register
Negate DST (subtract it from 0)
CLC
Clear carry bit in EFLAGS register
NEG DST
Strings
Scan Strings
Condition codes
CMC
Complement carry bit in EFLAGS
Binary coded decimal
STD
Set direction bit in EFLAGS register
DAA
Decimal adjust
CLD
Clear direction bit in EFLAGS reg
DAS
Decimal adjust for subtraction
STI
Set interrupt bit in EFLAGS register
AAA
ASCII adjust for addition
CLI
Clear interrupt bit in EFLAGS reg
AAS
ASCII adjust for subtraction
PUSHFD
Push EFLAGS register onto stack
AAM
ASCII adjust for multiplication
AAD
ASCII adjust for division
POPFD
Pop EFLAGS register from stack
LAHF
Load AH from EFLAGS register
SAHF
Store AH in EFLAGS register
SWAP DST
Change endianness of DST
CWQ
Extend EAX to EDX:EAX for division
CWDE
Extend 16-bit number in AX to EAX
ENTER SIZE,LV
Create stack frame with SIZE bytes
LEAVE
Undo stack frame built by ENTER
NOP
No operation
HLT
Halt
IN AL,PORT
Input a byte from PORT to AL
OUT PORT,AL
Output a byte from AL to PORT
WAIT
Wait for an interrupt
Boolean AND DST,SRC
Boolean AND SRC into DST
OR DST,SRC
Boolean OR SRC into DST
XOR DST,SRC
Boolean Exclusive OR SRC to DST
NOT DST
Replace DST with 1’s complement
SAL/SAR DST,#
Shift DST left/right # bits
SHL/SHR DST,#
Logical shift DST left/right # bits
Shift/rotate
ROL/ROR DST,#
Rotate DST left/right # bits
RCL/RCR DST,#
Rotate DST through carry # bits
Test/compare TST SRC1,SRC2
Boolean AND operands, set flags
CMP SRC1,SRC2
Set flags based on SRC1 - SRC2
Miscellaneous
SRC = source DST = destination
# = shift/rotate count LV = # locals
I P4 instructions reference one or two
operands I SRC fields are source of
information and are not changed
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Pentium II/4 instructions Transfer of control
Moves MOV DST,SRC
Move SRC to DST
JMP ADDR
Jump to ADDR
PUSH SRC
Push SRC onto the stack
Jxx ADDR
Conditional jumps based on flags
POP DST
Pop a word from the stack to DST
CALL ADDR
Call procedure at ADDR
XCHG DS1,DS2
Exchange DS1 and DS2
RET
Return from procedure
LEA DST,SRC
Load effective addr of SRC into DST
IRET
Return from interrupt
CMOV DST,SRC
Conditional move
LOOPxx
Loop until condition met
INT ADDR
Initiate a software interrupt
INTO
Interrupt if overflow bit is set
Arithmetic ADD DST,SRC
Add SRC to DST
SUB DST,SRC
Subtract DST from SRC
MUL SRC
Multiply EAX by SRC (unsigned)
LODS
Load string
IMUL SRC
Multiply EAX by SRC (signed)
STOS
Store string
DIV SRC
Divide EDX:EAX by SRC (unsigned)
MOVS
Move string
IDIV SRC
Divide EDX:EAX by SRC (signed)
CMPS
Compare two strings
ADC DST,SRC
Add SRC to DST, then add carry bit
SCAS
SBB DST,SRC
Subtract DST & carry from SRC
INC DST
Add 1 to DST
DEC DST
Subtract 1 from DST
STC
Set carry bit in EFLAGS register
Negate DST (subtract it from 0)
CLC
Clear carry bit in EFLAGS register
NEG DST
Strings
Scan Strings
Condition codes
CMC
Complement carry bit in EFLAGS
Binary coded decimal
STD
Set direction bit in EFLAGS register
DAA
Decimal adjust
CLD
Clear direction bit in EFLAGS reg
DAS
Decimal adjust for subtraction
STI
Set interrupt bit in EFLAGS register
AAA
ASCII adjust for addition
CLI
Clear interrupt bit in EFLAGS reg
AAS
ASCII adjust for subtraction
PUSHFD
Push EFLAGS register onto stack
AAM
ASCII adjust for multiplication
AAD
ASCII adjust for division
POPFD
Pop EFLAGS register from stack
LAHF
Load AH from EFLAGS register
SAHF
Store AH in EFLAGS register
SWAP DST
Change endianness of DST
CWQ
Extend EAX to EDX:EAX for division
CWDE
Extend 16-bit number in AX to EAX
ENTER SIZE,LV
Create stack frame with SIZE bytes
LEAVE
Undo stack frame built by ENTER
NOP
No operation
HLT
Halt
IN AL,PORT
Input a byte from PORT to AL
OUT PORT,AL
Output a byte from AL to PORT
WAIT
Wait for an interrupt
Boolean AND DST,SRC
Boolean AND SRC into DST
OR DST,SRC
Boolean OR SRC into DST
XOR DST,SRC
Boolean Exclusive OR SRC to DST
NOT DST
Replace DST with 1’s complement
SAL/SAR DST,#
Shift DST left/right # bits
SHL/SHR DST,#
Logical shift DST left/right # bits
Shift/rotate
ROL/ROR DST,#
Rotate DST left/right # bits
RCL/RCR DST,#
Rotate DST through carry # bits
Test/compare TST SRC1,SRC2
Boolean AND operands, set flags
CMP SRC1,SRC2
Set flags based on SRC1 - SRC2
Miscellaneous
SRC = source DST = destination
# = shift/rotate count LV = # locals
I P4 instructions reference one or two
operands I SRC fields are source of
information and are not changed I DST fields are destinations and are
normally modified
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Pentium II/4 instructions Transfer of control
Moves MOV DST,SRC
Move SRC to DST
JMP ADDR
Jump to ADDR
PUSH SRC
Push SRC onto the stack
Jxx ADDR
Conditional jumps based on flags
POP DST
Pop a word from the stack to DST
CALL ADDR
Call procedure at ADDR
XCHG DS1,DS2
Exchange DS1 and DS2
RET
Return from procedure
LEA DST,SRC
Load effective addr of SRC into DST
IRET
Return from interrupt
CMOV DST,SRC
Conditional move
LOOPxx
Loop until condition met
INT ADDR
Initiate a software interrupt
INTO
Interrupt if overflow bit is set
Arithmetic ADD DST,SRC
Add SRC to DST
SUB DST,SRC
Subtract DST from SRC
MUL SRC
Multiply EAX by SRC (unsigned)
LODS
Load string
IMUL SRC
Multiply EAX by SRC (signed)
STOS
Store string
DIV SRC
Divide EDX:EAX by SRC (unsigned)
MOVS
Move string
IDIV SRC
Divide EDX:EAX by SRC (signed)
CMPS
Compare two strings
ADC DST,SRC
Add SRC to DST, then add carry bit
SCAS
SBB DST,SRC
Subtract DST & carry from SRC
INC DST
Add 1 to DST
DEC DST
Subtract 1 from DST
STC
Set carry bit in EFLAGS register
Negate DST (subtract it from 0)
CLC
Clear carry bit in EFLAGS register
NEG DST
Strings
Scan Strings
Condition codes
CMC
Complement carry bit in EFLAGS
Binary coded decimal
STD
Set direction bit in EFLAGS register
DAA
Decimal adjust
CLD
Clear direction bit in EFLAGS reg
DAS
Decimal adjust for subtraction
STI
Set interrupt bit in EFLAGS register
AAA
ASCII adjust for addition
CLI
Clear interrupt bit in EFLAGS reg
AAS
ASCII adjust for subtraction
PUSHFD
Push EFLAGS register onto stack
AAM
ASCII adjust for multiplication
AAD
ASCII adjust for division
POPFD
Pop EFLAGS register from stack
LAHF
Load AH from EFLAGS register
SAHF
Store AH in EFLAGS register
SWAP DST
Change endianness of DST
CWQ
Extend EAX to EDX:EAX for division
CWDE
Extend 16-bit number in AX to EAX
ENTER SIZE,LV
Create stack frame with SIZE bytes
LEAVE
Undo stack frame built by ENTER
NOP
No operation
HLT
Halt
IN AL,PORT
Input a byte from PORT to AL
OUT PORT,AL
Output a byte from AL to PORT
WAIT
Wait for an interrupt
Boolean AND DST,SRC
Boolean AND SRC into DST
OR DST,SRC
Boolean OR SRC into DST
XOR DST,SRC
Boolean Exclusive OR SRC to DST
NOT DST
Replace DST with 1’s complement
SAL/SAR DST,#
Shift DST left/right # bits
SHL/SHR DST,#
Logical shift DST left/right # bits
Shift/rotate
ROL/ROR DST,#
Rotate DST left/right # bits
RCL/RCR DST,#
Rotate DST through carry # bits
Test/compare TST SRC1,SRC2
Boolean AND operands, set flags
CMP SRC1,SRC2
Set flags based on SRC1 - SRC2
Miscellaneous
SRC = source DST = destination
# = shift/rotate count LV = # locals
I P4 instructions reference one or two
operands I SRC fields are source of
information and are not changed I DST fields are destinations and are
normally modified I Many instructions have three
variants: 8-, 16-, and 32-bit operands respectively
Intro
Instruction Set
Instruction Format
Addressing
Towers of Hanoi
Initial state
First move 2 disks from peg 1 to peg 2
Then move 1 disk from peg 1 to peg 3
Finally move 2 disks from peg 2 to peg 3
Figure 5-39. The steps required to solve the Towers of Hanoi for three disks.
Procedure
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
Initial state
First move 2 disks from peg 1 to peg 2
public void towers(int n, int i, int j) { int k; if (n == 1) System.out.println("Move a disk from " + i + " to " + j); else { k = 6 − i − j; towers(n − 1, i, k); towers(1, i, j); towers(n − 1, k, j);
Then move 1 disk from peg 1 to peg 3
} } Figure 5-40. A procedure for solving the Towers of Hanoi. Finally move 2 disks from peg 2 to peg 3
Figure 5-39. The steps required to solve the Towers of Hanoi for three disks.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Towers of Hanoi
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack The frame pointer (FP) points to a fixed location within the frame. It could point to a link pointer or to the first local variable
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack The frame pointer (FP) points to a fixed location within the frame. It could point to a link pointer or to the first local variable The original call to towers pushes n, i and j onto the stack
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack The frame pointer (FP) points to a fixed location within the frame. It could point to a link pointer or to the first local variable The original call to towers pushes n, i and j onto the stack Then is execute a CALL instruction that pushes the return address onto the stack at address 1012
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack The frame pointer (FP) points to a fixed location within the frame. It could point to a link pointer or to the first local variable The original call to towers pushes n, i and j onto the stack Then is execute a CALL instruction that pushes the return address onto the stack at address 1012 On entry, the called procedure stores the old value of FP
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack The frame pointer (FP) points to a fixed location within the frame. It could point to a link pointer or to the first local variable The original call to towers pushes n, i and j onto the stack Then is execute a CALL instruction that pushes the return address onto the stack at address 1012 On entry, the called procedure stores the old value of FP Then advance the SP to allocate storage for the local variables
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi Each time a procedure is called, a new stack frame is allocated for the procedure on top of the stack
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
The frame most recently created is the current frame. In this case, the stack grows upwards, then the most recent frame has higher addresses that the previous one The stack pointer (SP) points to the top of the stack The frame pointer (FP) points to a fixed location within the frame. It could point to a link pointer or to the first local variable The original call to towers pushes n, i and j onto the stack Then is execute a CALL instruction that pushes the return address onto the stack at address 1012 On entry, the called procedure stores the old value of FP Then advance the SP to allocate storage for the local variables With a 32-bit local variable, SP is incremented by 4 to 1020 for k
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Towers of Hanoi
Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
The first thing a procedure must do when called: Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
The first thing a procedure must do when called: Address
FP k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
FP k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Save the previous FP, so it can be restored at procedure exit
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
The first thing a procedure must do when called: Address
k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
FP SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
FP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Save the previous FP, so it can be restored at procedure exit Then, copy the SP into FP, and possibly increment by one word, depending on where in the new frame FP points
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
The first thing a procedure must do when called: Address
k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
FP SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
FP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Save the previous FP, so it can be restored at procedure exit Then, copy the SP into FP, and possibly increment by one word, depending on where in the new frame FP points In this case FP points to the first local variable
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
The first thing a procedure must do when called: Address
k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
FP SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
FP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Save the previous FP, so it can be restored at procedure exit Then, copy the SP into FP, and possibly increment by one word, depending on where in the new frame FP points In this case FP points to the first local variable Procedure prolog: is the code that saves the old frame pointer, sets up the new frame pointer, and advances the stack pointer to reserve space for local variables
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Towers of Hanoi
The first thing a procedure must do when called: Address
k Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k Old FP = 1024 Return addr j=3 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
k=3 Old FP = 1024 Return addr j=2 i=1 n=1 k=3 Old FP = 1000 Return addr j=2 i=1 n=2 k=2 Old FP Return addr j=3 i=1 n=3
(b)
(c)
(d)
(e)
SP
FP SP
SP
FP
FP k Old FP Return addr j=3 i=1 n=3 (a)
SP
FP
Figure 5-41. The stack at several points during the execution of Fig. 5-40.
1068 1064 1060 1056 1052 1048 1044 1040 1036 1032 1028 1024 1020 1016 1012 1008 1004 1000
Save the previous FP, so it can be restored at procedure exit Then, copy the SP into FP, and possibly increment by one word, depending on where in the new frame FP points In this case FP points to the first local variable Procedure prolog: is the code that saves the old frame pointer, sets up the new frame pointer, and advances the stack pointer to reserve space for local variables Procedure epilog: upon procedure exit, the stack must be cleaned up again
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Introduction
Translator: a program that convert the user’s program into another language I I I I
The user’s code is called source language The language to which is converted is called target language The translation create usually a object program or executable binary program In translation there are two steps: a) create the equivalent program; b) execute it
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Introduction
Translator: a program that convert the user’s program into another language I I I I
The user’s code is called source language The language to which is converted is called target language The translation create usually a object program or executable binary program In translation there are two steps: a) create the equivalent program; b) execute it
Interpretation I
Here only one step is required: the execution of the original source program
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Introduction
The translator are divided into two I
Assembler I
I I
Translation: When the source language is essentially a symbolic representation for a numerical machine language Then the translator is called assembler The source language is called Assembly language
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Introduction
The translator are divided into two I
Assembler I
I I
I
Translation: When the source language is essentially a symbolic representation for a numerical machine language Then the translator is called assembler The source language is called Assembly language
Compiler I
When you have a high-level language as Java or C
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
What is an Assembly Language
I
Is a language where each statement produce one machine instruction
I
Correspondence 1 to 1
I
It is used because is easier to remember tags that the numeric values of the instructions, e.g add, subtract, . . .
I
It is possibly to give symbolic names to memory locations
I
The assembly programmer can access to all the features and instructions available on the target machine. High level languages can not
I
The drawback is that it only can bu execute in the same family of machines
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
What is an Assembly Language
I
Is a language where each statement produce one machine instruction
I
Correspondence 1 to 1
I
It is used because is easier to remember tags that the numeric values of the instructions, e.g add, subtract, . . .
I
It is possibly to give symbolic names to memory locations
I
The assembly programmer can access to all the features and instructions available on the target machine. High level languages can not
I
The drawback is that it only can bu execute in the same family of machines Why use it?
I
It is difficult
I
Take much time to program on it, to debug and to maintain
I
Then, the reasons to use it are: performance and access to the machine
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax In this examples it is presented the Microsoft MASM assembler
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax In this examples it is presented the Microsoft MASM assembler All this apply to the 386, 486, Pentium and Pentium Pro
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax In this examples it is presented the Microsoft MASM assembler All this apply to the 386, 486, Pentium and Pentium Pro I The Assembly language
statement have four parts: * Label field * An operation (opcode) field * An operands field * And comments
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax In this examples it is presented the Microsoft MASM assembler All this apply to the 386, 486, Pentium and Pentium Pro I The Assembly language
statement have four parts: * Label field * An operation (opcode) field * An operands field * And comments I Labels provide symbolic names
for memory addresses
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax In this examples it is presented the Microsoft MASM assembler All this apply to the 386, 486, Pentium and Pentium Pro I The Assembly language
statement have four parts: * Label field * An operation (opcode) field * An operands field * And comments I Labels provide symbolic names
for memory addresses Are needed for branching and to store data
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Format of an Assembly Language Statement Opcode Operands Comments 2Label 22222222222222222222222222222222222222222222222222222222222222222222 FORMULA: MOV EAX,I ; register EAX = I ADD EAX,J ; register EAX = I + J MOV N,EAX ;N=I+J I J N
DW DW DW
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (a)
Label Opcode Operands Comments 2222222222222222222222222222222222222222222222222222222222222222222222 FORMULA MOVE.L I, D0 ; register D0 = I ADD.L J, D0 ; register D0 = I + J MOVE.L D0, N ;N=I+J I J N
DC.L DC.L DC.L
3 4 0
; reserve 4 bytes initialized to 3 ; reserve 4 bytes initialized to 4 ; reserve 4 bytes initialized to 0 (b)
Label Opcode Operands Comments 2 22222222222222222222222222222222222222222222222222222222222222222222222222222222222 FORMULA: SETHI %HI(I),%R1 ! R1 = high-order bits of the address of I LD [%R1+%LO(I)],%R1 ! R1 = I SETHI %HI(J),%R2 ! R2 = high-order bits of the address of J LD [%R2+%LO(J)],%R2 ! R2 = J NOP ! wait for J to arrive from memory ADD %R1,%R2,%R2 ! R2 = R1 + R2 SETHI %HI(N),%R1 ! R1 = high-order bits of the address of N ST %R2,[%R1+%LO(N)] I: J: N:
.WORD 3 .WORD 4 .WORD 0
! reserve 4 bytes initialized to 3 ! reserve 4 bytes initialized to 4 ! reserve 4 bytes initialized to 0 (c)
Figure 7-2. Computation of N = I + J. (a) Pentium II. (b) Motorola 680x0. (c) SPARC.
I Several assemblers exist for the
Intel family Each one has a different syntax In this examples it is presented the Microsoft MASM assembler All this apply to the 386, 486, Pentium and Pentium Pro I The Assembly language
statement have four parts: * Label field * An operation (opcode) field * An operands field * And comments I Labels provide symbolic names
for memory addresses Are needed for branching and to store data But they are restricted in size (6-8 characters)
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Example: instruction mov
mov eax,ebx
; eax = ebx (copy the value)
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Example: instruction mov
mov eax,ebx
; eax = ebx (copy the value)
Access memory mov eax,[ebx]
; eax = *((word*) ebx) (copy from memory)
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Example: instruction mov
mov eax,ebx
; eax = ebx (copy the value)
Access memory mov eax,[ebx]
; eax = *((word*) ebx) (copy from memory)
mov [eax], ebx
; *((word*) eax) = ebx (copy to a memory)
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Example: instruction mov
mov eax,ebx
; eax = ebx (copy the value)
Access memory mov eax,[ebx]
; eax = *((word*) ebx) (copy from memory)
mov [eax], ebx
; *((word*) eax) = ebx (copy to a memory)
Constant values mov eax,3210
; eax = 3210
mov eax,3210 + 5
; eax = 3210 + 5
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Pseudoinstructions They are commands to the assembler itself 222222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Pseudoinstr 1 Meaning 1 1 1 SEGMENT 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start a new segment (text, data, etc.) with certain attributes 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End the current segment 1 ENDS 1 1 1 ALIGN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Control the alignment of the next instruction or data 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Define a new symbol equal to a given expression 1 EQU 1 1 1 DB 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) bytes 1 DD 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 16-bit halfwords 1 1 DW 1 Allocate storage for one or more (initialized) 32-bit words 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 DQ 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 64-bit double words 1 1 PROC 1 Start a procedure 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDP 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a procedure 1 1 MACRO 1 Start a macro definition 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDM 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a macro definition 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Export a name defined in this module 1 PUBLIC 1 1 1 EXTERN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Import a name from another module 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Fetch and include another file 1 INCLUDE 1 1 1 IF 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly based on a given expression 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly if the IF condition above was false 1 ELSE 1 1 1 ENDIF End conditional assembly 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 COMMENT 1 Define a new start-of-comment character 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 PAGE 1 Generate a page break in the listing 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 END 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Terminate the assembly program 1
Figure 7-3. Some of the pseudoinstructions available in the Pentium II assembler (MASM).
Assembly Intro.
Macros
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Pseudoinstructions They are commands to the assembler itself 222222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Pseudoinstr 1 Meaning 1 1 1 SEGMENT 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start a new segment (text, data, etc.) with certain attributes 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End the current segment 1 ENDS 1 1 1 ALIGN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Control the alignment of the next instruction or data 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Define a new symbol equal to a given expression 1 EQU 1 1 1 DB 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) bytes 1 DD 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 16-bit halfwords 1 1 DW 1 Allocate storage for one or more (initialized) 32-bit words 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 DQ 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 64-bit double words 1 1 PROC 1 Start a procedure 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDP 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a procedure 1 1 MACRO 1 Start a macro definition 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDM 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a macro definition 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Export a name defined in this module 1 PUBLIC 1 1 1 EXTERN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Import a name from another module 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Fetch and include another file 1 INCLUDE 1 1 1 IF 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly based on a given expression 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly if the IF condition above was false 1 ELSE 1 1 1 ENDIF End conditional assembly 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 COMMENT 1 Define a new start-of-comment character 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 PAGE 1 Generate a page break in the listing 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 END 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Terminate the assembly program 1
Figure 7-3. Some of the pseudoinstructions available in the Pentium II assembler (MASM).
Examples: Segment. You can start segment of one type “X”, close it, start another different (“Y”), start again “X” and so on
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Pseudoinstructions They are commands to the assembler itself 222222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Pseudoinstr 1 Meaning 1 1 1 SEGMENT 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start a new segment (text, data, etc.) with certain attributes 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End the current segment 1 ENDS 1 1 1 ALIGN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Control the alignment of the next instruction or data 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Define a new symbol equal to a given expression 1 EQU 1 1 1 DB 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) bytes 1 DD 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 16-bit halfwords 1 1 DW 1 Allocate storage for one or more (initialized) 32-bit words 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 DQ 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 64-bit double words 1 1 PROC 1 Start a procedure 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDP 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a procedure 1 1 MACRO 1 Start a macro definition 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDM 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a macro definition 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Export a name defined in this module 1 PUBLIC 1 1 1 EXTERN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Import a name from another module 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Fetch and include another file 1 INCLUDE 1 1 1 IF 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly based on a given expression 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly if the IF condition above was false 1 ELSE 1 1 1 ENDIF End conditional assembly 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 COMMENT 1 Define a new start-of-comment character 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 PAGE 1 Generate a page break in the listing 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 END 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Terminate the assembly program 1
Figure 7-3. Some of the pseudoinstructions available in the Pentium II assembler (MASM).
Examples: Segment. You can start segment of one type “X”, close it, start another different (“Y”), start again “X” and so on ALING. If you have 61 byte of data and you use ALING 4, the next address allocated will be 64
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Pseudoinstructions They are commands to the assembler itself 222222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Pseudoinstr 1 Meaning 1 1 1 SEGMENT 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start a new segment (text, data, etc.) with certain attributes 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End the current segment 1 ENDS 1 1 1 ALIGN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Control the alignment of the next instruction or data 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Define a new symbol equal to a given expression 1 EQU 1 1 1 DB 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) bytes 1 DD 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 16-bit halfwords 1 1 DW 1 Allocate storage for one or more (initialized) 32-bit words 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 DQ 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 64-bit double words 1 1 PROC 1 Start a procedure 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDP 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a procedure 1 1 MACRO 1 Start a macro definition 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDM 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a macro definition 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Export a name defined in this module 1 PUBLIC 1 1 1 EXTERN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Import a name from another module 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Fetch and include another file 1 INCLUDE 1 1 1 IF 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly based on a given expression 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly if the IF condition above was false 1 ELSE 1 1 1 ENDIF End conditional assembly 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 COMMENT 1 Define a new start-of-comment character 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 PAGE 1 Generate a page break in the listing 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 END 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Terminate the assembly program 1
Figure 7-3. Some of the pseudoinstructions available in the Pentium II assembler (MASM).
Examples: Segment. You can start segment of one type “X”, close it, start another different (“Y”), start again “X” and so on ALING. If you have 61 byte of data and you use ALING 4, the next address allocated will be 64 BASE EQU 1000 you can use BASE instead of 1000
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Pseudoinstructions They are commands to the assembler itself 222222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Pseudoinstr 1 Meaning 1 1 1 SEGMENT 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start a new segment (text, data, etc.) with certain attributes 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End the current segment 1 ENDS 1 1 1 ALIGN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Control the alignment of the next instruction or data 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Define a new symbol equal to a given expression 1 EQU 1 1 1 DB 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) bytes 1 DD 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 16-bit halfwords 1 1 DW 1 Allocate storage for one or more (initialized) 32-bit words 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 DQ 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Allocate storage for one or more (initialized) 64-bit double words 1 1 PROC 1 Start a procedure 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDP 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a procedure 1 1 MACRO 1 Start a macro definition 1 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 ENDM 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 End a macro definition 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Export a name defined in this module 1 PUBLIC 1 1 1 EXTERN 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Import a name from another module 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Fetch and include another file 1 INCLUDE 1 1 1 IF 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly based on a given expression 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Start conditional assembly if the IF condition above was false 1 ELSE 1 1 1 ENDIF End conditional assembly 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 COMMENT 1 Define a new start-of-comment character 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 PAGE 1 Generate a page break in the listing 1 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 END 1222222222222222222222222222222222222222222222222222222222222222222222222222 1 Terminate the assembly program 1
Figure 7-3. Some of the pseudoinstructions available in the Pentium II assembler (MASM).
Examples: Segment. You can start segment of one type “X”, close it, start another different (“Y”), start again “X” and so on ALING. If you have 61 byte of data and you use ALING 4, the next address allocated will be 64 BASE EQU 1000 you can use BASE instead of 1000 TABLE DB 11, 23, 49 allocate space for three bytes initialized with 11, 23, 49. At the same time define TABLE which have the address where 11 is stored
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Macros I I
Used to repeat sequences of instructions several times It is not used procedures because they can slow the program down
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Macros I I
Used to repeat sequences of instructions several times It is not used procedures because they can slow the program down Can you say the parts required for a macro definition?
MOV MOV MOV MOV
EAX,P EBX,Q Q,EAX P,EBX
MOV MOV MOV MOV
EAX,P EBX,Q Q,EAX P,EBX
SWAP
MACRO MOV EAX,P MOV EBX,Q MOV Q,EAX MOV P,EBX ENDM SWAP SWAP
(a)
(b)
Figure 7-4. Assembly language code for interchanging P and Q twice. (a) Without a macro. (b) With a macro.
Assembly Proc.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
Macros In the next table it can be appreciated a comparison of macros and procedures 2222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 Item Macro call Procedure call 21 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 When is the call made? 21 222222222222222222222222222222222222222222222222222222222222222222222222222 1 During assembly 1 During execution 1 1 Is the body inserted into the object 1 Yes 1 No 1 1 program every place the call is 1 1 1 1 1 1 1 made? 21 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 Is a procedure call instruction 1 No 1 Yes 1 1 inserted into the object program 1 1 1 1 1 1 1 and later executed? 21 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 Must a return instruction be used 1 No 1 Yes 1 1 1 1 after the call is done? 21 222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1 1 1 How many copies of the body ap1 One per macro call 1 1 1 pear in the object program? 12222222222222222222222222222222222222222222222222222222222222222222222222222 1 1 1
Figure 7-5. Comparison of macro calls with procedure calls.
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Assembly Process
I
Two-Pass Assembler. It is used because there are labels in the code. Then with one pass it is not possible to assembly all the code
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Assembly Process
I
Two-Pass Assembler. It is used because there are labels in the code. Then with one pass it is not possible to assembly all the code * Forward reference Problem. When a symbol has been used before it has been defined
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Assembly Process
I
Two-Pass Assembler. It is used because there are labels in the code. Then with one pass it is not possible to assembly all the code * Forward reference Problem. When a symbol has been used before it has been defined
I
In the first pass it read the symbols to build up a table called symbol table
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
The Assembly Process
I
Two-Pass Assembler. It is used because there are labels in the code. Then with one pass it is not possible to assembly all the code * Forward reference Problem. When a symbol has been used before it has been defined
I
In the first pass it read the symbols to build up a table called symbol table
I
In the pass two is generated the object program
Intro
Instruction Set
Instruction Format
Addressing
Procedure
Assembly Intro.
Macros
Assembly Proc.
References
A. S. Tanenbaum. Structured Computer Organization (5th Edition). Prentice Hall, 5 edition, June 2005. Here are more resource you can use to extend your knowledge in assembly language I
http://www.masm32.com/
I
http://www.nasm.us/ Related:
I
The Art of ASSEMBLY LANGUAGE PROGRAMMING http://www.arl.wustl.edu/~lockwood/class/cs306/books/ artofasm/toc.html
I
http://www.codecortex.com/ide/