energies Article
Smoothly Transitive Fixed Frequency Hysteresis Current Control Based on Optimal Voltage Space Vector Jiang Zeng 1 , Lin Yang 1 , Yuchang Ling 1 , Haoping Chen 2 , Zhonglong Huang 1 , Tao Yu 1 Bo Yang 3, * 1
2 3
*
ID
and
School of Electric Power, South China University of Technology, GuangZhou 510640, China;
[email protected] (J.Z.);
[email protected] (L.Y.);
[email protected] (Y.L.);
[email protected] (Z.H.);
[email protected] (T.Y.) Dongguan Power Supply Bureau, Dongguan 523000, China;
[email protected] Faculty of Electric Power Engineering, Kunming University of Science and Technology, Kunming 650500, China Correspondence:
[email protected]
Received: 29 May 2018; Accepted: 26 June 2018; Published: 1 July 2018
Abstract: This paper proposes a smoothly transitive fixed frequency hysteresis current control (ST-FHCC) scheme applied to an active power filter (APF). First of all, a switching fixed frequency hysteresis current control (S-FHCC) is introduced, which is based on phase-to-phase decoupling and switching the control strategies under mode 0 or mode 1, and its weakness is described in detail. To enhance it, an improved approach of regulating the hysteresis bandwidth is presented to fix the switching frequency with switch phases being regulated, based on the optimal voltage space vector (OVSV). Furthermore, a flexible division of the voltage-space-vectors diagram is developed to divide the original voltage-space-vectors diagram into six sub-regions, upon which the control strategies under mode 0 and mode 1 can be switched alternately in order to obtain a smooth transition. As a consequence, ST-FHCC can thoroughly avoid the inherent weakness of S-FHCC of switching that is not smooth as a result of the low control accuracy of current errors. Case studies are carried out through power systems computer aided design/electromagnetic transients including DC (PSCAD/EMTDC) while simulation results verify the effectiveness and superiority of ST-FHCC compared to S-FHCC. Keywords: active power filter; smoothly transitive fixed frequency hysteresis current control; optimal voltage space vector; voltage-space-vectors diagram
1. Introduction In the past decade, distributed generation (DG), including wind, hydro, solar, biomass, geothermal, tidal, fuel cell, has been widely deployed which can provide a powerful solution for the growing energy crisis resulting from the use of conventional fossil fuels, e.g., coal, gas, oil [1–8]. The integration of large-scale DG into the power grid will inevitably degrade power quality [9–11], in which harmonics due to adoption of converters of DG have a severe impact on the devices connected to the power system, which has gained enormous attention in recent year [12,13]. At present, the active power filter (APF) is one of the most effective tools for harmonics reduction [14], which usually adopts hysteresis current control (HCC) to realize an efficient harmonics compensation thanks to its elegant merits of simple implementation, high accuracy and fast response [15]. Generally speaking, there are two types of HCC: fixed bandwidth HCC (BHCC) and fixed frequency HCC (FHCC). Here, the fluctuation of switching frequency of BHCC often causes an Energies 2018, 11, 1695; doi:10.3390/en11071695
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unfavorable increase of switching losses, which will result in considerable noise and a difficulty in filter design [16–18]. To handle the above issue, FHCC has been developed to fully suppress the fluctuation of switching frequency via an accurate bandwidth regulation [19,20]. Hence, FHCC has become a major technique for the current control of various power system devices, e.g., an uninterruptible power supply (UPS), motor, converter, APF, etc. So far, an enormous variety of control schemes for FHCC has been designed. In [21], an FHCC without bandwidth was reported with the features of simple control, easy implementation in a digital way, robustness to the filter inductor, and excellent steady and dynamic performance, in which the hysteresis band is cancelled, and the switching frequency is fixed by adjusting online the sampling period while accurate system parameters are required. By comparison, [21,22] presented a constant-frequency hysteresis current control without a hysteresis bandwidth for a grid-connected voltage source inverter with the concept of formulating the switching function for dictating the switching times of the switches in the inverter within a predefined switching period by predicting the current reference, system dynamic behavior, and past time. The technique retains the benefit of the hysteresis control having fast dynamic response and tackles the drawback of the standard hysteresis control having variable switching frequency. In [23], a variable-bandwidth hysteresis-modulation sliding-mode control was presented to realize the pulse frequency modulation, which utilizes a direct hysteresis modulation sliding-mode controller to perform the pulse width modulation (PWM), and employs a quasi-indirect sliding-mode controller to control the bandwidth of the hysteresis modulation. By using this method, the control circuit is of low cost and is simple, together with satisfactory transient and steady responses. Besides, [24] employed a fuzzy logic controller to facilitate the discarding of uncertainty in the APF by incorporating an adaptive fuzzy hysteresis band, which has a quite simple structure and is relatively easy to implement in practice. Moreover, [25] proposed a constant hysteresis-band current controller with lower fixed switching frequency by adding a zero mode control at a proper time, such that the hysteresis bandwidth and switching frequency can be simultaneously fixed via the use of an extra k-band to create a degree of freedom. Furthermore, [26] proposed a current-error space-vector-based hysteresis controller with online boundary computation, which possesses the advantage that its phase voltage frequency spectrum is similar to that of a fixed switching frequency space vector pulse width modulated (SVPWM) inverter. In [27], the switching frequency control process was further improved by fine tuning the hysteresis bandwidth variations, such that the zero crossings of the phase-leg current errors could be synchronized with a fixed reference clock to achieve a nearest space vector switching sequence, as well as to ensure an optimal switched output spectrum. In addition, [28] devised a mixed-signal hysteretic current controller with the digital voltage-loop and the analog current-loop, such that a robust stability and parameter-insensitive current ripple were achieved by asynchronous error-voltage sampling, together with a fixed switching frequency via the real-time bandwidth adaptation. Besides, in [29], a new fixed frequency space-vector hysteresis-band current control was presented to maintain the switching frequency constant through the voltage vectors associated with the estimated outer hysteresis-band, which not only retains most benefits of BHCC but also offers a fixed switching frequency and independent interphases. In particular, the author of this paper previously proposed a switching fixed frequency hysteresis current control (S-FHCC) based on an optimal voltage space vector (OVSV), which can increase the amplification gain of DC-link voltage with respect to the line currents of APF. It can also enhance the tracking accuracy of the current reference and decrease the power losses of the power electronic switches [30,31]. Nevertheless, the current error of the APF will exceed the limit when the voltage reference space vector crosses the boundary of the adjacent sub-regions, which generally produces a periodical surge of current error that often undesirably degrades the current tracking accuracy [30,31]. In order to overcome the above obstacle, this paper proposes a smoothly transitive fixed frequency hysteresis current control (ST-FHCC) scheme based on OVSV. Firstly, S-FHCC is introduced based on phase-to-phase decoupling and switching the control strategies under mode 0 or mode 1, which requires an inner and outer hysteresis comparator. One of its weakness is that the control
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strategies will be switched only if current errors exceed the limit of the outer hysteresis bandwidth. Then, an improved approach of regulating the hysteresis bandwidth is presented to fix the switching frequency with switch phases being regulated, based on OVSV. Furthermore, a flexible division of the voltage-space-vectors diagram is designed to divide the original region into six sub-regions. By adopting the flexible division, the control strategies under mode 0 and mode 1 can be switched alternately. Lastly, comprehensive case studies are undertaken to evaluate and compare the control performance of S-FHCC and ST-FHCC. The original contribution and novelty of this paper can be summarized into the following three aspects:
•
•
•
The paper considers an APF in a three-phase-three-wire power system, in which FHCC is developed instead of the one given by [32–34]. Under such a configuration, the voltage between neutral point and dc-link midpoint of the APF results in a strong control coupling of three-phase, which has a dramatic impact on regulation of hysteresis bandwidth and fixed frequency. Hence phase-to-phase decoupling is implemented to eliminate the voltage, such that the two phase-to-phase current errors can be independently controlled by two switches with the third switch being a constant; Compared to [33,34], an improved approach of variable hysteresis bandwidth is presented in this paper, of which the midpoint of switch signals in the state of 0 is synchronized to the clock pulse with a constant frequency. Meanwhile, the equation is given to calculate the hysteresis bandwidth in the next period according to that in the current period. With this approach, fixed frequency and regulation of switch phases can be obtained simultaneously, such that the switching frequency can be constant while the uncontrollable phase-to-phase current error can be reduced greatly. A flexible division of the voltage-space-vector diagram is developed to divide the original voltage-space-vectors diagram into six sub-regions, upon which the control strategies under mode 0 and mode 1 can be switched alternately. As a result, a smooth transition can be realized while the inherent weakness of S-FHCC can be avoided, e.g., the control strategies will be switched only if current errors exceed the limit of the outer hysteresis bandwidth. The switching is far smoother with higher control accuracy and smaller current errors in ST-FHCC than those in S-FHCC.
The remainder of this paper is organized as follows: Section 2 aims to introduce the principle of S-FHCC. In Section 3, an approach of the variable hysteresis bandwidth is presented. ST-FHCC is described in detail in Section 4. Case studies are presented in Section 5 while some discussions about the results generated is given in Section 6. The work presented in the paper and some concluding remarks/findings are summarized in Section 7. 2. Switching Fixed Frequency Hysteresis Current Control (S-FHCC) 2.1. Active Power Filter (APF) Model Figure 1 shows an equivalent circuit of a three-phase APF. Here, Sa , Sb and Sc represent three switching functions and 1 or 0 are used to represent their states, respectively. Here, 1 means the upper leg is turn-on and the lower leg is turn-off, while 0 means the opposite state. E is the DC-link capacitor voltage. R and L are resistor and inductor connected to the inverter bridge with the power grid. u0 is the voltage between neutral point and ground. ua , ub , uc are phase a, phase b and phase c terminal voltage with respect to the neutral point of inverter bridge O, while ia , ib ic are phase a, phase b and phase c line currents, respectively.
Energies 2018, 11, 1695 Energies 2018, 11, x FOR PEER REVIEW
+ E/2 E/2
1 sa 0 1 0
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ua
ia
sb ub 1 uc 0 sc o
ib ic
R
L
+ + + -
u0
Figure Figure1.1. Equivalent Equivalentcircuit circuitof ofaathree-phase three-phaseactive activepower powerfilter filter(APF). (APF).
The decoupling decoupling of of phase-to-phase phase-to-phase currents currents is is required required to to obtain obtain S-FHCC S-FHCC [30], [30], such such that that the the The dynamicsof ofcurrent currenterror errorcan canbe bewritten writtenwith withaavoltage-space-vector. voltage-space-vector.Ignore Ignorethe theresistance, resistance,yields yields dynamics
di ∗ * d∆i LL =uu −uu dtdt
(1) (1)
where∆i Δiisisthe thedifference differencebetween betweenthe theline linecurrent currentspace spacevector vectorreference referencei*i*and andline linecurrent currentspace space where * * vector i;i;uuisisaavoltage-space-vector; voltage-space-vector;and anduu isisaavoltage-space-vector voltage-space-vector reference reference corresponding corresponding to to ii**,, vector respectively.Expand Expand(1) (1)into into respectively. d∆i ab = u ∗ − ( S a − Sb ) · E L ddt iab ab* u∗ ab ( S a Sb ) E bc LL d∆i (2) dt = ubc − (Sb − Sc ) · E dt d∆i L dcaibc= u∗ca*− (Sc − Sa ) · E (2) L dt ubc ( Sb Sc ) E dt where u∗ab , u∗bc , u∗ca are the line voltage of phase ab, phase bc, phase ca, respectively. references dica ∆iab , ∆ibc , ∆ica are given by * c Sa ) E L dt∆iab=ucai∗ab−( Siab ∗ −i (3) ∆ibc = ibc bc * * * ∗ − where uab , ubc , uca are the line voltage references phase ab, phase bc, phase ca, respectively. ∆ica = iof i ca ca Δiab∗ , Δi∗bc, Δi ca are given by ∗ where i ab , ibc , ica are the phase-to-phase current references of phase ab, phase bc, phase ca, and iab , ibc , * ica are the differences between ia and ib , ib and , respectively. iiabc , ic and iab iaiab From Equation (2), one can see that the phase-to-phase current errors are only determined by the ibc ibc* ibc (3) corresponding two-phase switches, thus a decoupled current control could be realized. For instance, * ica ica by icaSa and Sc , respectively. A similar control set Sb = 0 or 1 and ∆iab and ∆ibc can be controlled strategy* can be derived when Sa or Sc are set to be a constant. Therefore, as shown in Figure 2, * * where iab, ibc, ica are the phase-to-phase current references of phase ab, phase bc, phase ca, and iab, ibc, ica the voltage-space-vectors diagram can be divided into three parallelogram regions, each of which is are the differences between ia and ib, ib and ic, ic and ia, respectively. denoted to be either mode 0 (one of the three switches Sa , Sb or Sc is fixed to be 0 while the others are From Equation (2), one can see that the phase-to-phase current errors are only determined by the arbitrary) or mode 1 (one of the three switches Sa , Sb or Sc is fixed to be 1 while the others are arbitrary). corresponding two-phase switches, thus a decoupled current control could be realized. For instance, The detailed control strategies under mode 0 and mode 1 in different parallelogram regions are set Sb = 0 or 1 and Δiab and Δibc can be controlled by Sa and Sc, respectively. A similar control strategy given by Table 1. can be derived when Sa or Sc are set to be a constant. Therefore, as shown in Figure 2, the voltagespace-vectors can be divided into three parallelogram each0 of which Tablediagram 1. Control strategies in different parallelogram regionsregions, under mode and mode is 1. denoted to be either mode 0 (one of the three switches Sa, Sb or Sc is fixed to be 0 while the others are arbitrary) or Regions mode 1 (one of the threeMode switches Sa, Sb or Sc is fixed to be 1 while the others 0 Regions Modeare 1 arbitrary). P01 P02 P03
Sa = 0 Sb = 0 Sc = 0
Sb controls ∆iab Sc controls ∆ibc Sa controls ∆ica
Sc controls ∆ica Sa controls ∆iab . Sb controls ∆ibc
P11 P12 P13
Sa = 1 Sb = 1 Sc = 1
Sb controls ∆iab Sc controls ∆ibc Sa controls ∆ica
Sc controls ∆ica Sa controls ∆iab . Sb controls ∆ibc
110
P01
ab
Ⅱ
110
P12 Ⅱ
P11 Ⅲ Ⅰ Ⅰ 011 V0 V1 a 111 111 V0 V1 a Energies 2018, 11, 1695 5 of 20 000 000 V7 100 V7 V4 Energies V 2018, 5 of 20 100 4 11, x FOR PEER REVIEW Ⅳ Ⅳ * * Ⅵ Ⅵ ubc 0 ubc 0 P02 * Ⅴ u* 0 Ⅴuab 0 ab b P13 b * * V3 010 V2 V6 u *uab 0 001 0 V3 010 V2 V6 uca*uab 001 0 101 110 101 110 ca 0 P 12 V 5 V 5 P01 c * c uca* 0 uⅡ ca 0 Ⅱ P11 P03 * * ubc 0 (b) ubc 0 Ⅲ Ⅰ Ⅲ (a) Ⅰ 011 under (a)Vmode 0 V1 a 011 2. Voltage-space-vectors 111 V0 V1division Figure diagram obtained 0111 and (b) mode 1. a 000 000 V7 100 V7 V4 100 V4 Ⅳ Ⅳ *mode 1 in different * detailed control The strategies under mode 0 and parallelogram regions are Ⅵ Ⅵ ubc 0 ubc 0 P 02 given by Table 1. Ⅴ Ⅴ P13 * * Table001 1. Control strategies inV different regions and mode V6 u1. 001under mode 0101 6 u parallelogram 0 ca 101 ca 0 V5 V5 c * c Regions Regions u *Mode 0 1 uMode 00 u 0 011 * bc
P03
* ubc 0
Ⅲ
ca
ca
P01 Sa = 0 Sb controls Δiab Sc controls Δica P11 Sa = 1 Sb controls Δiab Sc controls Δica (a) Δibc Sa controls Δiab. (b) Δibc Sa controls Δiab. P02 Sb = 0 Sc controls P12 Sb = 1 Sc controls P03 Figure Sc = 2. 0 Voltage-space-vectors Sa controls Δica Sb controls bc Pobtained 13 Scunder =1 S a controls Δica controls diagramΔi division (a) mode 0 and (b)Sbmode 1. Δibc Figure 2. Voltage-space-vectors diagram division obtained under (a) mode 0 and (b) mode 1.
2.2. S-FHCC and Itscontrol Weakness The detailed strategies under mode 0 and mode 1 in different parallelogram regions are 2.2. S-FHCC and Its Weakness given Table 1.[30,31], two hysteresis comparators employed in S-FHCC are depicted by Figure 3. In by literature In literature [30,31], two hysteresis comparators in S-FHCC depicted Figure The inner hysteresis comparator is adopted to detectemployed whether the current are error exceedsbythe inner3. Table 1. Control strategies in different parallelogram regions under mode 0 and mode 1. The inner hysteresis comparator is adopted to detect whether the current error exceeds the inner bandwidth while the outer hysteresis comparator is used to detect whether the current error exceeds bandwidth while the which outer hysteresis comparator is Regions used to detect whether the current error exceeds the outer bandwidth, is larger such that the location Regions Mode 0 than the inner bandwidth, Mode 1 of u* could be the outer bandwidth, which is larger than the inner bandwidth, such that the location of u* could determined. P01 Sa = 0 Sb controls Δiab Sc controls Δica P11 Sa = 1 Sb controls Δiab Sc controls Δica be determined. P02 Sb = 0 Sc controls Δibc Sa controls Δiab. P12 Sb = 1 Sc controls Δibc Sa controls Δiab. P03
Sc = 0
Sa controls Δica
Sb controls Δibc Outer hysteresis comparator
2.2. S-FHCC and Its Weakness
P13
Sc = 1
Sa controls Δica
Sb controls Δibc
Se
In literature [30,31], two hysteresis comparators employed in S-FHCC are depicted by Figure 3. i signal the current error exceeds the inner 2hadopted The inner hysteresis comparator is to detect Clock whether i S the current error exceeds Phase bandwidth while the outer hysteresis comparator is used to Determining detect whether lock the switches the outer bandwidth, which is larger than the inner bandwidth, such that the location of u* could be 2h e determined. Si
Outer Inner hysteresis comparator hysteresis comparator
Se Figure 3. Switching fixed frequency hysteresis current control (S-FHCC). Figure 3. Switching fixed frequency hysteresis current control (S-FHCC). Clock signal 2hi i S of Phase Determining InFigure Figure 3, 3, SSi iand andSSeeare arelogic logicvectors vectorscalculated calculated byreversing reversing theoutputs outputs ofthe theinner innerhysteresis hysteresis In by the lock the switches i e i e comparatorand and the the outer outer hysteresis hysteresis comparator comparator while while 2h 2h and and 2h 2h are aretheir theirhysteresis hysteresisbandwidth, bandwidth, comparator 2h e
respectively. In In addition, addition, SS represents represents the switching vector, given by respectively. Si
Sa =
e Se Si Sbc ca ca
e
+ Se S Si
ab bc ab Inner e i e e e i hysteresisS comparator b = Sca S ab S ab + Sbc Sca Sbc e
e
i
e
e
(4)
i
Sc =frequency Sab Sbc Sbchysteresis + Sca S abcurrent Sca Figure 3. Switching fixed control (S-FHCC). Note that 3, the location u* can be determined byreversing the signsthe of outputs the threeofline-to-line voltage In Figure Si and Se areoflogic vectors calculated by the inner hysteresis ∗ ∗ ∗ e references, , uouter , which is comparator indicated by S . Besides, the phase aims atbandwidth, fixing the e are bc , ucahysteresis comparatori.e., andu ab the while 2hi and 2h theirlock hysteresis
respectively. In addition, S represents the switching vector, given by
Sa Sbc Sca Sca Sab Sbc Sab Sb Scae Sabe Sabi Sbce Scae Sbci Sc S S S S S S e ab
Energies 2018, that 11, 1695 Note the
e bc
i bc
e ca
e ab
(4)
i ca
6 of 20 location of u* can be determined by the signs of the three line-to-line voltage
references, i.e., u*ab ,
u*bc , u*ca , which is indicated by Se. Besides, the phase lock aims at fixing the
switchingfrequency frequencyof ofAPF APFwith withaaproportional-integral proportional-integral(PI) (PI)controller. controller.More Moredetails detailsof ofthe theS-FHCC S-FHCC switching can be found in references [30,31] for interested readers. can be found in references [30,31] for interested readers. Nevertheless, an an inherent inherent weakness weakness of of S-FHCC S-FHCC isis that that the the change change of of the thelocation location of ofuu* * can can be be Nevertheless, detected only if one of the three current errors exceeds the limit of the corresponding outer hysteresis detected only if one of the three current errors exceeds the limit of the corresponding outer hysteresis bandwidth,such suchthat thatthe thecontrol controlstrategy strategy changed. instance, when u* moves from region VI bandwidth, areare changed. ForFor instance, when u* moves from region VI to to region I shown by Figure 4a, the control strategy in region (Sc controls Δibc while Sa controls Δiab) region I shown by Figure 4a, the control strategy in region VI (SVI c controls ∆ibc while Sa controls ∆iab ) is is still adopted with the fact that Δi bc will increase continuously despite the value of Sc until the current still adopted with the fact that ∆ibc will increase continuously despite the value of Sc until the current error∆i Δibc exceeds exceeds the the limit limit of of the the outer outer hysteresis hysteresis comparator, comparator,as asclearly clearlyprovided providedin inFigure Figure4b. 4b. error bc V2 P03
V0 V7
Inner hysteresis bandwidth
II
Sc=0; Sa controls Δica; Sb controls Δibc
Ⅰ
u*
Ⅵ
ibc
2H
V1 Only if Sc lost the control of Δibc, such that Δibc exceed the limit of the outer hysteresis comparator
Sb=0; Sc controls Δibc; Sa controls Δiab.
P02
Outer hysteresis bandwidth
V6
t Sc
Changing the control strategy
1 0
(a)
(b)
Figure4.4.The Thelimit limitexceeding exceedingof ofcurrent currenterror errorresulted resultedby bythe thetransition transitionofofu*. u*.(a) (a)uu* *moves movesfrom fromregion region Figure VIto toregion regionI;I;(b) (b)current currenterror errorexceeds exceedsthe thelimit. limit. VI
FixedSwithcing SwithcingFrequency FrequencyBased Basedon onOptimal OptimalVoltage VoltageSpace SpaceVector Vector(OVSV) (OVSV) 3.3.Fixed Sincethe theuncontrollable uncontrollable current error is negative the negative sum thetwo other two phase-to-phase Since current error is the sum of the of other phase-to-phase current current errors under control, e.g., Δi ab = −(Δibc + Δica), Δibc and Δica should be as close as possible in errors under control, e.g., ∆iab = −(∆ibc + ∆ica ), ∆ibc and ∆ica should be as close as possible in amplitude amplitude and to in each other phase in order to theof amplitude of the Δiabhysteresis . Thus, the and opposite to opposite each other phase in in order to decrease thedecrease amplitude ∆iab . Thus, hysteresis is bandwidth fix switching to of regulate the phaseswitches. of two bandwidth required toisfixrequired switchingtofrequency and tofrequency regulate theand phase two controllable controllable switches. Moreover, an approach of fixing switching frequency with switch phases being Moreover, an approach of fixing switching frequency with switch phases being regulated is presented regulated is presented such that the signals midpoint of switching in the state is synchronized such that the midpoint of switching in the state of 0 signals is synchronized to of the0 clock pulse with to a the clock pulse with a constant frequency, which is demonstrated as follows. constant frequency, which is demonstrated as follows. Assume uu** isis in inregion regionPP02,, shown shown in in Figure Figure 2.2. ItIt can canbe beseen seenthat thatSScand andSSacan canindependently independently Assume c a 02 * control∆i Δibc and and ∆i Δiab,, respectively. u* changes slightly during a switching period under high switching control bc ab respectively. u changes slightly during a switching period under high switching frequency, which could be ignored. Hence, the current increases or decreases with frequency, which could be ignored. Hence, the current error error increases or decreases linearlylinearly with respect respect to time. The process of fixing the switching frequencies of S a and Sc with switch phases being to time. The process of fixing the switching frequencies of Sa and Sc with switch phases being regulated regulated are depicted in Figure 5, by which the current error will cross the zero-point of the clock are depicted in Figure 5, by which the current error will cross the zero-point of the clock pulse in each pulse in each switching period. As a result, the switching frequencies of Sa and Sc remain constant, switching period. As a result, the switching frequencies of Sa and Sc remain constant, which is equal to which is equal to that of the clock pulse. More importantly, the phases of Sa and Sc are regulated to that of the clock pulse. More importantly, the phases of Sa and Sc are regulated to be almost opposite. be almost opposite. According to Figure 5, in order to synchronize the clock pulse and the midpoint of the switch signals in the state of 0, the hysteresis bandwidths must satisfy:
(
hk h + h k +1 h + ∆t) + k + k+1 = Ts 2hk /T2 2hk /T1 2hk /T2
(5)
where hk and hk+1 are the hysteresis bandwidth in the current switching period and in the next switching period; T1 and T2 denote the durations of the switch signal that stayed at 1 and 0 in the current switching period; Ts is a given switching period; and ∆t is the difference between the midpoint of switch signal and clock pulse, respectively.
Sc
1 Ts
0 t
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iab
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0
In S-FHCC, the adopted voltage-space-vectors are not optimal when the three-phase switches operate without regulating the phase of switches. In contrast, regulating the phase of switches cannot a only decreaseScurrent error and harmonics, but can also lead to an OVSV. For example, when u* is in region I under mode 0, the waveforms of Sa , Sb , Sc and the sequence of voltage-space-vectors are (V0 , V1 , V2 , V3 , V0 ) without regulating the phase of switches, as shown Figure 5. Phase of switches is regulated. in Figure 6a. Moreover, this also demonstrates that the currents are controllable in the whole parallelogram region denoted by P03 . However, there are three OVSVs, i.e., V0 , V1 , V2 , and one According to Figure 5, in order to synchronize the clock pulse and the midpoint of the switch suboptimal voltage-space-vector, i.e., V3 , in the adopted control set of voltage-space-vectors {V0 , V1 , signals in the state of 0, the hysteresis bandwidths must satisfy: V2 , V32018, } [30,31], which cannot all be optimal. Energies 11, x FOR PEER REVIEW 7 of 20 Clock pulse 1
(
hk h h 1 h 1 t ) k kThe currentk error crosses Ts the 2Hysteresis hk / T2 bandwidth 2hk / T1 zero 2hkof/clock T2 pulse 2
3
(5)
4
where hk and hk+1 are the hysteresis bandwidth in the current switching period and in the next ibc 2h4that stayed at 1 and 0 in the 2 durations of 2hthe 3 switching period;2hT1 1 and T2 denote 2h the switch signal 0 current switching period; Ts is a given switching period; and Δt is the difference between the midpoint of switch signal and clock pulse, respectively. In S-FHCC, 1the adopted voltage-space-vectors are not optimal when the three-phase switches Sc regulating the phase of switches. In contrast, regulating the phase of switches cannot operate without Ts 0 only decrease current error and harmonics, but can also lead to an OVSV. t For example, when u* is in region I under mode 0, the waveforms of Sa, Sb, Sc and the sequence iab of voltage-space-vectors are (V0, V1, V2, V3, V0) without regulating the phase of switches, as shown in Figure 6a.0 Moreover, this also demonstrates that the currents are controllable in the whole parallelogram region denoted by P03. However, there are three OVSVs, i.e., V0, V1, V2, and one suboptimal voltage-space-vector, i.e., V3, in the adopted control set of voltage-space-vectors {V0, V1, V2, V3} [30,31], Sa which cannot all be optimal. With switch phases regulated, the waveforms of Sa, Sb, Sc and the operation sequence of voltagespace-vectors are (V0, V1, V2, V1, V0), as shown in Figure 6b. Since region I belongs to the Figure Phase ofswitches switchesisisregulated. regulated. Figure parallelogram region, the current error5.5.isPhase also of controllable in the region I. Furthermore, the adopted control set of voltage-space-vectors {V0, V1, V2} is all optimal. According to Figure 5, in order to synchronize the clock pulse and the midpoint of the switch signals in the state of 0, the hysteresis bandwidths must satisfy:
Sa
Sb
Sa
h h h h ( k t ) k k 1 k 1 Ts 2hk / T2 2hk /STb1 2hk / T2
(5)
V1 V2 V V0 Vand V3 V0 in Sthe V2 bandwidth where hk and current switching period in the next 0 1 0 theVhysteresis 1 Sc hk+1Vare c switching period; T1 and T2 denote the durations of the switch signal that stayed at 1 and 0 in the (a) (b) current switching period; Ts is a given switching period; and Δt is the difference between the midpoint of6. switch signal and clock pulse, respectively. Figure 6. Operation sequences switches and voltage-space-vectors variation. (a) voltage-spaceFigure Operation sequences of of switches and voltage-space-vectors variation. (a) voltage-space-vectors vectors operation without phase regulation; (b) optimal voltage space vector (OVSV) operation switches with In S-FHCC, the adopted voltage-space-vectors are not optimal when the three-phase operation without phase regulation; (b) optimal voltage space vector (OVSV) operation with phase regulation. operate without regulating the phase of switches. In contrast, regulating the phase of switches cannot phase regulation. only decrease current error and harmonics, but can also lead to an OVSV. * is in region I under mode 0, the waveforms of Sa, Sb, Sc and the sequence For example, With switch when phasesu regulated, the waveforms of Sa , Sb , Sc and the operation sequence of of voltage-space-vectorsare are(V(V,0,VV,1, V V2,, V V3,, V 0) without regulating the phase of switches, as shown voltage-space-vectors 0 1 2 1 V0 ), as shown in Figure 6b. Since region I belongs to in Figure 6a. Moreover, this also demonstrates that the currents are controllable in the theadopted whole the parallelogram region, the current error is also controllable in the region I. Furthermore, parallelogram region denoted by P{V 03. However, there are three OVSVs, i.e., V0, V1, V2, and one control set of voltage-space-vectors 0 , V1 , V2 } is all optimal. suboptimal voltage-space-vector, i.e., V3, in the adopted control set of voltage-space-vectors {V0, V1, V2, V3} [30,31], which cannot all be optimal. With switch phases regulated, the waveforms of Sa, Sb, Sc and the operation sequence of voltagespace-vectors are (V0, V1, V2, V1, V0), as shown in Figure 6b. Since region I belongs to the parallelogram region, the current error is also controllable in the region I. Furthermore, the adopted control set of voltage-space-vectors {V0, V1, V2} is all optimal. Sa
Sa
Sb
Sb
4. Smoothly Transitive Fixed-Frequency Hysteresis Current Control (ST-FHCC) 4.1. Flexible Division of Voltage-Space-Vector Diagram To2018, prevent the Energies 11, 1695
current error from exceeding its limit illustrated by Figure 4b, one should switch 8 of 20 between mode 0 and mode 1. As shown in Figure 7a, the inherent weakness can be thoroughly overcome if the control strategy under mode 0 (Sb = 0, Sc → Δibc, Sa → Δiab) is switched into the control 4. Smoothly Transitive Fixed-Frequency Hysteresis Current Control (ST-FHCC) strategy under mode 1 (Sa = 1, Sb → Δiab, Sc → Δica) before u* crosses the boundary VI-I. Similarly, mode 14.1. should beDivision switched into mode 0 beforeDiagram u* crosses the boundary I-II. The reason is that in the Flexible of Voltage-Space-Vector overlapping area, two of the three current errors are always controllable, and the switching between the1 current exceeding itsdescribes. limit illustrated by Figure 4b,to one should switch modeTo0 prevent and mode will noterror lead from to what Figure 4b Therefore, in order smoothly transit between mode 0 and mode 1. As shown in Figure 7a, the inherent weakness can be thoroughly the boundaries of the three parallelogram regions under mode 0 or mode 1, the control strategies overcome if the control strategy under 0 (Sb = Sc → ∆ibc , Sa → areas ∆iab ) isofswitched the control under mode 0 and mode 1 should bemode switched in0,the overlapping the two into parallelogram * ∆iab , Sc → ∆ica ) before u crosses the boundary VI-I. Similarly, strategyunder undermode mode0 1and (Sa mode = 1, Sb1,→ regions respectively. modeMore 1 should be switched into mode before u* crosses boundary I-II. The in the * specifically, before u crosses0the boundary VI-I,the mode 0 is switched intoreason mode is 1. that Moreover, overlapping area, of the three errors sequence are alwaysofcontrollable, and the switching between when u* crosses thetwo boundary VI-I,current the operation voltage-space-vectors varies from S16 to mode 0 and mode 1 will not lead to what Figure 4b describes. Therefore, in order to smoothly transit S11, where S16 and S11 represent the operation sequences of (V7, V6, V1, V6, V7) and (V7, V2, V1, V2, V7), the boundaries of the parallelogram regions mode 0 or 1, theatcontrol strategies under respectively. With u* three crossing the boundary VI-I,under the duration of mode Sb staying 0 decreases gradually mode 0isand modeto1 that should switched the overlapping of theof two parallelogram regions which contrary of Sbe c staying at 0,insuch that a smoothareas transition three-phase switches can under mode 0 and mode 1, respectively. be realized, as shown from Figure 7b. V2 P03
Sc=0; Sa controls Δica; Sb controls Δibc
II
Ⅰ
V0
P11
T1 V1 Ts
V1
V7
Sa V7
Sa=1; Sb controls Δiab; Sc controls Δica
Sb
Sb=0; Sa controls Δiab; Sc controls Δibc
Sc
V1
V7 V7
V1
V7
V2 V2
V6 V6
*
u
Ⅵ
T6 P02 Ts
V6 V6
(a)
(b)
Figure and the the operation operation of of three-phase three-phase switches. switches. (a) (a) u u** Figure 7. 7. Smooth Smooth transition transition of of voltage-space-vectors voltage-space-vectors and moves region VI VI to to region region I;I; (b) (b) the the operation operation process process of of the the three-phase three-phase switches. switches. moves from from region
Remark 1. u* can be composed according to volt-second balance when u* is located in region VI, as More specifically, before u* crosses the boundary VI-I, mode 0 is switched into mode 1. Moreover, T T Tof voltage-space-vectors varies from S16 when u* crosses the boundary VI-I, the* operation sequence u 7 V7 6 V6 1 V1 (6) to S11 , where S16 and S11 represent the operation sequences Ts Ts Ts of (V7 , V6 , V1 , V6 , V7 ) and (V7 , V2 , V1 , * V2 , V7 ), respectively. With u crossing the boundary VI-I, the duration of Sb staying at 0 decreases ’ where T’0 iswhich the duration of V7; toT’6that denotes duration of such V6 while denotes the durationofof three-phase V1; and Ts is gradually is contrary of Scthe staying at 0, thatTa1 smooth transition the switching switches can period. be realized, as shown from Figure 7b. With u* crossing the boundary VI-I, T’6 will decrease while T’1 will increase, which show that Remark 1. u* can composedgradually according which to volt-second balance whenofu*Scisinlocated in7b. region VI, as when u* the duty-cycle of Sbeb narrows is contrary to that Figure Moreover, is just located in the boundary VI-I, T1 is equals to 0, which shows that the duty-cycle of Sb is equal to T06 T0 1 T07 that of Sc. After u* crosses the boundary, u∗ = u* will V7 be + composed V6 + of V (6) Ts Ts Ts 1
T
T
T
0 7 where T00 is the duration of V 7 ; T60 denotes the u*the duration V7 of2 VV 1 TV 6 2while 1 1denotes the duration of V 1 ; and Ts is(7) Ts Ts Ts switching period.
where T’2 is* the duration of V2. With u crossing the boundary VI-I, T60 will decrease while T10 will increase, which show that the With u* changing continuously, T’2 will increase while T’1 will decrease, which illustrates that duty-cycle of Sb narrows gradually which is contrary to that of Sc in Figure 7b. Moreover, when u* is the duty-cycle of Sb decrease further which is contrary to that of Sc in Figure 7b. just located in the boundary VI-I, T1 is equals to 0, which shows that the duty-cycle of Sb is equal to that of Sc . After u* crosses the boundary, u* will be composed of u∗ =
T07 T2 0 T0 V7 + V2 + 1 V1 Ts Ts Ts
(7)
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where T20 is the duration of V2 . * changing Energies 2018,u11, x FOR PEER REVIEW 9 ofthe 20 With continuously, T20 will increase while T10 will decrease, which illustrates that duty-cycle of Sb decrease further which is contrary to that of Sc in Figure 7b. The The three three parallelogram parallelogram regions regions under under mode mode 00 and and those those under under mode mode 11 can can produce produce six six overlapping areas, i.e., I-VI, as depicted in Figure 2. The control strategies under mode 0 (mode 1) overlapping areas, i.e., I-VI, as depicted in Figure 2. The control strategies under mode 0 (mode should be switched into those underunder mode 1mode (mode1 0)(mode in these areas, for two controllable 1) should be switched into those 0)overlapping in these overlapping areas, for two current errors are always under control by two switches in these overlapping areas. Hence, a controllable current errors are always under control by two switches in these overlapping areas. switching boundaryboundary needs to be set intoeach overlapping area in order to in switch thebetween control Hence, a switching needs be set in each overlapping area orderbetween to switch strategies under mode 0 and those under mode 1 in the overlapping areas. On the one hand, the the control strategies under mode 0 and those under mode 1 in the overlapping areas. On the one voltage-space-vectors diagram can be divided into six symmetric sub-regions, e.g., A to F, in Figure hand, the voltage-space-vectors diagram can be divided into six symmetric sub-regions, e.g., A to F, 8a. Two different modes are modes adopted toadopted two adjacent sub-regions. The regions The A, Cregions and E are in Figure 8a. Twocontrol different control are to two adjacent sub-regions. A, controlled by mode 1 while regions B, D and E are controlled by mode 0. Under such a scenario, thea C and E are controlled by mode 1 while regions B, D and E are controlled by mode 0. Under such current will noterror exceed limit in the symmetrical division can scenario,error the current willitsnot exceed itsdivision limit in boundaries. the division Besides, boundaries. Besides, symmetrical offer a fast and accurate of hysteresis bandwidth and bandwidth phase. The detailed control division can offer a fastregulation and accurate regulation of hysteresis and phase. Thestrategies detailed are tabulated in Table 2. control strategies are tabulated in Table 2. * uab 0
b
* uab 0
b
* uab 0
u 0 * ab
Sb=1
u 0 * bc
Sc=0
C
B
Sa=0 D * ubc 0
u 0
u*
Sc=1
C
* ubc 0
F
B F
Sc=1
uca* 0
Sb=0
uca* 0
c
uca* 0
uca* 0 (a)
a
A Sa=1 E
Sb=0
c
Sc=0
Sa=0 D
a
A Sa=1 E
Sb=1
* bc
(b)
Figure with mode Figure 8. 8. The The flexible flexible division division of of the the voltage-space-vectors voltage-space-vectors diagram diagram combined combined with mode 00 and and mode mode 1. (a) Symmetry division; (b) asymmetry division. 1. (a) Symmetry division; (b) asymmetry division. Table 2. The strategies based based on on the the flexible flexible division. division. Table 2. The detailed detailed control control strategies
Sub-Regions Sub-Regions A A B B C C D D EE FF
Sa = 1 SSac = = 10 Sc = 0 Sb = 1 Sb = 1 = 00 SSaa = S c = Sc 1 SSbb = = 00
Control Strategy Control Strategy Sb controls Δiab Sc controls Δica controls ∆i controls ∆i SSabcontrols Δiabca SSbccontrols Δicabc Sa controls ∆ica Sb controls ∆ibc Sa controls Δiab Sc controls Δibc Sa controls ∆iab Sc controls ∆ibc SSb controls Δiab SScccontrols Δicaca controls ∆i b controls ∆iab SSaacontrols Δi ca S b controls Δibcbc controls ∆ica Sb controls ∆i S controls ∆i S controls ∆i Saacontrols Δiabab Scccontrols Δibcbc
On Onthe theother otherhand, hand,the thevoltage-space-vectors voltage-space-vectorsdiagram diagramcan canalso alsobe bedivided divided more more flexibly flexibly and and even even asymmetrically in ST-FHCC, as illustrated by Figure 8b. Note that such a division provides more asymmetrically in ST-FHCC, as illustrated by Figure 8b. Note that such a division provides more margins forswitching switchingcontrol control strategies, which is to due the fact that even isifa there a slight margins for strategies, which is due theto fact that even if there slight is estimation * * estimation of u , the current errors are control. still under control. error of u , error the current errors are still under 4.2. Switching of the Control Strategies in S-FHCC As illustrated in Figure 9a, the operation sequence of voltage-space-vectors varies from S06 to S01 with u* crossing from region VI to I, where S06 and S01 denote the operation sequences of (V0, V1, V6, V1, V0) and (V0, V1, V2, V1, V0), respectively. In S06 or S01, u will be V0, V1, V6, V1, V0 or V0, V1, V2, V1, V0 in sequence in a switching period. Consider that u* is approximated to be a constant in a switching
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period,2018, the11, derivatives Energies 1695
of Δi with respect to the time are obtained from Equation (1) and depicted in 10 of 20 Figure 9b, where (dΔi1/dt), (dΔi2/dt), (dΔi3/dt) are the derivatives of Δi with respect to the time with u equal to V0, V1, V6, respectively. Assume the initial Δi is zero to simplify the analysis. Δi will change 4.2. Switching of the StrategiesofinΔiS-FHCC in the directions of Control the derivatives with respect to the time in sequence. There are trajectories of Δi inAs a solid line and in a dotted line corresponding with 06 and S01, as clearly shown by Figure 9c. illustrated in Figure 9a, the operation sequence ofSvoltage-space-vectors varies from S06 to Moreover, the trajectories of Δi will gradually change from S06 into with u* changing. * S01 with u crossing from region VI to I, where S06 and S01 denote theS01 operation sequences of (V0 , V1 , order to achieve a smooth switching of current error, the ideal switching point should be the V6 , VIn 1 , V0 ) and (V0 , V1 , V2 , V1 , V0 ), respectively. In S06 or S01 , u will be V0 , V1 , V6 , V1 , V0 or V0 , V1 , zero-crossing of current according to Consider Figure 9c,that such three-phase to switches can switch V2 , V1 , V0 in sequence in errors a switching period. u* that is approximated be a constant in a smoothly. switching period, the derivatives of ∆i with respect to the time are obtained from Equation (1) and Based on the 9b, above analysis, the switching determined by detecting current depicted in Figure where (d∆i1 /dt), (d∆i2 /dt),point (d∆i3 is /dt) are the derivatives of ∆iwhether with respect to error exceeds the limit of the outer hysteresis bandwidth or not. In other words, the switching point the time with u equal to V0 , V1 , V6 , respectively. Assume the initial ∆i is zero to simplify the analysis. cannot be selected the zero-crossing point of current errors, which usually in a low control ∆i will change in theasdirections of the derivatives of ∆i with respect to the time results in sequence. There are accuracy and an unstable switching of three-phase switches that will affect the fixed-frequency trajectories of ∆i in a solid line and in a dotted line corresponding with S06 and S01 , as clearly shown control and switches of phase. by Figure 9c.regulation Moreover, of thethe trajectories ∆i will gradually change from S into S with u* changing. 06
01
Sa Sb Sc
V0 V1 V6 V1 V0
V0 V1 V2 V1 V0
(a)
Im V2
di1 dt
di2 dt
Im
Sb=0 Sc=0
I V0
L
di1 dt
u* VI V6
V1 Re di2 L dt di3 L dt
(b)
di3 dt Ideal switching point
di2 dt
Re di1 dt
(c)
Figure9.9.The Theideal idealswitching switching point S-FHCC. operation sequence of voltage-space-vectors Figure point in in S-FHCC. (a) (a) thethe operation sequence of voltage-space-vectors and and three-phase switches; (b) the derivatives of Δi with respect to time; (c) switches three-phase switches; (b) the derivatives of ∆i with respect to time; (c) three-phasethree-phase switches operation. operation.
In order to achieve a smooth switching of current error, the ideal switching point should 4.3. Smooth Switching of the Control Strategies in ST-FHCC be the zero-crossing of current errors according to Figure 9c, such that three-phase switches can Insmoothly. ST-FHCC, when u* crosses the division boundary, the switching time of each phase is used to switch determine thethe u* location at first. the Then, the zero-crossing point of current errors (according to the Based on above analysis, switching point is determined by detecting whether current * location and preclock signal) is chosen as the switching point of mode 0 and mode 1 based on the u error exceeds the limit of the outer hysteresis bandwidth or not. In other words, the switching point dividedbevoltage-space-vectors diagram, suchofthat a smooth of current andcontrol threecannot selected as the zero-crossing point current errors,switching which usually resultserrors in a low phase switches can be realized. accuracy and an unstable switching of three-phase switches that will affect the fixed-frequency control and regulation of the switches phase.
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4.3. Smooth Switching of the Control Strategies in ST-FHCC In ST-FHCC, when u* crosses the division boundary, the switching time of each phase is used to determine the u* location at first. Then, the zero-crossing point of current errors (according to the clock signal) is chosen as the switching point of mode 0 and mode 1 based on the u* location and pre-divided voltage-space-vectors diagram, such that a smooth switching of current errors and three-phase can be realized. Energies 2018, 11,switches x FOR PEER REVIEW 11 of 20 * For example, when u crosses from region A to B, the operation sequence of voltage-space-vectors Forfrom example, u* crosses A tothe B, the operation sequence varies S11 towhen S01 , where S11 from and Sregion operation sequences ofof (Vvoltage-space-vectors 01 denote 7 , V2 , V1 , V2 , V7 ) and varies S 11 to S 01 , where S 11 and S 01 denote the operation sequences of (V 7 , V 2 ,by V1Figure , V2, V710a, ) andwhere (V0, (V0 , Vfrom , V , V , V ), respectively. The trajectories of current errors are depicted 1 2 1 0 Vα10, ,Vα21, ,Vα12, ,Vα07), are respectively. The trajectories currentto errors depicted by Figure 10a, α20,, αV1,7 , the derivatives of ∆i withofrespect timeare under the operations of Vwhere 0 , V1 , V αrespectively. 2, α7 are the derivatives of Δi with point respect to time the operations of Vof 0, V 1, V2, Verrors 7, respectively. The ideal switching should beunder the zero-crossing point current based on The point should be the zero-crossing point of currentcan errors based on the clock signalin the ideal clockswitching signal in practice with the result that three-phase switches switch smoothly, as shown inFigure practice 10b.with the result that three-phase switches can switch smoothly, as shown in Figure 10b.
Clock 1
Sa
2
2
V1 V2
V7
V2 V1 V 0 V 1 V2 V1
V0
Sb
1
Sc
0
iab
7
Switching point
Sa=1 Sc=0
ibc
ica
(a)
(b)
Figure Figure10. 10.The Thecontrol controlmode modeswitching switchingininthe thezero-crossing zero-crossingpoint pointofofcurrent currenterrors. errors.(a) (a)Current Currenterrors errors changes smoothly (S 01:solid line; S11: dotted line); (b) operation of three-phase switches. changes smoothly (S :solid line; S : dotted line); (b) operation of three-phase switches. 01
11
4.4. 4.4.Detailed DetailedProcedure ProcedureofofST-FHCC ST-FHCC The Thedetail detailprocedure procedureofofST-FHCC ST-FHCCisisdepicted depictedby byFigure Figure11. 11.The Thethree threehysteresis hysteresiscomparators comparatorsare are set to output 0 when the current errors exceed their upper bandwidths while set to set to output 0 when the current errors exceed their upper bandwidths while set tobe be11when whenthe the current currenterrors errorsexceed exceedtheir theirlower lowerbandwidths. bandwidths. The following example illustrates the process of obtaining the ST-FHCC in detail. When u* is located in region A, Sa is fixed to be 1, and Sb controls ∆iab while Sc controls ∆ica . According to Equation (2), ∆iab will increase when Sb stays at 1 while ∆iab will decrease when Sb stays at 0. On the contrary, ∆ica will decrease when Sc stays at 1 while ∆iab will increase when Sc stays at 0. If the hysteresis comparator 1 outputs 1, it means that ∆iab exceeds the lower bandwidth of the hysteresis comparator and needs to be increased. Thus, S1 should be assigned to Sb . Similarly, if the hysteresis comparator 3 outputs 1, it means that ∆ica exceeds the lower bandwidth of the hysteresis comparator and needs to be increased. Thus, S3 should be assigned to Sc . Consequently, Table 3 can be obtained. Table 3. The relationship between S1 , S2 , S3 and Sa , Sb , Sc . The Location of u*
A
B
C
D
E
F
The relationships
Sa = 1 Sb = S1 Sc = S3
Sa = S 3 Sb = S2 Sc = 0
Sa = S1 Sb = 1 Sc = S2
Sa = 0 Sb = S1 Sc = S3
Sa = S3 Sb = S2 Sc = 1
Sa = S1 Sb = 0 Sc = S2
Figure 11. The overall smoothly transitive fixed frequency hysteresis current control (ST-FHCC) procedure.
changes smoothly (S01:solid line; S11: dotted line); (b) operation of three-phase switches.
4.4. Detailed Procedure of ST-FHCC The detail procedure of ST-FHCC is depicted by Figure 11. The three hysteresis comparators are set to 0 when the current errors exceed their upper bandwidths while set to be 1 when Energies output 2018, 11, 1695 12 ofthe 20 current errors exceed their lower bandwidths.
Figure 11. overall smoothly transitive fixed frequency hysteresishysteresis current control (ST-FHCC) Figure 11. The The overall smoothly transitive fixed frequency current control procedure. procedure. (ST-FHCC)
The following the process of obtaining the ST-FHCC in detail. According to Saexample , Sb , and Sillustrates c , ∆ha , ∆hb , and ∆hc can be obtained by solving Equation (5), respectively. * u is ∆i located in region A, Sa is fixed to be 1, and Sb controls Δiab while Sc controls Δica. SinceWhen Sb controls ab while Sc controls ∆ica , ∆hb should be the bandwidth of hysteresis comparator 1 to According to Equation (2), Δiab willtoincrease when b stays at 1 while Δiab will decrease when Sb stays limit ∆iab , such that ∆hb is assigned ∆h1 while ∆hcSshould be the bandwidth of hysteresis comparator at 0. On the contrary, Δi ca will decrease when Sc stays at 1 while Δiab will increase when Sc stays at 0. 3 to limit ∆ica , such that ∆hc is assigned to ∆h3 . Therefore, Table 4 can be obtained. If the hysteresis comparator 1 outputs 1, it means that Δiab exceeds the lower bandwidth of the Table 4. The relationship between ∆ha , ∆hb , ∆hc and ∆h1 , ∆h2 , ∆h3 . The Location of u*
A or D
B or E
C or F
The relationships
∆h1 = ∆hb ∆h2 = * ∆h3 = ∆hc
∆h1 = * ∆h2 = ∆hb ∆h3 = ∆ha
∆h1 = ∆ha ∆h2 = ∆hc ∆h3 = *
‘*’ means the hysteresis bandwidth can be set to an arbitrary constant.
Remark 2. The outer hysteresis comparator employed in S-FHCC is no longer required in ST-FHCC. The control strategy under mode 0 (mode 1) is switched into that under mode 1 (mode 0) in the overlapping areas produced by the parallelogram regions of mode 0 and those of mode 1, as two controllable current errors are always under control by two switches in the overlapping areas. Therefore, the current errors will not exceed the larger bandwidth of the outer hysteresis comparator with the switching procedures of ST-FHCC implemented. Furthermore, the outer hysteresis comparator is no longer required to switch the control strategies in ST-FHCC.
5. Case Studies The effectiveness of ST-FHCC is evaluated and compared with that of S-FHCC [30] by power systems computer aided design/electromagnetic transients including DC (PSCAD/EMTDC). The test system is given by Figure 12, in which the APF is used to compensate the harmonic currents produced by the rectifier and the DC motor, while the system parameters are given as Ls = 0.001 H, LL = 0.003 H, Lf = 0.0125 H, Rd = 37 Ω, Ld = 0.015 H, uc = 800 V. The root-mean-square (RMS) of phase-to-phase voltage us is 380 V and the switching frequency of APF is 10 kHz. In addition, ia , ib , ic are the line
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currents of APF; iLa , iLb , iLc are the line currents of the non-linear load; isa , isb , isc denote the line currents Energies x FOR PEER REVIEW 13 of 20 supplied by2018, the11,three-phase power grid, respectively. Energies 2018, 11, x FOR PEER REVIEW
Ls Ls us us
13 of 20
isa isa isb iisbsc isc
iLa iLa iLb iiLb Lc iLc
LL LL
ia ia ib iibc ic
Lf Lf
Ld Ld Rd Rd
+ +
uc
- uc -
APF APF Figure modelwith with APF. Figure12. 12. Simulation Simulation model APF. Figure 12. Simulation model with APF.
5.1. Effect The Effect of Harmonics Compensationin in ST-FHCC ST-FHCC 5.1. The of Harmonics Compensation
5.1. The Effect of Harmonics Compensation in ST-FHCC Figure 13a,b show the load current of phase a and the system current of ST-FHCC after the Figure 13a,b show the load current of phase a and the system current of ST-FHCC after the Figurecompensation, 13a,b show the load demonstrate current of phase a and the system current of ST-FHCC after harmonics which that the harmonic current produced by the load canthe be harmonics compensation, which that theharmonic harmonic current produced byload the load harmonics whichdemonstrate demonstrate that the current produced the becan be effectively compensation, compensated. Moreover, Figure 13c illustrates that the current error ofbyphase a is can under effectively Moreover, Figure 13cA. illustrates that current error of phase a is under effectively compensated. Moreover, Figure 13c illustrates that thethe current of phase adistortion is under control compensated. which is bounded between −0.8 A to 0.8 Figure 13d shows that theerror total harmonic control which is bounded between − 0.8 A to 0.8 A. Figure 13d shows that the total harmonic distortion control whichof is ibounded between −0.8 tofrom 0.8 A. Figure 13d shows total harmonic distortion (THD) value sa is reduced dramatically 24.43 to 5.01% after that isa isthe compensated by APF. (THD) value of isa 24.43toto5.01% 5.01% after isacompensated is compensated by APF. (THD) value of is isa reduced is reduceddramatically dramatically from from 24.43 after isa is by APF.
(a) (a)
(b) (b)
ils Deta ils Deta
(c) (c)
(d) (d)
Figure 13. Load current, current supplied by power system after compensation, and current error of Figure Load current, current of supplied power system after compensation, and current of phase a13. between actual current phase aby and its reference. (a) current iLa; (b) current isa; (c)error current Figure 13. Load current, current supplied by power system after compensation, and current error of phase a between actual current and reference. ; (b)itscurrent isa; (c) current error of phase a between actual;of (d)phase THDsa of iLa its and isa current(a) ofcurrent phase aiLaand reference. phase a between actual current of phase a and its reference. (a) current iLa ; (b) current isa ; (c) current error of phase a between actual; (d) THDs of iLa and isa current of phase a and its reference.
error of phase a between actual; (d) THDs of iLa and isa current of phase a and its reference.
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5.2. The Performance of the Current Errors Errors in in S-FHCC S-FHCC The current error error ∆i Δiab ab obtained by S-FHCC is given in Figure 14a, which shows that the control strategy is discontinuous with mode 1. When S-FHCC switches fromfrom Sa = S 1ato= S1b to = 1, strategy is discontinuous with mode 1. When S-FHCC switches Sbthe = 1,phase-to-phase the phase-tocurrent error ∆ierror the limit,the i.e.,limit, 2 A, of the2outer Here, FigureHere, 14b enlarges phase current Δiab exceeds i.e., A, ofhysteresis the outercomparator. hysteresis comparator. Figure ab exceeds the obtained near 0.0238 s, innear which it can S-FHCC can that only S-FHCC be switched 14bresults enlarges the results obtained 0.0238 s, be in found whichthat it can be found canafter onlythe be current error exceeding the limit of the outer hysteresis comparator. During the switching, the transient switched after the current error exceeding the limit of the outer hysteresis comparator. During the process of current error phase and three-phase operation is disordered,switches which greatly affects switching, the transient process of current switches error phase and three-phase operation is the control ofwhich switching frequency andcontrol the switches phase. frequency and the switches phase. disordered, greatly affects the of switching
(a)
(b) Figure 14. 14. The The performance performance of of the the current current errors errors obtained obtained by by S-FHCC. S-FHCC. (a) (a) ∆i Δiab obtained obtained by S-FHCC; Figure by S-FHCC; ab (b) detailed current errors when Δi ab exceeds its limit. (b) detailed current errors when ∆iab exceeds its limit.
5.3. The Performance of the Current Errors in ST-FHCC Figure 15a provides the changes of the phase-to-phase current error Δiab and the hysteresis bandwidth obtained during 0.02 s to 0.03 s, whose detailed variation is clearly shown by Figure 15b obtained during 0.0254 s to 0.0258 s.
From Figure 15a, one can observe that the current error Δiab is uncontrollable in region E (Sc = 1) and B (Sc = 0) while it becomes controllable in region F (Sb = 0) and A (Sa = 1), in which Sa controls Δiab in region F and Sb controls Δiab in region A. Meanwhile, Figure 15a shows that the hysteresis Energies 2018, 11, of 20 bandwidth is1695 regulated continuously to fix the switching frequency in the region where 15 Δiab is controllable. From Figure 15b, it can be seen that the switching frequency is constant while the midpoint of 5.3. The Performance of the Current Errors in ST-FHCC two controllable switches in the state of 0 is synchronized to the clock signals, which results in an uncontrollable error to beofsmaller than that of the others. This∆iis that Δica Figure 15acurrent provides theeven changes the phase-to-phase current error andreason the hysteresis ab the satisfies theobtained equation: Δica =0.02 −(Δisabto+ 0.03 Δibc),s, and moreover, ab and Δi are asshown close as in bandwidth during whose detailed Δi variation isbcclearly by possible Figure 15b amplitude and opposite other obtained during 0.0254 s to to each 0.0258 s. in phase.
(a)
(b) Figure 15. 15. The the current current errors errors obtained obtained by by ST-FHCC. ST-FHCC. (a) (a) ∆i Δiab and and bandwidth bandwidth Figure The performance performance of of the ab obtained by ST-FHCC; (b) detailed current errors at the switching point. obtained by ST-FHCC; (b) detailed current errors at the switching point.
In particular, at the zero-crossing point of current errors near 0.02565 s, ST-FHCC switches from From Figure 15a, one can observe that the current error ∆iab is uncontrollable in region E (Sc = 1) Sb = 0 (Sa controls Δiab and Sc controls Δibc) to Sa = 1 (Sb controls Δiab and Sc controls Δica), which and B (Sc = 0) while it becomes controllable in region F (Sb = 0) and A (Sa = 1), in which Sa controls ∆iab corresponds to the analysis of Table 2. Moreover, the current errors and operation of three-phase in region F and Sb controls ∆iab in region A. Meanwhile, Figure 15a shows that the hysteresis bandwidth switches can change smoothly before and after the switching. is regulated continuously to fix the switching frequency in the region where ∆iab is controllable. In addition, Figure 16 depicts the three-phase switching times by counting how three-phase From Figure 15b, it can be seen that the switching frequency is constant while the midpoint of switch signals rise and fall during 0 s–0.06 s. One of the three-phase switches does not operate in two controllable switches in the state of 0 is synchronized to the clock signals, which results in an Region E, F, A and B, which is denoted by the horizontal straight lines. The operation times of the uncontrollable current error even to be smaller than that of the others. This is the reason that ∆ica phase-C switch can be calculated as 20,147 times per second during 0.02 s–0.03 s. As shown by Figure satisfies the equation: ∆ica = −(∆iab + ∆ibc ), and moreover, ∆iab and ∆ibc are as close as possible in 15b, the phase-C switch operates twice during a clock-pulse period due to the regulating phases of amplitude and opposite to each other in phase. In particular, at the zero-crossing point of current errors near 0.02565 s, ST-FHCC switches from Sb = 0 (Sa controls ∆iab and Sc controls ∆ibc ) to Sa = 1 (Sb controls ∆iab and Sc controls ∆ica ),
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which corresponds to the analysis of Table 2. Moreover, the current errors and operation of three-phase switches can change smoothly before and after the switching. In addition, Figure 16 depicts the three-phase switching times by counting how three-phase switch signals rise and fall during 0 s–0.06 s. One of the three-phase switches does not operate in Region E, F, A and B, which is denoted by the horizontal straight lines. The operation times of the phase-C switchEnergies can be calculated as REVIEW 20,147 times per second during 0.02 s–0.03 s. As shown by Figure 2018, 11, x FOR PEER 16 of 2015b, Energies 2018, 11, x FOR PEER REVIEW 16 of 20 the phase-C switch operates twice during a clock-pulse period due to the regulating phases of the the switches. Therefore, the switching frequency is 10,073.5 Hz. Besides, the switching frequencies of of switches. Therefore, the switching frequency is 10,073.5 Hz. Besides, the switching frequencies the the switching is 10,073.5 Besides, the switching frequencies the of theswitches. phase-A Therefore, and the phase-C switchesfrequency can be calculated as Hz. an approximate 10 kHz. Furthermore, the phase-A and the phase-C switches can be calculated as an approximate 10 kHz. Furthermore, the phase-A and the frequencies phase-C switches can be calculated as an approximate 10 kHz. Furthermore, the average switching of three-phase can be evaluated as an approximated 10 kHz even the average switching frequencies ofthree-phase three-phase can be evaluated as an approximated 10 kHz even average switching frequencies of can be evaluated as an approximated 10 kHz even during 0 s–0.06 s. To summarize, the switching frequency can remain constant at 10 kHz by ST-FHCC. during 0 s–0.06 s. Tos. summarize, the canremain remain constant atkHz 10 kHz by ST-FHCC. during 0 s–0.06 To summarize, theswitching switching frequency frequency can constant at 10 by ST-FHCC.
Details Details
(0.0289,391) (0.0289,391) (0.0221,254) (0.0221,254)
Figure ST-FHCCperformance. performance. Figure 16.16. ST-FHCC Figure 16. ST-FHCC performance.
5.4. The Trajectories of Current Errors by S-FHCC and ST-FHCC 5.4. The of Current Errors byby S-FHCC 5.4.Trajectories The Trajectories of Current Errors S-FHCCand andST-FHCC ST-FHCC Figure 17a,b compares the switching trajectories of the current error space-vector of S-FHCC and Figure 17a,b17a,b compares the switching trajectories the current error space-vector of S-FHCC Figure compares the switching trajectories error S-FHCC and and ST-FHCC, respectively. One can see that ST-FHCC of hasthe nocurrent disorder of space-vector current errorof when switched ST-FHCC, respectively. One can see that ST-FHCC has no disorder of current error when switched ST-FHCC, see thatS-FHCC ST-FHCC has no disorder of current when at therespectively. zero-crossing One point.can In contrast, presents a significant disorder of error current error switched when the zero-crossing point. contrast, S-FHCC presents presents aasignificant disorder of current errorerror whenwhen switched at the point. zero-crossing point. S-FHCC at theatzero-crossing In In contrast, significant disorder of current switched at zero-crossing the zero-crossing point. switched at the point.
(a) (a)
(b) (b)
Figure 17. The trajectory of the current error space-vector in the switching point. (a) S-FHCC; (b) STFigure 17. The trajectory of the current error space-vector in the switching point. (a) S-FHCC; (b) STFigureFHCC. 17. The trajectory of the current error space-vector in the switching point. (a) S-FHCC; FHCC.
(b) ST-FHCC. Lastly, from Figure 18a,b, one can find that ST-FHCC can achieve a more stable and smoother Lastly, from Figure 18a,b, can find that ST-FHCC can achieve a more stable and smoother current error compared to thatone of S-FHCC. current error compared to that of S-FHCC.
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Lastly, from Figure 18a,b, one can find that ST-FHCC can achieve a more stable and smoother 17 of 20 current error compared to that of S-FHCC.
Energies 2018, 11, x FOR PEER REVIEW
(a)
(b)
Figure Figure 18. 18. The Thevectorgraph vectorgraph of of the the current current error. error. (a) (a) S-FHCC; S-FHCC; (b) (b) ST-FHCC. ST-FHCC.
6. Discussions 6. Discussions Note that the proposed approach of variable hysteresis bandwidth is different from the Note that the proposed approach of variable hysteresis bandwidth is different from the • conventional one, which is derived from a simplified single-phase model of a power system with conventional one, which is derived from a simplified single-phase model of a power system APF [32–34]. In the ST-FHCC, the hysteresis bandwidth in the next switching period is derived with APF [32–34]. In the ST-FHCC, the hysteresis bandwidth in the next switching period is from the hysteresis bandwidth in the current period according to Equation (5), which is obtained derived from the hysteresis bandwidth in the current period according to Equation (5), which is in a way that the midpoint of switch signals in the state of 0 is accurately synchronized to the obtained in a way that the midpoint of switch signals in the state of 0 is accurately synchronized clock pulse with a constant frequency, which can simultaneously realize a fixed frequency and to the clock pulse with a constant frequency, which can simultaneously realize a fixed frequency a regulation of switch phases. In other words, two controllable current errors controlled by two and a regulation of switch phases. In other words, two controllable current errors controlled by switches will cross the zero point of the clock pulse accurately. As a result, the two operated two switches will cross the zero point of the clock pulse accurately. As a result, the two operated switches will always operate twice during two clock pulses. Hence, the switching period will be switches will always operate twice during two clock pulses. Hence, the switching period will equal to that of the clock pulse. Besides, the phases of two controllable current errors will be be equal to that of the clock pulse. Besides, the phases of two controllable current errors will opposite while the two corresponding switches will be symmetrical with the switch phases be opposite while the two corresponding switches will be symmetrical with the switch phases regulated, as depicted in Figure 5. Since Δiab + Δibc + Δica = 0, the uncontrollable current error will regulated, as depicted in Figure 5. Since ∆iab + ∆ib c + ∆ica = 0, the uncontrollable current error decrease dramatically. In addition, the operated voltage-space-vectors will all be optimal. will decrease dramatically. In addition, the operated voltage-space-vectors will all be optimal. S-FHCC is based on the division of three parallelogram regions in Figure 2, and the control • S-FHCC is based on the division of three parallelogram regions in Figure 2, and the control strategies under mode 0 or mode 1 will be switched only if the current errors exceed the limit of strategies under mode 0 or mode 1 will be switched only if the current errors exceed the limit of the outer hysteresis bandwidth, which cannot be avoided, as illustrated in Figure 4. In contrast, the outer hysteresis bandwidth, which cannot be avoided, as illustrated in Figure 4. In contrast, ST-FHCC is based on the flexible division of six sub-regions in Figure 8, and the control ST-FHCC is based on the flexible division of six sub-regions in Figure 8, and the control strategies strategies under mode 0 and mode 1 are switched alternatively by considering the location of u*. under mode 0 and mode 1 are switched alternatively by considering the location of u* . The reason The reason is that two controllable current errors are always under control by two switches no is that two controllable current errors are always under control by two switches no matter what matter what control strategy under mode 0 or mode 1 is adopted in the overlapping areas control strategy under mode 0 or mode 1 is adopted in the overlapping areas produced by the produced by the parallelogram regions of mode 0 and those of mode 1. Thus, one can switch the parallelogram regions of mode 0 and those of mode 1. Thus, one can switch the control strategy control strategy under mode 0 (or mode 1) into that under mode 1 (or mode 0) at the zerounder mode 0 (or mode 1) into that under mode 1 (or mode 0) at the zero-crossing of current crossing of current errors in the overlapping areas in order to smoothly transit the boundary errors in the overlapping areas in order to smoothly transit the boundary determined by the three determined by the three parallelogram regions under mode 0 (or mode 1), as shown by Figure parallelogram regions under mode 0 (or mode 1), as shown by Figure 7b. As a consequence, 7b. As a consequence, the current errors will not exceed the limit of the outer hysteresis the current errors will not exceed the limit of the outer hysteresis comparator and the outer comparator and the outer hysteresis comparator is no longer required. hysteresis comparator is no longer required. 7. Conclusions In this paper, an ST-FHCC has been developed for APF. An improved approach to regulate the hysteresis bandwidth has been presented to obtain the fixed frequency and the regulation of switch phases based on OVSV. To enhance S-FHCC, a flexible division of the voltage-space-vectors diagram has been proposed and the control strategies under mode 0 and mode 1 are switched alternatively to
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7. Conclusions In this paper, an ST-FHCC has been developed for APF. An improved approach to regulate the hysteresis bandwidth has been presented to obtain the fixed frequency and the regulation of switch phases based on OVSV. To enhance S-FHCC, a flexible division of the voltage-space-vectors diagram has been proposed and the control strategies under mode 0 and mode 1 are switched alternatively to obtain a smooth transition, which can avoid the inherent weakness of S-FHCC and improve the control accuracy of current errors. Case studies have been carried out through PSCAD/EMTDC to compare the advantages of ST-FHCC over S-FHCC. The main results and conclusions of this paper can be summarized by the following three points: (a)
(b)
(c)
The switching frequency remains constant at 10 kHz in ST-FHCC. Moreover, the operation of voltage-space-vectors is improved via regulating the switch phases, such that the uncontrollable current error is significantly reduced and the operative voltage-space-vectors are all optimal. A flexible division of the voltage-space-vectors diagram is proposed which divides the original diagram into six sub-regions, upon which mode 0 and mode 1 are switched alternately and smoothly. As a consequence, the inherent weakness of S-FHCC can be thoroughly overcome, e.g., the control strategies under mode 0 or mode 1 will be switched only if current errors exceed the limit of the outer hysteresis bandwidth. Comprehensive simulation results verify that ST-FHCC can achieve a smoother, smaller, as well as more stable current error in comparison with that of S-FHCC. A future study will apply ST-FHCC on a real APF to validate its implementation feasibility.
Author Contributions: Preparation of the manuscript has been performed by J.Z., L.Y., Y.L., H.C., Z.H., T,Y. and B.Y. Funding: This research was funded by the National Natural Science Foundation of China (51477055,51777078). Conflicts of Interest: The authors declare no conflict of interest.
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