Douglas Pucknell, Basic VLSI Design Systems and Circuits, Prentice Hall PTR
2000. • Neil Weste & Kamran Eshrangian, Principles of CMOS VLSI Design, ...
SRM UNIVERSITY Faculty of Engineering and Technology DEPARTMENT OF EIE Course Code Course Title Year& Semester Course duration Location
: EI0310 : VLSI Design and Embedded Systems : VI : Jan-May 2014 (Even semester) : Tech park
Faculty Details: Name of the staff
Section
Office
Office Hours
Mail ID
Vijayan.K
EIE A &C
Tech park
[email protected]
Mydhili.Pavuluri
EIE B
Tech park
8.30am 4.00pm 8.30am 4.00pm
[email protected]
Required Text Books:
Wayne Wolf, Modern VLSI Design (System on Silicon), Prentice Hall PTR 2000 Michael John Sabestian Smith, Application Specific Integrated circuits, 2002 Douglas Pucknell, Basic VLSI Design Systems and Circuits, Prentice Hall PTR 2000 Neil Weste & Kamran Eshrangian, Principles of CMOS VLSI Design, Addison Wesley, 2nd edition 1998 Jacob Baker, Harry, David E.Boyce, CMOS Circuit Design, Layout and Simulation, Prentice Hall India 1998
Web Resource: www.en.wikipedia.org/wiki/VLSI_engineering Objective: The students will be able to understand the techniques
MOS device operation, fabrication and designing gates Circuits using MOS transistors and Programmable logic devices Basics of Embedded system software Introduction to RTOS Introduction to Microcontrollers
Tentative test details and portions: Cycle Test - I: 17.02.14 Cycle Test –II: 5.03.14 Model Exam: 15.04.14
Unit I & II Unit III & IV All five units
Assessment details: Cycle test-I Cycle test-II Model exam Surprise test Attendance Total
10 marks 10 marks 20 marks 5marks 5 marks 50marks
Outcomes: Students who have successfully completed this course Study of MOS technology and circuits.
Gain knowledge of Layout and digital Circuits.
Understanding of ASIC
Purpose FPGA
Knowledge of Faults
The students will be able to understand the types of MOS, their properties and their design with stick diagrams The Students will be able to analyze scaling in MOS, pass transistor, Supper Buffer, Clocking Strategies, PLA and PAL design. The students will have a broad knowledge in Floor planning, Placement and routing. The Students will be able to acquire knowledge about FPGA The students can acquire a clear knowledge of testability, controllability and observability of the model,
Detailed Session Plan: DAY NAME OF THE TOPICS UNIT-I 1 Digital systems and VLSI
REFERENCE 1. Douglas A. Pucknell, Basic VLSI Design
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
19 20 21 22 23 24 25 26 27 27 28 29 30 31 32 33 34 35 36
CMOS Technology Bipolar technologies MOS circuits electrical properties Integrated Circuit Design Techniques Transistors and Layout Fabrication Process of nMOS Fabrication process of CMOS Stick diagram and Layout Design Rules UNIT-II Introduction to Logic Gates Combinational Logic Functions and Static Complementary Gates Wires and Delays, Switch Logic Alternative Gate Circuits Combinational Logic Networks Layout Design Methods Combinational Network Delay Cross Talk - Power Optimization Switch Logic Networks - Combinational Logic Testing. UNIT-III Sequential Machines Latches and Flipflops Sequential system and Clocking discipline Sequential System Design - Power Optimization Design Validation - Sequential Testing Subsystem design - Combinational Shifters Adders- ALU Multipliers High Density Memory UNIT-IV Introduction Application Specific Integrated Circuits Types of ASIC Design Flow of VLSI Types of Simulation Programmable ASIC Floor planning - Placement Placement Routing Partitioning
Systems and Circuits, Prentice Hall of India, 1993 2. Wayne Wolf, Modern VLSI Design (System on Silicon), Prentice Hall PTR 2000
1. Douglas A. Pucknell, Basic VLSI Design Systems and Circuits, Prentice Hall of India, 1993 2. Wayne Wolf, Modern VLSI Design (System on Silicon), Prentice Hall PTR 2000
1. Douglas A. Pucknell, Basic VLSI Design Systems and Circuits, Prentice Hall of India, 1993 2. Wayne Wolf, Modern VLSI Design (System on Silicon), Prentice Hall PTR 2000
1. Wayne Wolf, Modern VLSI Design (System on Silicon), Prentice Hall PTR 2000 2. Michael John Sabestian Smith, Application Specific Integrated circuits, 2002
37 38 39 40 41 42 43 44 45
UNIT-V Introduction Types of PLD, FPLA FPGA Architecture Fault Models - Stuck-at-Faults Design for testability Design for controllability Design for absorvability LFSR - Boundary Scan Techniques.
1. Michael John Sabestian Smith, Application Specific Integrated circuits, 2002
