(from the Illiac IV to the Intel Paragon). If we relax the topology constraint stating that processors have to be arranged in a 2D grid, perfect load balancing can be ...
Laboratoire de l’Informatique du Parall´elisme
SPI
´ Ecole Normale Sup´erieure de Lyon Unit´e Mixte de Recherche CNRS-INRIA-ENS LYON no 8512