Steuerplatine Technikerarbeit 2009/2010 - Mikrocontroller.net

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21.02.2010 22:46:08 C:\Users\Martin\Techniker\JAT\Steuerplatine\DDS- Funktionsgenerator.sch (Sheet: 1/1). Steuerplatine Technikerarbeit 2009/2010.
VCC

2,2µF +15V

V1/2 &

6

5

1

9 3

470nH L6

14

V1/+UB

74132N

100nF

74132N V1/3 &

7

C24

12

VCC

DGND

100nF DGND

DGND

+

1mH

L1

0.1µF

+15V

AGND

AGND

C12

P9

COUT CLK

P6

LO

RST

P5

W1

100nF +5V C13

HO WO

L1

P3

P13

SOUT

H1

P2

P14

VCC

VB

P1

DS1867

8

R16

AGND SQR

22R

74132N V1/4 &

13k

3

C11 2

100nF

P4 W1

P11 P12

+15V R7

7

P7

VDD

GND

R2

100nF

AGND U1 LT1227 R3 6 5

8 4

DQ

150k

AGND

SIN/TRI

47R

C8 100nF

C16

10

V1/-UB

7

V1/1 &

2

GND1

8 4

6 5

-15V

750R

R13

VDD

R4 U2 LT1227

AGND

P8 P10

C2

13k 15 E W1 150k 14 S4.1 3 13 E R17 12 S3.1 2 11 E 100nF 10 S2.1 9 E C25 8 S1.1 7 AGND 6 TXD 5 RXD 4 SIN/TRI AGND 3 TTL 2 SQR 1 AGND

DGND

100nF AGND

4

DGND DGND C5

330pF AGND

1nF

AGND

C9

C14

C23

SPI

R12 DGND

SV2

R8

R9 100k

AGND

1nF

C7

10µF

L5

C17

14

100nF 10µF

GND1

EXT-RESET 100k

13 RS 12 R/W 11 E 10 DB0 9 DB1 8 DB2 7 DB3 6 DB4 5 DB5 4 DB6 3 DB7 2 +5V 1 AGND

330pF

10 8 6 4 2

2,2µH

L4

VCC

VCC

C4

-15V

9 7 5 3 1

C10

7

QG2 100nF

750R

SV1

SV3

14 15 16 17 18 19

3.3µH

L3

C1

AVDD Comp

R1

PB0(ICP) PB1(OC1A) PB2(SS/OC1B) PB3(MOSI/OC2) PB4(MISO) PB5(SCK)

VCC

2,2µH

DVDD

+

VCC

AGND VOUT

CAP/2.5V

GND

8

+5V

GND

7

2 3 4 5 6 11 12 13 E

FSYNC STANDBY

DGND

27k

8

PD0(RXD) PD1(TXD) PD2(INT0) PD3(INT1) PD4(XCK/T0) PD5(T1) PD6(AIN0) PD7(AIN1)

MCLK

SCLK

OUT

R5

PB7(XTAL2/TOSC2)

SDATA

TTL

27k

10

MSBOUT SYNCOUT

R6

PB6(XTAL1/TOSC1)

27 28

INTERRUPT CTRL

AGND

9

D6

P8 P7 P6 P5 P4 P3 P2 P1

C6

AGND AREF AVCC

P9 P10 P11 P12 P13 P14 P15 P16

C3

PC0(ADC0) PC1(ADC1) PC2(ADC2) PC3(ADC3) PC4(ADC4/SDA) PC5(ADC5/SCL)

1

S4.1

10nF

27pF

18,432MHz C18 27pF DGND 100nF DGND C21 +15V -15V +5V -5V AGND

22 21 20

Q1

L2 10µH C15

PC6(/RESET)

JP1

-5V

100nF 100nF +5V C19 AGND C20

DB4 23 24DB5 25 DB6 26 DB7

S3.1

AD5932

IC2 1

D5 1N4148

MEGA8-P

S2.1

AGND

1N4148

D4 1N4148

R10 100k

RESET AGND

1N4148 D2

DGND DGND DGND

R11 100k

390R

S1.1

100k

D1

R14

100k

2 1

D3 1N4148 R15

4 3

5 4 3 2 1 X1

1N4148

VCC AGND DGND

+10µF

+5V

+5V

+5V C22

AGND

AGND -15V

Steuerplatine Technikerarbeit 2009/2010 Bearbeiter: Martin Ernst

11

13

74132N

AGND

21.02.2010 22:46:08 C:\Users\Martin\Techniker\JAT\Steuerplatine\DDS-Funktionsgenerator.sch (Sheet: 1/1)