Systems and methods for implementing a sample rate converter using ...

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Jan 23, 2007 - Rate Converters with Finite Precision Error Analysis,” Speech Pro. (22) Filed; ... ?gured to estimate t
USO0RE43489E

(19) United States (12) Reissued Patent

(10) Patent Number:

Andersen et a]. (54)

(45) Date of Reissued Patent:

SYSTEMS AND METHODS FOR

(58)

341/61, 63; 375/220, 224, 238, 247, 355, 375/356, 364; 327/100, 141, 144, 172

SOFTWARE TO MAXIMIZE SPEED AND FLEXIBILITY

(56)

See application ?le for complete search history. References Cited

Inventors: Jack B. Andersen, Cedar Park, TX

(US); Larry E. Hand, Meridian, MS

Us}; PATENT DQCUMENTS

(US); Daniel L. W. Chieng, Austin, TX

5,185,805 A

“993 ‘Chung ~~~~~~~~~~~~~~~~~~~~~~~~~ ~~ 381/96

(US); Joel W. Page, Austin, TX (U S);

(Contlnued)

Wilson E. Taylor, Austin, TX (US); Tonya Andersen, Cedar Park, legal

FOREIGN PATENT DOCUMENTS

representative, TX (US) _

GB _

2 267 193

_

11/1993 (Continued)

(73) Asslgnee: D2Audio Corporation, M1lp1tas, CA (US) (21)

Jun. 26, 2012

Field of Classi?cation Search .................. .. 341/50,

IMPLEMENTINGA SAMPLE RATE CONVERTER USING HARDWARE AND

(75)

US RE43,489 E

OTHER PUBLICATIONS

App1_ NO; 12652021

Park, Sangil et al., “A Novel Structure for Real-Time Digital Sample Rate Converters with Finite Precision Error Analysis,” Speech Pro

(22)

Filed;

Jam 23, 2009

cessing 2,VLSI, Underwater Signal Processing, Toronto, May 14-17, 1991, International Conference on Acoustics, Speech and Signal

Related U-S- Patent Documents

Processing, ICASSP, NY, IEEE, US, vol. 2, Conf. 16, Apr. 14, 1991,

Reissue of:

4 pages.

(64) Patent No.: Issued: A_PP1- NOJ Flled:

7,167,112

(Continued)

Jan. 23, 2007 10/805,569 Mar‘ 20’ 2004

Primary Examiner * Linh V Nguyen (74) Attorney, Agent, or Firm * Fliesler Meyer LLP

US. Applications: (60) Provisional application No. 60/469,761, ?led on May

(57)

ABSTRACT

Systems and methods for converting a digital input data

12, 2003, provisional application No. 60/456,414,

stream from a ?rst sample rate to a second, ?xed sample rate

?led on Mar. 21, 2003, provisional application No. 60/456,430, ?led on Mar. 21, 2003, provisional appli cation No. 60/456,429, ?led on Mar. 21, 2003, provi sional application No. 60/456,421, ?led on Mar. 21, 2003, provisional application No. 60/456,422, ?led on

using a combination of hardware and software components. In one embodiment, a system includes a rate estimator con

?gured to estimate the sample rate of an input data stream, a

phase selection unit con?gured to select a phase for interpo lation of a set of polyphase ?lter coef?cients based on the

Mar. 21, 2003, provisional application No. 60/456,

estimated sample rate, a coe?icient interpolator con?gured to interpolate the ?lter coef?cients based on the selected phase, and a convolution unit con?gured to convolve the interpo lated ?lter coef?cients with samples of the input data stream to produce samples of a re-sampled output data stream. One

428, ?led on Mar. 21, 2003, provisional application No. 60/456,420, ?led on Mar. 21, 2003, provisional application No. 60/456,427, ?led on Mar. 21, 2003. (51)

Int‘ C1‘

or more hardware or software components are shared

(52)

H03M 7/00 (2006-01) US. Cl. ............ .. 341/61; 341/50; 341/63; 375/220;

between multiple channels that can process data streams hav ing independently variable sample rates,

375/224; 375/247; 375/355; 375/356; 327/100; 327/141; 327/144; 327/172

22 Claims, 4 Drawing Sheets

421

Frame SyncO

450

( Hw

SW (

Frame Sync 1 Rage Frame Sync 2 Estimator

HW

460

Phase selection

ML SW 3 Counter 0

Coef?cient

Interpolation Frame Sync 4

“W

Fri“, Rate Frame Sync 6 Estimator

mm Counler1 \422

ccemciem

47°

I: FeedEi

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sw ) Audio D“ in

SW {405

SW

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Audio Data out

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FIFO

Managment

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US RE43,489 E Page 2 US. PATENT DOCUMENTS 5,331,346 A * 5,331,436 A *

5,475,628 A 5,481,568 A

7/1994 Shields et a1. .............. .. 348/441 7/1994 Ida et al. ................ .. 358/426.09

12/1995 Adams 1/1996 Yada

5,824,936 A *

10/1998 DuPuis et a1. ................ .. 84/663

5,986,589 A

11/1999 Rose?eld et al.

2 6,134,268 A

7/2003 Groves et al.

6,695,783 B2 * 7,218,581 B2*

2/2004 Henderson et a1, ,,,,,,,,, ,, 600/443 5/2007 FriSSon et a1. 369/44.32

7,345,600 B1 *

3/2008

7,528,745 B2 *

5/2009 Wang et a1. ................... .. 341/61

2002/0105448 A1 2002/0190880 A1 2003/0179116 A1

2267193 A 2002-314429

JP

2008-018518

11/1993 10/2002

1/2008

OTHER PUBLICATIONS

International Search Report in connection With PCT/US2004/ 10/2000 MCCOY

6,593,807 B2

2002/0093437 A1*

FOREIGN PATENT DOCUMENTS GB JP

7/2002

Fedigan ........................ .. 341/61

008547 completed Sep. 16, 2004, mailed Dec. 6, 2004, 5 pages. European Examination Report in connection With EP 047579297 dated Jun 21 2006 3 3 es '





P g

Freidhofet al. .............. .. 341/61

8/2002 Freidhof 12/2002 McLaughlin et al. 9/2003 Oki

'

Japanese Of?ce Action in connection With JP 2006-507404 mailed

“8261200812 Pages~

* cited by examiner

US. Patent

Jun. 26, 2012

Sheet 1 M4

US RE43,489 E

100

110 |

"Pul—>

SR0

120

_’

130

Audio

effects

PWM

a modulator PWM CLK

Fig. 1

14° '

Output

stage

I

US. Patent

Jun. 26, 2012

210

\

Sheet 2 M4

230

Fin--—> TM ——>

US RE43,489 E

220

—-—> ‘N -——>Fout

Fig. 2

US. Patent

Jun. 26, 2012

Sheet 3 of4

US RE43,489 E

315 314 305 30

310 309 308

307

31

16

312 311

\Y, '- '

3052531 _ gill-+--L + + * Fig. 3

-

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US RE43,489 E 1

2

SYSTEMS AND METHODS FOR IMPLEMENTING A SAMPLE RATE CONVERTER USING HARDWARE AND SOFTWARE TO MAXIMIZE SPEED AND FLEXIBILITY

of Class D technology have therefore been unable to displace

legacy Class AB ampli?ers in mainstream ampli?er applica tions. Recently, digital PWM modulation schemes have sur faced. These schemes use Sigma-Delta modulation tech niques to generate the PWM signals used in the newer digital

Class D implementations. These digital PWM schemes, how Matter enclosed in heavy brackets [ ] appears in the original patent but forms no part of this reissue speci?ca

ever, did little to offset the major barriers to integration of PWM modulators into the total ampli?er solution. Class D technology has therefore continued to be unable to displace

tion; matter printed in italics indicates the additions made by reissue.

legacy Class AB ampli?ers in mainstream applications. There are a number of problems with existing digital PWM modulation schemes. One of the problems is that the perfor

RELATED APPLICATIONS

mance and quality characteristics of the remainder of the

signal processing system vary with the application. The exact implementation of the total system solution and the end-user application is not deterministic. As a result, implementation details cannot be accounted for apriori. Because existing

This application claims priority to: US. Provisional Patent

Application No. 60/469,761, entitled “Systems and Methods for Implementing a Sample Rate Converter Using Hardware and Software to Maximize Speed and Flexibility,” by Ander sen, et al., ?led May 12, 2003; US. Provisional Patent Appli cation No. 60/45 6,414, entitled “Adaptive Anti-Clipping Pro tection,” by Taylor, et al., ?led Mar. 21, 2003; US. Provisional PatentApplication No. 60/456,430, entitled “Fre quency Response Correction,” by Taylor, et al., ?led Mar. 21, 2003; US. Provisional Patent Application No. 60/456,429,

technologies require application-speci?c solutions, they typi 20

applicable to mainstream systems. One area in particular where existing digital PWM modu lation schemes do not meet mainstream system requirements 25

entitled “High-E?iciency, High-Performance Sample Rate Converter,” by Andersen, et al., ?led Mar. 21, 2003; US. Provisional Patent Application No. 60/456,421, entitled “Output Device Switch Timing Correction,” by Taylor, et al., ?led Mar. 21, 2003; US. Provisional Patent Application No. 60/456,422, entitled “Output Filter, Phase/ Timing Correc tion,” by Taylor, et al., ?led Mar. 21, 2003; US. Provisional Patent Application No. 60/456,428, entitled “Output Filter Speaker/ Load Compensation,” by Taylor, et al., ?led Mar. 21 , 2003; US. Provisional Patent Application No. 60/456,420,

cally are not ?exible, scalable or transportable to other appli cations. Consequently, these technologies generally are not

is in the processing of digital input data streams having vari ous sample rates. These input data streams may have different

sample rates, depending upon the type of device that provides the data, as well as the particular design of the device. The 30

input data streams may also use different clock sources that may have slightly different rates or may drift with respect to

one another. Existing technologies require a single input sample rate, or multiple ?xed, known input rates, and cannot adapt to the different rates at which devices may provide the

input data. 35

Another problem with prior art systems is that, because

entitled “Output Stage Channel Timing Calibration,” by Tay

they do not have a sample rate converter that can generate a

lor, et al., ?led Mar. 21, 2003; US. Provisional Patent Appli cation No. 60/ 456,427, entitled “Intelligent Over-Current, Over-Load Protection,” by Hand, et al., ?led Mar. 21, 2003;

local clock signal, they typically regenerate the PWM clock signal from the input data. This regenerated clock signal

each of which is fully incorporated by reference as if set forth herein in its entirety.

cannot support the higher performance that is possible with a 40

locally generated clock signal. SUMMARY OF THE INVENTION

BACKGROUND OF THE INVENTION One or more of the problems outlined above may be solved

1. Field of the Invention

45

The invention relates generally to audio ampli?cation sys tems, and more particularly to systems and methods for con

verting input data streams having a ?rst sample rate to output data streams having a second data rate. 2. Related Art

50

Pulse Width Modulation (PWM) or Class D signal ampli ?cation technology has existed for a number of years. PWM

technology has become more popular with the proliferation of Switched Mode Power Supplies (SMPS). Since this tech nology emerged, there has been an increased interest in

implemented in software. Whether each component is imple 55

mented in hardware or software depends upon the perfor mance requirements of the component. Components that achieve better performance in software are implemented in software, while those that achieve better performance in hard

60

performance may be improved, not only in audio perfor

applying PWM techniques in signal ampli?cation applica topology instead of the legacy (linear Class AB) power output

ware are implemented in hardware. It should be noted that

Early attempts to develop signal ampli?cation applications

mance measures, but also in computational complexity, the “?t” of components onto the software engine, and in other

utilized the same approach to ampli?cation that was being

used in the early SMPS. More particularly, these attempts utilized analog modulation schemes that resulted in very low performance applications. These applications were very com

plex and costly to implement. Consequently, these solutions were not widely accepted. Prior art analog implementations

ing, the invention comprises systems and methods for con verting a digital input data stream from a ?rst sample rate to a second sample rate using a combination of hardware and software components. In one embodiment, the conversion from the ?rst sample rate to the second sample rate is per formed in a sample rate converter for a digital audio system. The sample rate converter has multiple components, some of which are implemented in hardware and some of which are

tions as a result of the signi?cant ef?ciency improvement that can be realized through the use of Class D power output

topology.

by the various embodiments of the invention. Broadly speak

areas.

65

One embodiment comprises a sample rate converter sys tem including a rate estimator con?gured to estimate the sample rate of an input data stream, a phase selection unit con?gured to select a phase for interpolation of a set of

US RE43,489 E 3

4

polyphase ?lter coef?cients based on the estimated sample rate, a coe?icient interpolator con?gured to increase phase resolution by interpolating the ?lter coe?icients based on the selected phase, and a convolution unit con?gured to convolve

FIG. 3 is a diagram illustrating the interpolation and deci mation of a sampled input signal to produce a corresponding

the interpolated ?lter coef?cients With samples of the input

rate converter in accordance With one embodiment of the

data stream to produce samples of a re-sampled output data stream. As indicated above, these system components include

invention. While the invention is subject to various modi?cations and

both hardWare and software components. In one embodi ment, the system includes tWo or more channels, each of

alternative forms, speci?c embodiments thereof are shoWn by Way of example in the draWings and the accompanying detailed description. It should be understood, hoWever, that

signal at a different sample rate. FIG. 4 is a diagram illustrating the components of a sample

Which is capable of receiving an input data stream having a different, variable sample rate than the data streams received by the other channels. In one embodiment, the different chan

the draWings and detailed description are not intended to limit the invention to the particular embodiment Which is described. This disclosure is instead intended to cover all

nels share one or more common components With the other

modi?cations, equivalents and alternatives falling Within the

channels. In one embodiment, the sample rate converter sys tem is coupled to an audio ampli?cation system and is con ?gured to convert input data streams to a common output

scope of the present invention as de?ned by the appended claims.

sample rate for processing by ampli?er components such as

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

an audio effects unit or a pulse Width modulator.

Another embodiment comprises a method Which includes

20

the steps of receiving an input data stream having an input sample rate and processing the input data stream using a combination of hardWare and softWare components to pro duce an output data stream having a output sample rate that is different from the input sample rate. In one embodiment, the

One or more embodiments of the invention are described

beloW. It should be noted that these and any other embodi ments described beloW are exemplary and are intended to be 25

comprise systems and methods for converting a digital input

processing comprises estimating the input sample rate,

data stream from a ?rst sample rate to a second sample rate

selecting a phase for interpolation of a set of polyphase ?lter coe?icients, interpolating the set of polyphase ?lter coe?i

cients, convolving the set of interpolated polyphase ?lter coe?icients With samples of the input data stream, and pro viding resulting samples of the output data stream. In one

30

tWo or more input data streams having independently variable

sample rates on separate channels to produce corresponding 35

40

potential advantage is that components for Which processing speed is important may be implemented in dedicated hard Ware to maximize their performance, While other components for Which ?exibility is more important can be implemented in softWare. Another potential advantage is that hardWare and/or softWare components may be common to (shared by) mul

45

cost, ?exibility, poWer consumption and the like. 50

nels may be able to handle input sample rates Which are variable and Which are independent of the sample rates of data streams on other channels. Another potential advantage is that

processing speed is important may be implemented in dedi 55

BRIEF DESCRIPTION OF THE DRAWINGS 60

Other objects and advantages of the invention may become

apparent upon reading the folloWing detailed description and upon reference to the accompanying draWings. FIG. 1 is a functional block diagram illustrating a digital FIG. 2 is a diagram illustrating the manner in Which sample

rate conversion is typically performed.

cated hardWare to maximiZe their performance. For other

components, processing speed may be less important than ?exibility. These components may be implemented in soft

input data.

audio ampli?cation system using PWM technology.

The use of both hardWare and softWare components may provide a number of advantages over prior art systems Which

are conventionally implemented either entirely in hardWare or entirely in softWare. For example, components for Which

the generation of a local, high-performance clock signal enables the PWM output to meet higher performance stan dards than if the clock signal must be regenerated from the

softWare. Whether each component is implemented in hard Ware or softWare depends upon the performance require ments of the component. Components that achieve better performance in softWare are implemented in softWare, While those that achieve better performance in hardWare are imple mented in hardWare. As noted above, performance may mea sured in terms of the audio performance, computational com plexity, etc., using such metrics as the number of processor

cycles required for operations, device siZe, implementation

tiple channels, thereby reducing the cost and complexity of the system, While retaining the speed and ?exibility of the system. Another potential advantage is that each of the chan

blocks under softWare, as in a digital signal processor (DSP) arithmetic logic unit (ALU) or memory. In one embodiment, the conversion from the ?rst sample rate to the second sample rate is performed in a sample rate converter for a digital audio system. The sample rate con verter has multiple components, some of Which are imple mented in hardWare and some of Which are implemented in

softWare components. Numerous additional embodiments are also possible. The use of both hardWare and softWare components may provide a number of advantages over prior art systems. One

using a combination of hardWare and softWare components. As used herein, “hardWare” refers to dedicated, ?xed-func tion logic. “Software,” on the other hand, is used to refer to

programmable logic that is controlled by an algorithm de?ned by a programmer, or utilizing generic programmable

embodiment, the method comprises receiving and processing output data streams having a common output sample rate. At least a portion of the processing of the different data streams in the different channels is performed in common With or

illustrative of the invention rather than limiting. As described herein, various embodiments of the invention

65

Ware in order to provide the desired ?exibility. Another advantage of the use of both hardWare and softWare compo nents is that some of the components may be used for multiple channels. By sharing some of the components betWeen chan

nels, the cost and complexity of the system may be reduced, While retaining the speed and ?exibility of the system. A preferred embodiment of the invention is implemented in an audio ampli?cation system. As noted above, pulse Width

modulation (PWM) technology has recently been applied in audio ampli?cation systems, but has suffered from the draW

US RE43,489 E 5

6

backs of conventional methodologies. These methodologies employ analog modulation schemes Which are complex and costly, and Which provide relatively poor performance. The

rate to the desired output rate. After doWn-sampling, the

sample rate is F0ut:(M/N)>

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